fdtdec.c 43 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/global_data.h>
  24. #include <asm/sections.h>
  25. #include <linux/ctype.h>
  26. #include <linux/lzo.h>
  27. #include <linux/ioport.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*
  30. * Here are the type we know about. One day we might allow drivers to
  31. * register. For now we just put them here. The COMPAT macro allows us to
  32. * turn this into a sparse list later, and keeps the ID with the name.
  33. *
  34. * NOTE: This list is basically a TODO list for things that need to be
  35. * converted to driver model. So don't add new things here unless there is a
  36. * good reason why driver-model conversion is infeasible. Examples include
  37. * things which are used before driver model is available.
  38. */
  39. #define COMPAT(id, name) name
  40. static const char * const compat_names[COMPAT_COUNT] = {
  41. COMPAT(UNKNOWN, "<none>"),
  42. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  43. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  44. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  45. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  46. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  47. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  48. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  49. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  50. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  51. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  52. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  53. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  54. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  55. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  56. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  57. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  58. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  59. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  60. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  61. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  62. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  63. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  64. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  65. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  66. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  72. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  73. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  74. };
  75. static const char *const fdt_src_name[] = {
  76. [FDTSRC_SEPARATE] = "separate",
  77. [FDTSRC_FIT] = "fit",
  78. [FDTSRC_BOARD] = "board",
  79. [FDTSRC_EMBED] = "embed",
  80. [FDTSRC_ENV] = "env",
  81. };
  82. const char *fdtdec_get_srcname(void)
  83. {
  84. return fdt_src_name[gd->fdt_src];
  85. }
  86. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  87. {
  88. /* We allow reading of the 'unknown' ID for testing purposes */
  89. assert(id >= 0 && id < COMPAT_COUNT);
  90. return compat_names[id];
  91. }
  92. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  93. const char *prop_name, int index, int na,
  94. int ns, fdt_size_t *sizep,
  95. bool translate)
  96. {
  97. const fdt32_t *prop, *prop_end;
  98. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  99. int len;
  100. fdt_addr_t addr;
  101. debug("%s: %s: ", __func__, prop_name);
  102. prop = fdt_getprop(blob, node, prop_name, &len);
  103. if (!prop) {
  104. debug("(not found)\n");
  105. return FDT_ADDR_T_NONE;
  106. }
  107. prop_end = prop + (len / sizeof(*prop));
  108. prop_addr = prop + (index * (na + ns));
  109. prop_size = prop_addr + na;
  110. prop_after_size = prop_size + ns;
  111. if (prop_after_size > prop_end) {
  112. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  113. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  114. return FDT_ADDR_T_NONE;
  115. }
  116. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  117. if (translate)
  118. addr = fdt_translate_address(blob, node, prop_addr);
  119. else
  120. #endif
  121. addr = fdtdec_get_number(prop_addr, na);
  122. if (sizep) {
  123. *sizep = fdtdec_get_number(prop_size, ns);
  124. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  125. (unsigned long long)*sizep);
  126. } else {
  127. debug("addr=%08llx\n", (unsigned long long)addr);
  128. }
  129. return addr;
  130. }
  131. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  132. int node, const char *prop_name,
  133. int index, fdt_size_t *sizep,
  134. bool translate)
  135. {
  136. int na, ns;
  137. debug("%s: ", __func__);
  138. na = fdt_address_cells(blob, parent);
  139. if (na < 1) {
  140. debug("(bad #address-cells)\n");
  141. return FDT_ADDR_T_NONE;
  142. }
  143. ns = fdt_size_cells(blob, parent);
  144. if (ns < 0) {
  145. debug("(bad #size-cells)\n");
  146. return FDT_ADDR_T_NONE;
  147. }
  148. debug("na=%d, ns=%d, ", na, ns);
  149. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  150. ns, sizep, translate);
  151. }
  152. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  153. const char *prop_name, int index,
  154. fdt_size_t *sizep,
  155. bool translate)
  156. {
  157. int parent;
  158. debug("%s: ", __func__);
  159. parent = fdt_parent_offset(blob, node);
  160. if (parent < 0) {
  161. debug("(no parent found)\n");
  162. return FDT_ADDR_T_NONE;
  163. }
  164. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  165. index, sizep, translate);
  166. }
  167. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  168. const char *prop_name, fdt_size_t *sizep)
  169. {
  170. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  171. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  172. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  173. ns, sizep, false);
  174. }
  175. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  176. {
  177. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  178. }
  179. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  180. {
  181. const char *list, *end;
  182. int len;
  183. list = fdt_getprop(blob, node, "compatible", &len);
  184. if (!list)
  185. return -ENOENT;
  186. end = list + len;
  187. while (list < end) {
  188. len = strlen(list);
  189. if (len >= strlen("pciVVVV,DDDD")) {
  190. char *s = strstr(list, "pci");
  191. /*
  192. * check if the string is something like pciVVVV,DDDD.RR
  193. * or just pciVVVV,DDDD
  194. */
  195. if (s && s[7] == ',' &&
  196. (s[12] == '.' || s[12] == 0)) {
  197. s += 3;
  198. *vendor = simple_strtol(s, NULL, 16);
  199. s += 5;
  200. *device = simple_strtol(s, NULL, 16);
  201. return 0;
  202. }
  203. }
  204. list += (len + 1);
  205. }
  206. return -ENOENT;
  207. }
  208. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  209. u32 *bar)
  210. {
  211. int barnum;
  212. /* extract the bar number from fdt_pci_addr */
  213. barnum = addr->phys_hi & 0xff;
  214. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  215. return -EINVAL;
  216. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  217. /*
  218. * There is a strange toolchain bug with nds32 which complains about
  219. * an undefined reference here, even if fdtdec_get_pci_bar32() is never
  220. * called. An #ifdef seems to be the only fix!
  221. */
  222. #if !IS_ENABLED(CONFIG_NDS32)
  223. *bar = dm_pci_read_bar32(dev, barnum);
  224. #endif
  225. return 0;
  226. }
  227. int fdtdec_get_pci_bus_range(const void *blob, int node,
  228. struct fdt_resource *res)
  229. {
  230. const u32 *values;
  231. int len;
  232. values = fdt_getprop(blob, node, "bus-range", &len);
  233. if (!values || len < sizeof(*values) * 2)
  234. return -EINVAL;
  235. res->start = fdt32_to_cpu(*values++);
  236. res->end = fdt32_to_cpu(*values);
  237. return 0;
  238. }
  239. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  240. uint64_t default_val)
  241. {
  242. const unaligned_fdt64_t *cell64;
  243. int length;
  244. cell64 = fdt_getprop(blob, node, prop_name, &length);
  245. if (!cell64 || length < sizeof(*cell64))
  246. return default_val;
  247. return fdt64_to_cpu(*cell64);
  248. }
  249. int fdtdec_get_is_enabled(const void *blob, int node)
  250. {
  251. const char *cell;
  252. /*
  253. * It should say "okay", so only allow that. Some fdts use "ok" but
  254. * this is a bug. Please fix your device tree source file. See here
  255. * for discussion:
  256. *
  257. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  258. */
  259. cell = fdt_getprop(blob, node, "status", NULL);
  260. if (cell)
  261. return strcmp(cell, "okay") == 0;
  262. return 1;
  263. }
  264. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  265. {
  266. enum fdt_compat_id id;
  267. /* Search our drivers */
  268. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  269. if (fdt_node_check_compatible(blob, node,
  270. compat_names[id]) == 0)
  271. return id;
  272. return COMPAT_UNKNOWN;
  273. }
  274. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  275. {
  276. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  277. }
  278. int fdtdec_next_compatible_subnode(const void *blob, int node,
  279. enum fdt_compat_id id, int *depthp)
  280. {
  281. do {
  282. node = fdt_next_node(blob, node, depthp);
  283. } while (*depthp > 1);
  284. /* If this is a direct subnode, and compatible, return it */
  285. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  286. blob, node, compat_names[id]))
  287. return node;
  288. return -FDT_ERR_NOTFOUND;
  289. }
  290. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  291. int *upto)
  292. {
  293. #define MAX_STR_LEN 20
  294. char str[MAX_STR_LEN + 20];
  295. int node, err;
  296. /* snprintf() is not available */
  297. assert(strlen(name) < MAX_STR_LEN);
  298. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  299. node = fdt_path_offset(blob, str);
  300. if (node < 0)
  301. return node;
  302. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  303. if (err < 0)
  304. return err;
  305. if (err)
  306. return -FDT_ERR_NOTFOUND;
  307. (*upto)++;
  308. return node;
  309. }
  310. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  311. enum fdt_compat_id id, int *node_list,
  312. int maxcount)
  313. {
  314. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  315. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  316. }
  317. /* TODO: Can we tighten this code up a little? */
  318. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  319. enum fdt_compat_id id, int *node_list,
  320. int maxcount)
  321. {
  322. int name_len = strlen(name);
  323. int nodes[maxcount];
  324. int num_found = 0;
  325. int offset, node;
  326. int alias_node;
  327. int count;
  328. int i, j;
  329. /* find the alias node if present */
  330. alias_node = fdt_path_offset(blob, "/aliases");
  331. /*
  332. * start with nothing, and we can assume that the root node can't
  333. * match
  334. */
  335. memset(nodes, '\0', sizeof(nodes));
  336. /* First find all the compatible nodes */
  337. for (node = count = 0; node >= 0 && count < maxcount;) {
  338. node = fdtdec_next_compatible(blob, node, id);
  339. if (node >= 0)
  340. nodes[count++] = node;
  341. }
  342. if (node >= 0)
  343. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  344. __func__, name);
  345. /* Now find all the aliases */
  346. for (offset = fdt_first_property_offset(blob, alias_node);
  347. offset > 0;
  348. offset = fdt_next_property_offset(blob, offset)) {
  349. const struct fdt_property *prop;
  350. const char *path;
  351. int number;
  352. int found;
  353. node = 0;
  354. prop = fdt_get_property_by_offset(blob, offset, NULL);
  355. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  356. if (prop->len && 0 == strncmp(path, name, name_len))
  357. node = fdt_path_offset(blob, prop->data);
  358. if (node <= 0)
  359. continue;
  360. /* Get the alias number */
  361. number = dectoul(path + name_len, NULL);
  362. if (number < 0 || number >= maxcount) {
  363. debug("%s: warning: alias '%s' is out of range\n",
  364. __func__, path);
  365. continue;
  366. }
  367. /* Make sure the node we found is actually in our list! */
  368. found = -1;
  369. for (j = 0; j < count; j++)
  370. if (nodes[j] == node) {
  371. found = j;
  372. break;
  373. }
  374. if (found == -1) {
  375. debug("%s: warning: alias '%s' points to a node "
  376. "'%s' that is missing or is not compatible "
  377. " with '%s'\n", __func__, path,
  378. fdt_get_name(blob, node, NULL),
  379. compat_names[id]);
  380. continue;
  381. }
  382. /*
  383. * Add this node to our list in the right place, and mark
  384. * it as done.
  385. */
  386. if (fdtdec_get_is_enabled(blob, node)) {
  387. if (node_list[number]) {
  388. debug("%s: warning: alias '%s' requires that "
  389. "a node be placed in the list in a "
  390. "position which is already filled by "
  391. "node '%s'\n", __func__, path,
  392. fdt_get_name(blob, node, NULL));
  393. continue;
  394. }
  395. node_list[number] = node;
  396. if (number >= num_found)
  397. num_found = number + 1;
  398. }
  399. nodes[found] = 0;
  400. }
  401. /* Add any nodes not mentioned by an alias */
  402. for (i = j = 0; i < maxcount; i++) {
  403. if (!node_list[i]) {
  404. for (; j < maxcount; j++)
  405. if (nodes[j] &&
  406. fdtdec_get_is_enabled(blob, nodes[j]))
  407. break;
  408. /* Have we run out of nodes to add? */
  409. if (j == maxcount)
  410. break;
  411. assert(!node_list[i]);
  412. node_list[i] = nodes[j++];
  413. if (i >= num_found)
  414. num_found = i + 1;
  415. }
  416. }
  417. return num_found;
  418. }
  419. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  420. int *seqp)
  421. {
  422. int base_len = strlen(base);
  423. const char *find_name;
  424. int find_namelen;
  425. int prop_offset;
  426. int aliases;
  427. find_name = fdt_get_name(blob, offset, &find_namelen);
  428. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  429. aliases = fdt_path_offset(blob, "/aliases");
  430. for (prop_offset = fdt_first_property_offset(blob, aliases);
  431. prop_offset > 0;
  432. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  433. const char *prop;
  434. const char *name;
  435. const char *slash;
  436. int len, val;
  437. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  438. debug(" - %s, %s\n", name, prop);
  439. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  440. strncmp(name, base, base_len))
  441. continue;
  442. slash = strrchr(prop, '/');
  443. if (strcmp(slash + 1, find_name))
  444. continue;
  445. /*
  446. * Adding an extra check to distinguish DT nodes with
  447. * same name
  448. */
  449. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  450. if (fdt_get_phandle(blob, offset) !=
  451. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  452. continue;
  453. }
  454. val = trailing_strtol(name);
  455. if (val != -1) {
  456. *seqp = val;
  457. debug("Found seq %d\n", *seqp);
  458. return 0;
  459. }
  460. }
  461. debug("Not found\n");
  462. return -ENOENT;
  463. }
  464. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  465. {
  466. int base_len = strlen(base);
  467. int prop_offset;
  468. int aliases;
  469. int max = -1;
  470. debug("Looking for highest alias id for '%s'\n", base);
  471. aliases = fdt_path_offset(blob, "/aliases");
  472. for (prop_offset = fdt_first_property_offset(blob, aliases);
  473. prop_offset > 0;
  474. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  475. const char *prop;
  476. const char *name;
  477. int len, val;
  478. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  479. debug(" - %s, %s\n", name, prop);
  480. if (*prop != '/' || prop[len - 1] ||
  481. strncmp(name, base, base_len))
  482. continue;
  483. val = trailing_strtol(name);
  484. if (val > max) {
  485. debug("Found seq %d\n", val);
  486. max = val;
  487. }
  488. }
  489. return max;
  490. }
  491. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  492. {
  493. int chosen_node;
  494. if (!blob)
  495. return NULL;
  496. chosen_node = fdt_path_offset(blob, "/chosen");
  497. return fdt_getprop(blob, chosen_node, name, NULL);
  498. }
  499. int fdtdec_get_chosen_node(const void *blob, const char *name)
  500. {
  501. const char *prop;
  502. prop = fdtdec_get_chosen_prop(blob, name);
  503. if (!prop)
  504. return -FDT_ERR_NOTFOUND;
  505. return fdt_path_offset(blob, prop);
  506. }
  507. int fdtdec_check_fdt(void)
  508. {
  509. /*
  510. * We must have an FDT, but we cannot panic() yet since the console
  511. * is not ready. So for now, just assert(). Boards which need an early
  512. * FDT (prior to console ready) will need to make their own
  513. * arrangements and do their own checks.
  514. */
  515. assert(!fdtdec_prepare_fdt());
  516. return 0;
  517. }
  518. /*
  519. * This function is a little odd in that it accesses global data. At some
  520. * point if the architecture board.c files merge this will make more sense.
  521. * Even now, it is common code.
  522. */
  523. int fdtdec_prepare_fdt(void)
  524. {
  525. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  526. fdt_check_header(gd->fdt_blob)) {
  527. #ifdef CONFIG_SPL_BUILD
  528. puts("Missing DTB\n");
  529. #else
  530. printf("No valid device tree binary found at %p\n",
  531. gd->fdt_blob);
  532. # ifdef DEBUG
  533. if (gd->fdt_blob) {
  534. printf("fdt_blob=%p\n", gd->fdt_blob);
  535. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  536. 32, 0);
  537. }
  538. # endif
  539. #endif
  540. return -1;
  541. }
  542. return 0;
  543. }
  544. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  545. {
  546. const u32 *phandle;
  547. int lookup;
  548. debug("%s: %s\n", __func__, prop_name);
  549. phandle = fdt_getprop(blob, node, prop_name, NULL);
  550. if (!phandle)
  551. return -FDT_ERR_NOTFOUND;
  552. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  553. return lookup;
  554. }
  555. /**
  556. * Look up a property in a node and check that it has a minimum length.
  557. *
  558. * @param blob FDT blob
  559. * @param node node to examine
  560. * @param prop_name name of property to find
  561. * @param min_len minimum property length in bytes
  562. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  563. found, or -FDT_ERR_BADLAYOUT if not enough data
  564. * Return: pointer to cell, which is only valid if err == 0
  565. */
  566. static const void *get_prop_check_min_len(const void *blob, int node,
  567. const char *prop_name, int min_len,
  568. int *err)
  569. {
  570. const void *cell;
  571. int len;
  572. debug("%s: %s\n", __func__, prop_name);
  573. cell = fdt_getprop(blob, node, prop_name, &len);
  574. if (!cell)
  575. *err = -FDT_ERR_NOTFOUND;
  576. else if (len < min_len)
  577. *err = -FDT_ERR_BADLAYOUT;
  578. else
  579. *err = 0;
  580. return cell;
  581. }
  582. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  583. u32 *array, int count)
  584. {
  585. const u32 *cell;
  586. int err = 0;
  587. debug("%s: %s\n", __func__, prop_name);
  588. cell = get_prop_check_min_len(blob, node, prop_name,
  589. sizeof(u32) * count, &err);
  590. if (!err) {
  591. int i;
  592. for (i = 0; i < count; i++)
  593. array[i] = fdt32_to_cpu(cell[i]);
  594. }
  595. return err;
  596. }
  597. int fdtdec_get_int_array_count(const void *blob, int node,
  598. const char *prop_name, u32 *array, int count)
  599. {
  600. const u32 *cell;
  601. int len, elems;
  602. int i;
  603. debug("%s: %s\n", __func__, prop_name);
  604. cell = fdt_getprop(blob, node, prop_name, &len);
  605. if (!cell)
  606. return -FDT_ERR_NOTFOUND;
  607. elems = len / sizeof(u32);
  608. if (count > elems)
  609. count = elems;
  610. for (i = 0; i < count; i++)
  611. array[i] = fdt32_to_cpu(cell[i]);
  612. return count;
  613. }
  614. const u32 *fdtdec_locate_array(const void *blob, int node,
  615. const char *prop_name, int count)
  616. {
  617. const u32 *cell;
  618. int err;
  619. cell = get_prop_check_min_len(blob, node, prop_name,
  620. sizeof(u32) * count, &err);
  621. return err ? NULL : cell;
  622. }
  623. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  624. {
  625. const s32 *cell;
  626. int len;
  627. debug("%s: %s\n", __func__, prop_name);
  628. cell = fdt_getprop(blob, node, prop_name, &len);
  629. return cell != NULL;
  630. }
  631. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  632. const char *list_name,
  633. const char *cells_name,
  634. int cell_count, int index,
  635. struct fdtdec_phandle_args *out_args)
  636. {
  637. const __be32 *list, *list_end;
  638. int rc = 0, size, cur_index = 0;
  639. uint32_t count = 0;
  640. int node = -1;
  641. int phandle;
  642. /* Retrieve the phandle list property */
  643. list = fdt_getprop(blob, src_node, list_name, &size);
  644. if (!list)
  645. return -ENOENT;
  646. list_end = list + size / sizeof(*list);
  647. /* Loop over the phandles until all the requested entry is found */
  648. while (list < list_end) {
  649. rc = -EINVAL;
  650. count = 0;
  651. /*
  652. * If phandle is 0, then it is an empty entry with no
  653. * arguments. Skip forward to the next entry.
  654. */
  655. phandle = be32_to_cpup(list++);
  656. if (phandle) {
  657. /*
  658. * Find the provider node and parse the #*-cells
  659. * property to determine the argument length.
  660. *
  661. * This is not needed if the cell count is hard-coded
  662. * (i.e. cells_name not set, but cell_count is set),
  663. * except when we're going to return the found node
  664. * below.
  665. */
  666. if (cells_name || cur_index == index) {
  667. node = fdt_node_offset_by_phandle(blob,
  668. phandle);
  669. if (node < 0) {
  670. debug("%s: could not find phandle\n",
  671. fdt_get_name(blob, src_node,
  672. NULL));
  673. goto err;
  674. }
  675. }
  676. if (cells_name) {
  677. count = fdtdec_get_int(blob, node, cells_name,
  678. -1);
  679. if (count == -1) {
  680. debug("%s: could not get %s for %s\n",
  681. fdt_get_name(blob, src_node,
  682. NULL),
  683. cells_name,
  684. fdt_get_name(blob, node,
  685. NULL));
  686. goto err;
  687. }
  688. } else {
  689. count = cell_count;
  690. }
  691. /*
  692. * Make sure that the arguments actually fit in the
  693. * remaining property data length
  694. */
  695. if (list + count > list_end) {
  696. debug("%s: arguments longer than property\n",
  697. fdt_get_name(blob, src_node, NULL));
  698. goto err;
  699. }
  700. }
  701. /*
  702. * All of the error cases above bail out of the loop, so at
  703. * this point, the parsing is successful. If the requested
  704. * index matches, then fill the out_args structure and return,
  705. * or return -ENOENT for an empty entry.
  706. */
  707. rc = -ENOENT;
  708. if (cur_index == index) {
  709. if (!phandle)
  710. goto err;
  711. if (out_args) {
  712. int i;
  713. if (count > MAX_PHANDLE_ARGS) {
  714. debug("%s: too many arguments %d\n",
  715. fdt_get_name(blob, src_node,
  716. NULL), count);
  717. count = MAX_PHANDLE_ARGS;
  718. }
  719. out_args->node = node;
  720. out_args->args_count = count;
  721. for (i = 0; i < count; i++) {
  722. out_args->args[i] =
  723. be32_to_cpup(list++);
  724. }
  725. }
  726. /* Found it! return success */
  727. return 0;
  728. }
  729. node = -1;
  730. list += count;
  731. cur_index++;
  732. }
  733. /*
  734. * Result will be one of:
  735. * -ENOENT : index is for empty phandle
  736. * -EINVAL : parsing error on data
  737. * [1..n] : Number of phandle (count mode; when index = -1)
  738. */
  739. rc = index < 0 ? cur_index : -ENOENT;
  740. err:
  741. return rc;
  742. }
  743. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  744. u8 *array, int count)
  745. {
  746. const u8 *cell;
  747. int err;
  748. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  749. if (!err)
  750. memcpy(array, cell, count);
  751. return err;
  752. }
  753. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  754. const char *prop_name, int count)
  755. {
  756. const u8 *cell;
  757. int err;
  758. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  759. if (err)
  760. return NULL;
  761. return cell;
  762. }
  763. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  764. {
  765. u64 number = 0;
  766. while (cells--)
  767. number = (number << 32) | fdt32_to_cpu(*ptr++);
  768. return number;
  769. }
  770. int fdt_get_resource(const void *fdt, int node, const char *property,
  771. unsigned int index, struct fdt_resource *res)
  772. {
  773. const fdt32_t *ptr, *end;
  774. int na, ns, len, parent;
  775. unsigned int i = 0;
  776. parent = fdt_parent_offset(fdt, node);
  777. if (parent < 0)
  778. return parent;
  779. na = fdt_address_cells(fdt, parent);
  780. ns = fdt_size_cells(fdt, parent);
  781. ptr = fdt_getprop(fdt, node, property, &len);
  782. if (!ptr)
  783. return len;
  784. end = ptr + len / sizeof(*ptr);
  785. while (ptr + na + ns <= end) {
  786. if (i == index) {
  787. if (CONFIG_IS_ENABLED(OF_TRANSLATE))
  788. res->start = fdt_translate_address(fdt, node, ptr);
  789. else
  790. res->start = fdtdec_get_number(ptr, na);
  791. res->end = res->start;
  792. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  793. return 0;
  794. }
  795. ptr += na + ns;
  796. i++;
  797. }
  798. return -FDT_ERR_NOTFOUND;
  799. }
  800. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  801. const char *prop_names, const char *name,
  802. struct fdt_resource *res)
  803. {
  804. int index;
  805. index = fdt_stringlist_search(fdt, node, prop_names, name);
  806. if (index < 0)
  807. return index;
  808. return fdt_get_resource(fdt, node, property, index, res);
  809. }
  810. static int decode_timing_property(const void *blob, int node, const char *name,
  811. struct timing_entry *result)
  812. {
  813. int length, ret = 0;
  814. const u32 *prop;
  815. prop = fdt_getprop(blob, node, name, &length);
  816. if (!prop) {
  817. debug("%s: could not find property %s\n",
  818. fdt_get_name(blob, node, NULL), name);
  819. return length;
  820. }
  821. if (length == sizeof(u32)) {
  822. result->typ = fdtdec_get_int(blob, node, name, 0);
  823. result->min = result->typ;
  824. result->max = result->typ;
  825. } else {
  826. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  827. }
  828. return ret;
  829. }
  830. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  831. struct display_timing *dt)
  832. {
  833. int i, node, timings_node;
  834. u32 val = 0;
  835. int ret = 0;
  836. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  837. if (timings_node < 0)
  838. return timings_node;
  839. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  840. node > 0 && i != index;
  841. node = fdt_next_subnode(blob, node))
  842. i++;
  843. if (node < 0)
  844. return node;
  845. memset(dt, 0, sizeof(*dt));
  846. ret |= decode_timing_property(blob, node, "hback-porch",
  847. &dt->hback_porch);
  848. ret |= decode_timing_property(blob, node, "hfront-porch",
  849. &dt->hfront_porch);
  850. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  851. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  852. ret |= decode_timing_property(blob, node, "vback-porch",
  853. &dt->vback_porch);
  854. ret |= decode_timing_property(blob, node, "vfront-porch",
  855. &dt->vfront_porch);
  856. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  857. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  858. ret |= decode_timing_property(blob, node, "clock-frequency",
  859. &dt->pixelclock);
  860. dt->flags = 0;
  861. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  862. if (val != -1) {
  863. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  864. DISPLAY_FLAGS_VSYNC_LOW;
  865. }
  866. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  867. if (val != -1) {
  868. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  869. DISPLAY_FLAGS_HSYNC_LOW;
  870. }
  871. val = fdtdec_get_int(blob, node, "de-active", -1);
  872. if (val != -1) {
  873. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  874. DISPLAY_FLAGS_DE_LOW;
  875. }
  876. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  877. if (val != -1) {
  878. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  879. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  880. }
  881. if (fdtdec_get_bool(blob, node, "interlaced"))
  882. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  883. if (fdtdec_get_bool(blob, node, "doublescan"))
  884. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  885. if (fdtdec_get_bool(blob, node, "doubleclk"))
  886. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  887. return ret;
  888. }
  889. int fdtdec_setup_mem_size_base(void)
  890. {
  891. int ret;
  892. ofnode mem;
  893. struct resource res;
  894. mem = ofnode_path("/memory");
  895. if (!ofnode_valid(mem)) {
  896. debug("%s: Missing /memory node\n", __func__);
  897. return -EINVAL;
  898. }
  899. ret = ofnode_read_resource(mem, 0, &res);
  900. if (ret != 0) {
  901. debug("%s: Unable to decode first memory bank\n", __func__);
  902. return -EINVAL;
  903. }
  904. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  905. gd->ram_base = (unsigned long)res.start;
  906. debug("%s: Initial DRAM size %llx\n", __func__,
  907. (unsigned long long)gd->ram_size);
  908. return 0;
  909. }
  910. ofnode get_next_memory_node(ofnode mem)
  911. {
  912. do {
  913. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  914. } while (!ofnode_is_available(mem));
  915. return mem;
  916. }
  917. int fdtdec_setup_memory_banksize(void)
  918. {
  919. int bank, ret, reg = 0;
  920. struct resource res;
  921. ofnode mem = ofnode_null();
  922. mem = get_next_memory_node(mem);
  923. if (!ofnode_valid(mem)) {
  924. debug("%s: Missing /memory node\n", __func__);
  925. return -EINVAL;
  926. }
  927. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  928. ret = ofnode_read_resource(mem, reg++, &res);
  929. if (ret < 0) {
  930. reg = 0;
  931. mem = get_next_memory_node(mem);
  932. if (!ofnode_valid(mem))
  933. break;
  934. ret = ofnode_read_resource(mem, reg++, &res);
  935. if (ret < 0)
  936. break;
  937. }
  938. if (ret != 0)
  939. return -EINVAL;
  940. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  941. gd->bd->bi_dram[bank].size =
  942. (phys_size_t)(res.end - res.start + 1);
  943. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  944. __func__, bank,
  945. (unsigned long long)gd->bd->bi_dram[bank].start,
  946. (unsigned long long)gd->bd->bi_dram[bank].size);
  947. }
  948. return 0;
  949. }
  950. int fdtdec_setup_mem_size_base_lowest(void)
  951. {
  952. int bank, ret, reg = 0;
  953. struct resource res;
  954. unsigned long base;
  955. phys_size_t size;
  956. ofnode mem = ofnode_null();
  957. gd->ram_base = (unsigned long)~0;
  958. mem = get_next_memory_node(mem);
  959. if (!ofnode_valid(mem)) {
  960. debug("%s: Missing /memory node\n", __func__);
  961. return -EINVAL;
  962. }
  963. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  964. ret = ofnode_read_resource(mem, reg++, &res);
  965. if (ret < 0) {
  966. reg = 0;
  967. mem = get_next_memory_node(mem);
  968. if (!ofnode_valid(mem))
  969. break;
  970. ret = ofnode_read_resource(mem, reg++, &res);
  971. if (ret < 0)
  972. break;
  973. }
  974. if (ret != 0)
  975. return -EINVAL;
  976. base = (unsigned long)res.start;
  977. size = (phys_size_t)(res.end - res.start + 1);
  978. if (gd->ram_base > base && size) {
  979. gd->ram_base = base;
  980. gd->ram_size = size;
  981. debug("%s: Initial DRAM base %lx size %lx\n",
  982. __func__, base, (unsigned long)size);
  983. }
  984. }
  985. return 0;
  986. }
  987. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  988. {
  989. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  990. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  991. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  992. bool gzip = 0, lzo = 0;
  993. ulong sz_in = sz_src;
  994. void *dst;
  995. int rc;
  996. if (CONFIG_IS_ENABLED(GZIP))
  997. if (gzip_parse_header(src, sz_in) >= 0)
  998. gzip = 1;
  999. if (CONFIG_IS_ENABLED(LZO))
  1000. if (!gzip && lzop_is_valid_header(src))
  1001. lzo = 1;
  1002. if (!gzip && !lzo)
  1003. return -EBADMSG;
  1004. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1005. dst = malloc(sz_out);
  1006. if (!dst) {
  1007. puts("uncompress_blob: Unable to allocate memory\n");
  1008. return -ENOMEM;
  1009. }
  1010. } else {
  1011. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1012. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1013. # else
  1014. return -ENOTSUPP;
  1015. # endif
  1016. }
  1017. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1018. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1019. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1020. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1021. else
  1022. hang();
  1023. if (rc < 0) {
  1024. /* not a valid compressed blob */
  1025. puts("uncompress_blob: Unable to uncompress\n");
  1026. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1027. free(dst);
  1028. return -EBADMSG;
  1029. }
  1030. *dstp = dst;
  1031. #else
  1032. *dstp = (void *)src;
  1033. *dstp = (void *)src;
  1034. #endif
  1035. return 0;
  1036. }
  1037. /**
  1038. * fdt_find_separate() - Find a devicetree at the end of the image
  1039. *
  1040. * Return: pointer to FDT blob
  1041. */
  1042. static void *fdt_find_separate(void)
  1043. {
  1044. void *fdt_blob = NULL;
  1045. #ifdef CONFIG_SPL_BUILD
  1046. /* FDT is at end of BSS unless it is in a different memory region */
  1047. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1048. fdt_blob = (ulong *)&_image_binary_end;
  1049. else
  1050. fdt_blob = (ulong *)&__bss_end;
  1051. #else
  1052. /* FDT is at end of image */
  1053. fdt_blob = (ulong *)&_end;
  1054. #endif
  1055. return fdt_blob;
  1056. }
  1057. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1058. {
  1059. const char *path;
  1060. int offset, err;
  1061. if (!is_valid_ethaddr(mac))
  1062. return -EINVAL;
  1063. path = fdt_get_alias(fdt, "ethernet");
  1064. if (!path)
  1065. return 0;
  1066. debug("ethernet alias found: %s\n", path);
  1067. offset = fdt_path_offset(fdt, path);
  1068. if (offset < 0) {
  1069. debug("ethernet alias points to absent node %s\n", path);
  1070. return -ENOENT;
  1071. }
  1072. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1073. if (err < 0)
  1074. return err;
  1075. debug("MAC address: %pM\n", mac);
  1076. return 0;
  1077. }
  1078. static int fdtdec_init_reserved_memory(void *blob)
  1079. {
  1080. int na, ns, node, err;
  1081. fdt32_t value;
  1082. /* inherit #address-cells and #size-cells from the root node */
  1083. na = fdt_address_cells(blob, 0);
  1084. ns = fdt_size_cells(blob, 0);
  1085. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1086. if (node < 0)
  1087. return node;
  1088. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1089. if (err < 0)
  1090. return err;
  1091. value = cpu_to_fdt32(ns);
  1092. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1093. if (err < 0)
  1094. return err;
  1095. value = cpu_to_fdt32(na);
  1096. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1097. if (err < 0)
  1098. return err;
  1099. return node;
  1100. }
  1101. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1102. const struct fdt_memory *carveout,
  1103. const char **compatibles, unsigned int count,
  1104. uint32_t *phandlep, unsigned long flags)
  1105. {
  1106. fdt32_t cells[4] = {}, *ptr = cells;
  1107. uint32_t upper, lower, phandle;
  1108. int parent, node, na, ns, err;
  1109. fdt_size_t size;
  1110. char name[64];
  1111. /* create an empty /reserved-memory node if one doesn't exist */
  1112. parent = fdt_path_offset(blob, "/reserved-memory");
  1113. if (parent < 0) {
  1114. parent = fdtdec_init_reserved_memory(blob);
  1115. if (parent < 0)
  1116. return parent;
  1117. }
  1118. /* only 1 or 2 #address-cells and #size-cells are supported */
  1119. na = fdt_address_cells(blob, parent);
  1120. if (na < 1 || na > 2)
  1121. return -FDT_ERR_BADNCELLS;
  1122. ns = fdt_size_cells(blob, parent);
  1123. if (ns < 1 || ns > 2)
  1124. return -FDT_ERR_BADNCELLS;
  1125. /* find a matching node and return the phandle to that */
  1126. fdt_for_each_subnode(node, blob, parent) {
  1127. const char *name = fdt_get_name(blob, node, NULL);
  1128. fdt_addr_t addr;
  1129. fdt_size_t size;
  1130. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1131. &size, false);
  1132. if (addr == FDT_ADDR_T_NONE) {
  1133. debug("failed to read address/size for %s\n", name);
  1134. continue;
  1135. }
  1136. if (addr == carveout->start && (addr + size - 1) ==
  1137. carveout->end) {
  1138. if (phandlep)
  1139. *phandlep = fdt_get_phandle(blob, node);
  1140. return 0;
  1141. }
  1142. }
  1143. /*
  1144. * Unpack the start address and generate the name of the new node
  1145. * base on the basename and the unit-address.
  1146. */
  1147. upper = upper_32_bits(carveout->start);
  1148. lower = lower_32_bits(carveout->start);
  1149. if (na > 1 && upper > 0)
  1150. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1151. lower);
  1152. else {
  1153. if (upper > 0) {
  1154. debug("address %08x:%08x exceeds addressable space\n",
  1155. upper, lower);
  1156. return -FDT_ERR_BADVALUE;
  1157. }
  1158. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1159. }
  1160. node = fdt_add_subnode(blob, parent, name);
  1161. if (node < 0)
  1162. return node;
  1163. if (flags & FDTDEC_RESERVED_MEMORY_NO_MAP) {
  1164. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1165. if (err < 0)
  1166. return err;
  1167. }
  1168. if (phandlep) {
  1169. err = fdt_generate_phandle(blob, &phandle);
  1170. if (err < 0)
  1171. return err;
  1172. err = fdtdec_set_phandle(blob, node, phandle);
  1173. if (err < 0)
  1174. return err;
  1175. }
  1176. /* store one or two address cells */
  1177. if (na > 1)
  1178. *ptr++ = cpu_to_fdt32(upper);
  1179. *ptr++ = cpu_to_fdt32(lower);
  1180. /* store one or two size cells */
  1181. size = carveout->end - carveout->start + 1;
  1182. upper = upper_32_bits(size);
  1183. lower = lower_32_bits(size);
  1184. if (ns > 1)
  1185. *ptr++ = cpu_to_fdt32(upper);
  1186. *ptr++ = cpu_to_fdt32(lower);
  1187. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1188. if (err < 0)
  1189. return err;
  1190. if (compatibles && count > 0) {
  1191. size_t length = 0, len = 0;
  1192. unsigned int i;
  1193. char *buffer;
  1194. for (i = 0; i < count; i++)
  1195. length += strlen(compatibles[i]) + 1;
  1196. buffer = malloc(length);
  1197. if (!buffer)
  1198. return -FDT_ERR_INTERNAL;
  1199. for (i = 0; i < count; i++)
  1200. len += strlcpy(buffer + len, compatibles[i],
  1201. length - len) + 1;
  1202. err = fdt_setprop(blob, node, "compatible", buffer, length);
  1203. free(buffer);
  1204. if (err < 0)
  1205. return err;
  1206. }
  1207. /* return the phandle for the new node for the caller to use */
  1208. if (phandlep)
  1209. *phandlep = phandle;
  1210. return 0;
  1211. }
  1212. int fdtdec_get_carveout(const void *blob, const char *node,
  1213. const char *prop_name, unsigned int index,
  1214. struct fdt_memory *carveout, const char **name,
  1215. const char ***compatiblesp, unsigned int *countp,
  1216. unsigned long *flags)
  1217. {
  1218. const fdt32_t *prop;
  1219. uint32_t phandle;
  1220. int offset, len;
  1221. fdt_size_t size;
  1222. offset = fdt_path_offset(blob, node);
  1223. if (offset < 0)
  1224. return offset;
  1225. prop = fdt_getprop(blob, offset, prop_name, &len);
  1226. if (!prop) {
  1227. debug("failed to get %s for %s\n", prop_name, node);
  1228. return -FDT_ERR_NOTFOUND;
  1229. }
  1230. if ((len % sizeof(phandle)) != 0) {
  1231. debug("invalid phandle property\n");
  1232. return -FDT_ERR_BADPHANDLE;
  1233. }
  1234. if (len < (sizeof(phandle) * (index + 1))) {
  1235. debug("invalid phandle index\n");
  1236. return -FDT_ERR_NOTFOUND;
  1237. }
  1238. phandle = fdt32_to_cpu(prop[index]);
  1239. offset = fdt_node_offset_by_phandle(blob, phandle);
  1240. if (offset < 0) {
  1241. debug("failed to find node for phandle %u\n", phandle);
  1242. return offset;
  1243. }
  1244. if (name)
  1245. *name = fdt_get_name(blob, offset, NULL);
  1246. if (compatiblesp) {
  1247. const char **compatibles = NULL;
  1248. const char *start, *end, *ptr;
  1249. unsigned int count = 0;
  1250. prop = fdt_getprop(blob, offset, "compatible", &len);
  1251. if (!prop)
  1252. goto skip_compat;
  1253. start = ptr = (const char *)prop;
  1254. end = start + len;
  1255. while (ptr < end) {
  1256. ptr = strchrnul(ptr, '\0');
  1257. count++;
  1258. ptr++;
  1259. }
  1260. compatibles = malloc(sizeof(ptr) * count);
  1261. if (!compatibles)
  1262. return -FDT_ERR_INTERNAL;
  1263. ptr = start;
  1264. count = 0;
  1265. while (ptr < end) {
  1266. compatibles[count] = ptr;
  1267. ptr = strchrnul(ptr, '\0');
  1268. count++;
  1269. ptr++;
  1270. }
  1271. skip_compat:
  1272. *compatiblesp = compatibles;
  1273. if (countp)
  1274. *countp = count;
  1275. }
  1276. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1277. "reg", 0, &size,
  1278. true);
  1279. if (carveout->start == FDT_ADDR_T_NONE) {
  1280. debug("failed to read address/size from \"reg\" property\n");
  1281. return -FDT_ERR_NOTFOUND;
  1282. }
  1283. carveout->end = carveout->start + size - 1;
  1284. if (flags) {
  1285. *flags = 0;
  1286. if (fdtdec_get_bool(blob, offset, "no-map"))
  1287. *flags |= FDTDEC_RESERVED_MEMORY_NO_MAP;
  1288. }
  1289. return 0;
  1290. }
  1291. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1292. unsigned int index, const struct fdt_memory *carveout,
  1293. const char *name, const char **compatibles,
  1294. unsigned int count, unsigned long flags)
  1295. {
  1296. uint32_t phandle;
  1297. int err, offset, len;
  1298. fdt32_t value;
  1299. void *prop;
  1300. err = fdtdec_add_reserved_memory(blob, name, carveout, compatibles,
  1301. count, &phandle, flags);
  1302. if (err < 0) {
  1303. debug("failed to add reserved memory: %d\n", err);
  1304. return err;
  1305. }
  1306. offset = fdt_path_offset(blob, node);
  1307. if (offset < 0) {
  1308. debug("failed to find offset for node %s: %d\n", node, offset);
  1309. return offset;
  1310. }
  1311. value = cpu_to_fdt32(phandle);
  1312. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1313. if (len == -FDT_ERR_NOTFOUND)
  1314. len = 0;
  1315. else
  1316. return len;
  1317. }
  1318. if ((index + 1) * sizeof(value) > len) {
  1319. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1320. (index + 1) * sizeof(value),
  1321. &prop);
  1322. if (err < 0) {
  1323. debug("failed to resize reserved memory property: %s\n",
  1324. fdt_strerror(err));
  1325. return err;
  1326. }
  1327. }
  1328. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1329. strlen(prop_name),
  1330. index * sizeof(value),
  1331. &value, sizeof(value));
  1332. if (err < 0) {
  1333. debug("failed to update %s property for node %s: %s\n",
  1334. prop_name, node, fdt_strerror(err));
  1335. return err;
  1336. }
  1337. return 0;
  1338. }
  1339. /* TODO(sjg@chromium.org): This function should not be weak */
  1340. __weak int fdtdec_board_setup(const void *fdt_blob)
  1341. {
  1342. return 0;
  1343. }
  1344. /**
  1345. * setup_multi_dtb_fit() - locate the correct dtb from a FIT
  1346. *
  1347. * This supports the CONFIG_MULTI_DTB_FIT feature, looking for the dtb in a
  1348. * supplied FIT
  1349. *
  1350. * It accepts the current value of gd->fdt_blob, which points to the FIT, then
  1351. * updates that gd->fdt_blob, to point to the chosen dtb so that U-Boot uses the
  1352. * correct one
  1353. */
  1354. static void setup_multi_dtb_fit(void)
  1355. {
  1356. void *blob;
  1357. /*
  1358. * Try and uncompress the blob.
  1359. * Unfortunately there is no way to know how big the input blob really
  1360. * is. So let us set the maximum input size arbitrarily high. 16MB
  1361. * ought to be more than enough for packed DTBs.
  1362. */
  1363. if (uncompress_blob(gd->fdt_blob, 0x1000000, &blob) == 0)
  1364. gd->fdt_blob = blob;
  1365. /*
  1366. * Check if blob is a FIT images containings DTBs.
  1367. * If so, pick the most relevant
  1368. */
  1369. blob = locate_dtb_in_fit(gd->fdt_blob);
  1370. if (blob) {
  1371. gd_set_multi_dtb_fit(gd->fdt_blob);
  1372. gd->fdt_blob = blob;
  1373. gd->fdt_src = FDTSRC_FIT;
  1374. }
  1375. }
  1376. int fdtdec_setup(void)
  1377. {
  1378. int ret;
  1379. /* The devicetree is typically appended to U-Boot */
  1380. if (IS_ENABLED(CONFIG_OF_SEPARATE)) {
  1381. gd->fdt_blob = fdt_find_separate();
  1382. gd->fdt_src = FDTSRC_SEPARATE;
  1383. } else { /* embed dtb in ELF file for testing / development */
  1384. gd->fdt_blob = dtb_dt_embedded();
  1385. gd->fdt_src = FDTSRC_EMBED;
  1386. }
  1387. /* Allow the board to override the fdt address. */
  1388. if (IS_ENABLED(CONFIG_OF_BOARD)) {
  1389. gd->fdt_blob = board_fdt_blob_setup(&ret);
  1390. if (ret)
  1391. return ret;
  1392. gd->fdt_src = FDTSRC_BOARD;
  1393. }
  1394. /* Allow the early environment to override the fdt address */
  1395. if (!IS_ENABLED(CONFIG_SPL_BUILD)) {
  1396. ulong addr;
  1397. addr = env_get_hex("fdtcontroladdr", 0);
  1398. if (addr) {
  1399. gd->fdt_blob = map_sysmem(addr, 0);
  1400. gd->fdt_src = FDTSRC_ENV;
  1401. }
  1402. }
  1403. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT))
  1404. setup_multi_dtb_fit();
  1405. ret = fdtdec_prepare_fdt();
  1406. if (!ret)
  1407. ret = fdtdec_board_setup(gd->fdt_blob);
  1408. return ret;
  1409. }
  1410. int fdtdec_resetup(int *rescan)
  1411. {
  1412. void *fdt_blob;
  1413. /*
  1414. * If the current DTB is part of a compressed FIT image,
  1415. * try to locate the best match from the uncompressed
  1416. * FIT image stillpresent there. Save the time and space
  1417. * required to uncompress it again.
  1418. */
  1419. if (gd_multi_dtb_fit()) {
  1420. fdt_blob = locate_dtb_in_fit(gd_multi_dtb_fit());
  1421. if (fdt_blob == gd->fdt_blob) {
  1422. /*
  1423. * The best match did not change. no need to tear down
  1424. * the DM and rescan the fdt.
  1425. */
  1426. *rescan = 0;
  1427. return 0;
  1428. }
  1429. *rescan = 1;
  1430. gd->fdt_blob = fdt_blob;
  1431. return fdtdec_prepare_fdt();
  1432. }
  1433. /*
  1434. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1435. * not a FIT image containings DTB, but a single DTB. There is no need
  1436. * to teard down DM and rescan the DT in this case.
  1437. */
  1438. *rescan = 0;
  1439. return 0;
  1440. }
  1441. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1442. phys_addr_t *basep, phys_size_t *sizep,
  1443. struct bd_info *bd)
  1444. {
  1445. int addr_cells, size_cells;
  1446. const u32 *cell, *end;
  1447. u64 total_size, size, addr;
  1448. int node, child;
  1449. bool auto_size;
  1450. int bank;
  1451. int len;
  1452. debug("%s: board_id=%d\n", __func__, board_id);
  1453. if (!area)
  1454. area = "/memory";
  1455. node = fdt_path_offset(blob, area);
  1456. if (node < 0) {
  1457. debug("No %s node found\n", area);
  1458. return -ENOENT;
  1459. }
  1460. cell = fdt_getprop(blob, node, "reg", &len);
  1461. if (!cell) {
  1462. debug("No reg property found\n");
  1463. return -ENOENT;
  1464. }
  1465. addr_cells = fdt_address_cells(blob, node);
  1466. size_cells = fdt_size_cells(blob, node);
  1467. /* Check the board id and mask */
  1468. for (child = fdt_first_subnode(blob, node);
  1469. child >= 0;
  1470. child = fdt_next_subnode(blob, child)) {
  1471. int match_mask, match_value;
  1472. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1473. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1474. if (match_value >= 0 &&
  1475. ((board_id & match_mask) == match_value)) {
  1476. /* Found matching mask */
  1477. debug("Found matching mask %d\n", match_mask);
  1478. node = child;
  1479. cell = fdt_getprop(blob, node, "reg", &len);
  1480. if (!cell) {
  1481. debug("No memory-banks property found\n");
  1482. return -EINVAL;
  1483. }
  1484. break;
  1485. }
  1486. }
  1487. /* Note: if no matching subnode was found we use the parent node */
  1488. if (bd) {
  1489. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1490. CONFIG_NR_DRAM_BANKS);
  1491. }
  1492. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1493. total_size = 0;
  1494. end = cell + len / 4 - addr_cells - size_cells;
  1495. debug("cell at %p, end %p\n", cell, end);
  1496. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1497. if (cell > end)
  1498. break;
  1499. addr = 0;
  1500. if (addr_cells == 2)
  1501. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1502. addr += fdt32_to_cpu(*cell++);
  1503. if (bd)
  1504. bd->bi_dram[bank].start = addr;
  1505. if (basep && !bank)
  1506. *basep = (phys_addr_t)addr;
  1507. size = 0;
  1508. if (size_cells == 2)
  1509. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1510. size += fdt32_to_cpu(*cell++);
  1511. if (auto_size) {
  1512. u64 new_size;
  1513. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1514. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1515. if (new_size == size) {
  1516. debug("OK\n");
  1517. } else {
  1518. debug("sized to %llx\n", new_size);
  1519. size = new_size;
  1520. }
  1521. }
  1522. if (bd)
  1523. bd->bi_dram[bank].size = size;
  1524. total_size += size;
  1525. }
  1526. debug("Memory size %llu\n", total_size);
  1527. if (sizep)
  1528. *sizep = (phys_size_t)total_size;
  1529. return 0;
  1530. }
  1531. #endif /* !USE_HOSTCC */