kwbimage.h 7.7 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2008
  4. * Marvell Semiconductor <www.marvell.com>
  5. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  6. */
  7. #ifndef _KWBIMAGE_H_
  8. #define _KWBIMAGE_H_
  9. #include <compiler.h>
  10. #include <stdint.h>
  11. #ifdef __GNUC__
  12. #define __packed __attribute((packed))
  13. #else
  14. #define __packed
  15. #endif
  16. #define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
  17. #define MAX_TEMPBUF_LEN 32
  18. /* NAND ECC Mode */
  19. #define IBR_HDR_ECC_DEFAULT 0x00
  20. #define IBR_HDR_ECC_FORCED_HAMMING 0x01
  21. #define IBR_HDR_ECC_FORCED_RS 0x02
  22. #define IBR_HDR_ECC_DISABLED 0x03
  23. /* Boot Type - block ID */
  24. #define IBR_HDR_I2C_ID 0x4D
  25. #define IBR_HDR_SPI_ID 0x5A
  26. #define IBR_HDR_NAND_ID 0x8B
  27. #define IBR_HDR_SATA_ID 0x78
  28. #define IBR_HDR_PEX_ID 0x9C
  29. #define IBR_HDR_UART_ID 0x69
  30. #define IBR_HDR_SDIO_ID 0xAE
  31. #define IBR_DEF_ATTRIB 0x00
  32. /* Structure of the main header, version 0 (Kirkwood, Dove) */
  33. struct main_hdr_v0 {
  34. uint8_t blockid; /* 0x0 */
  35. uint8_t nandeccmode; /* 0x1 */
  36. uint16_t nandpagesize; /* 0x2-0x3 */
  37. uint32_t blocksize; /* 0x4-0x7 */
  38. uint8_t version; /* 0x8 */
  39. uint8_t rsvd1[3]; /* 0x9-0xB */
  40. uint32_t srcaddr; /* 0xC-0xF */
  41. uint32_t destaddr; /* 0x10-0x13 */
  42. uint32_t execaddr; /* 0x14-0x17 */
  43. uint8_t satapiomode; /* 0x18 */
  44. uint8_t rsvd3; /* 0x19 */
  45. uint16_t ddrinitdelay; /* 0x1A-0x1B */
  46. uint16_t rsvd2; /* 0x1C-0x1D */
  47. uint8_t ext; /* 0x1E */
  48. uint8_t checksum; /* 0x1F */
  49. } __packed;
  50. struct ext_hdr_v0_reg {
  51. uint32_t raddr;
  52. uint32_t rdata;
  53. } __packed;
  54. #define EXT_HDR_V0_REG_COUNT ((0x1dc - 0x20) / sizeof(struct ext_hdr_v0_reg))
  55. struct ext_hdr_v0 {
  56. uint32_t offset;
  57. uint8_t reserved[0x20 - sizeof(uint32_t)];
  58. struct ext_hdr_v0_reg rcfg[EXT_HDR_V0_REG_COUNT];
  59. uint8_t reserved2[7];
  60. uint8_t checksum;
  61. } __packed;
  62. /* Structure of the main header, version 1 (Armada 370/XP/375/38x/39x) */
  63. struct main_hdr_v1 {
  64. uint8_t blockid; /* 0x0 */
  65. uint8_t flags; /* 0x1 */
  66. uint16_t nandpagesize; /* 0x2-0x3 */
  67. uint32_t blocksize; /* 0x4-0x7 */
  68. uint8_t version; /* 0x8 */
  69. uint8_t headersz_msb; /* 0x9 */
  70. uint16_t headersz_lsb; /* 0xA-0xB */
  71. uint32_t srcaddr; /* 0xC-0xF */
  72. uint32_t destaddr; /* 0x10-0x13 */
  73. uint32_t execaddr; /* 0x14-0x17 */
  74. uint8_t options; /* 0x18 */
  75. uint8_t nandblocksize; /* 0x19 */
  76. uint8_t nandbadblklocation; /* 0x1A */
  77. uint8_t reserved4; /* 0x1B */
  78. uint16_t reserved5; /* 0x1C-0x1D */
  79. uint8_t ext; /* 0x1E */
  80. uint8_t checksum; /* 0x1F */
  81. } __packed;
  82. /*
  83. * Main header options
  84. */
  85. #define MAIN_HDR_V1_OPT_BAUD_DEFAULT 0
  86. #define MAIN_HDR_V1_OPT_BAUD_2400 0x1
  87. #define MAIN_HDR_V1_OPT_BAUD_4800 0x2
  88. #define MAIN_HDR_V1_OPT_BAUD_9600 0x3
  89. #define MAIN_HDR_V1_OPT_BAUD_19200 0x4
  90. #define MAIN_HDR_V1_OPT_BAUD_38400 0x5
  91. #define MAIN_HDR_V1_OPT_BAUD_57600 0x6
  92. #define MAIN_HDR_V1_OPT_BAUD_115200 0x7
  93. /*
  94. * Header for the optional headers, version 1 (Armada 370/XP/375/38x/39x)
  95. */
  96. struct opt_hdr_v1 {
  97. uint8_t headertype;
  98. uint8_t headersz_msb;
  99. uint16_t headersz_lsb;
  100. char data[0];
  101. } __packed;
  102. /*
  103. * Public Key data in DER format
  104. */
  105. struct pubkey_der_v1 {
  106. uint8_t key[524];
  107. } __packed;
  108. /*
  109. * Signature (RSA 2048)
  110. */
  111. struct sig_v1 {
  112. uint8_t sig[256];
  113. } __packed;
  114. /*
  115. * Structure of secure header (Armada XP/375/38x/39x)
  116. */
  117. struct secure_hdr_v1 {
  118. uint8_t headertype; /* 0x0 */
  119. uint8_t headersz_msb; /* 0x1 */
  120. uint16_t headersz_lsb; /* 0x2 - 0x3 */
  121. uint32_t reserved1; /* 0x4 - 0x7 */
  122. struct pubkey_der_v1 kak; /* 0x8 - 0x213 */
  123. uint8_t jtag_delay; /* 0x214 */
  124. uint8_t reserved2; /* 0x215 */
  125. uint16_t reserved3; /* 0x216 - 0x217 */
  126. uint32_t boxid; /* 0x218 - 0x21B */
  127. uint32_t flashid; /* 0x21C - 0x21F */
  128. struct sig_v1 hdrsig; /* 0x220 - 0x31F */
  129. struct sig_v1 imgsig; /* 0x320 - 0x41F */
  130. struct pubkey_der_v1 csk[16]; /* 0x420 - 0x24DF */
  131. struct sig_v1 csksig; /* 0x24E0 - 0x25DF */
  132. uint8_t next; /* 0x25E0 */
  133. uint8_t reserved4; /* 0x25E1 */
  134. uint16_t reserved5; /* 0x25E2 - 0x25E3 */
  135. } __packed;
  136. /*
  137. * Structure of register set
  138. */
  139. struct register_set_hdr_v1 {
  140. uint8_t headertype; /* 0x0 */
  141. uint8_t headersz_msb; /* 0x1 */
  142. uint16_t headersz_lsb; /* 0x2 - 0x3 */
  143. union {
  144. struct {
  145. uint32_t address; /* 0x4+8*N - 0x7+8*N */
  146. uint32_t value; /* 0x8+8*N - 0xB+8*N */
  147. } __packed entry;
  148. struct {
  149. uint8_t next; /* 0xC+8*N */
  150. uint8_t delay; /* 0xD+8*N */
  151. uint16_t reserved; /* 0xE+8*N - 0xF+8*N */
  152. } __packed last_entry;
  153. } data[];
  154. } __packed;
  155. /*
  156. * Value 0 in register_set_hdr_v1 delay field is special.
  157. * Instead of delay it setup SDRAM Controller.
  158. */
  159. #define REGISTER_SET_HDR_OPT_DELAY_SDRAM_SETUP 0
  160. #define REGISTER_SET_HDR_OPT_DELAY_MS(val) ((val) ?: 1)
  161. /*
  162. * Various values for the opt_hdr_v1->headertype field, describing the
  163. * different types of optional headers. The "secure" header contains
  164. * informations related to secure boot (encryption keys, etc.). The
  165. * "binary" header contains ARM binary code to be executed prior to
  166. * executing the main payload (usually the bootloader). This is
  167. * typically used to execute DDR3 training code. The "register" header
  168. * allows to describe a set of (address, value) tuples that are
  169. * generally used to configure the DRAM controller.
  170. */
  171. #define OPT_HDR_V1_SECURE_TYPE 0x1
  172. #define OPT_HDR_V1_BINARY_TYPE 0x2
  173. #define OPT_HDR_V1_REGISTER_TYPE 0x3
  174. /*
  175. * Byte 8 of the image header contains the version number. In the v0
  176. * header, byte 8 was reserved, and always set to 0. In the v1 header,
  177. * byte 8 has been changed to a proper field, set to 1.
  178. */
  179. static inline unsigned int kwbimage_version(const void *header)
  180. {
  181. const unsigned char *ptr = header;
  182. return ptr[8];
  183. }
  184. static inline size_t kwbheader_size(const void *header)
  185. {
  186. if (kwbimage_version(header) == 0) {
  187. const struct main_hdr_v0 *hdr = header;
  188. return sizeof(*hdr) +
  189. hdr->ext ? sizeof(struct ext_hdr_v0) : 0;
  190. } else {
  191. const struct main_hdr_v1 *hdr = header;
  192. return (hdr->headersz_msb << 16) |
  193. le16_to_cpu(hdr->headersz_lsb);
  194. }
  195. }
  196. static inline size_t kwbheader_size_for_csum(const void *header)
  197. {
  198. if (kwbimage_version(header) == 0)
  199. return sizeof(struct main_hdr_v0);
  200. else
  201. return kwbheader_size(header);
  202. }
  203. static inline uint32_t opt_hdr_v1_size(const struct opt_hdr_v1 *ohdr)
  204. {
  205. return (ohdr->headersz_msb << 16) | le16_to_cpu(ohdr->headersz_lsb);
  206. }
  207. static inline int opt_hdr_v1_valid_size(const struct opt_hdr_v1 *ohdr,
  208. const void *mhdr_end)
  209. {
  210. uint32_t ohdr_size;
  211. if ((const void *)(ohdr + 1) > mhdr_end)
  212. return 0;
  213. ohdr_size = opt_hdr_v1_size(ohdr);
  214. if (ohdr_size < 8 || (const void *)((const uint8_t *)ohdr + ohdr_size) > mhdr_end)
  215. return 0;
  216. return 1;
  217. }
  218. static inline struct opt_hdr_v1 *opt_hdr_v1_first(void *img) {
  219. struct main_hdr_v1 *mhdr;
  220. if (kwbimage_version(img) != 1)
  221. return NULL;
  222. mhdr = img;
  223. if (mhdr->ext)
  224. return (struct opt_hdr_v1 *)(mhdr + 1);
  225. else
  226. return NULL;
  227. }
  228. static inline uint8_t *opt_hdr_v1_ext(struct opt_hdr_v1 *cur)
  229. {
  230. uint32_t size = opt_hdr_v1_size(cur);
  231. return (uint8_t *)cur + size - 4;
  232. }
  233. static inline struct opt_hdr_v1 *_opt_hdr_v1_next(struct opt_hdr_v1 *cur)
  234. {
  235. return (struct opt_hdr_v1 *)((uint8_t *)cur + opt_hdr_v1_size(cur));
  236. }
  237. static inline struct opt_hdr_v1 *opt_hdr_v1_next(struct opt_hdr_v1 *cur)
  238. {
  239. if (*opt_hdr_v1_ext(cur))
  240. return _opt_hdr_v1_next(cur);
  241. else
  242. return NULL;
  243. }
  244. #define for_each_opt_hdr_v1(ohdr, img) \
  245. for ((ohdr) = opt_hdr_v1_first((img)); \
  246. (ohdr) != NULL; \
  247. (ohdr) = opt_hdr_v1_next((ohdr)))
  248. #endif /* _KWBIMAGE_H_ */