i2c.h 28 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. #include <linker_lists.h>
  18. /*
  19. * For now there are essentially two parts to this file - driver model
  20. * here at the top, and the older code below (with CONFIG_SYS_I2C_LEGACY being
  21. * most recent). The plan is to migrate everything to driver model.
  22. * The driver model structures and API are separate as they are different
  23. * enough as to be incompatible for compilation purposes.
  24. */
  25. enum dm_i2c_chip_flags {
  26. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  27. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  28. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  29. };
  30. /** enum i2c_speed_mode - standard I2C speed modes */
  31. enum i2c_speed_mode {
  32. IC_SPEED_MODE_STANDARD,
  33. IC_SPEED_MODE_FAST,
  34. IC_SPEED_MODE_FAST_PLUS,
  35. IC_SPEED_MODE_HIGH,
  36. IC_SPEED_MODE_FAST_ULTRA,
  37. IC_SPEED_MODE_COUNT,
  38. };
  39. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  40. enum i2c_speed_rate {
  41. I2C_SPEED_STANDARD_RATE = 100000,
  42. I2C_SPEED_FAST_RATE = 400000,
  43. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  44. I2C_SPEED_HIGH_RATE = 3400000,
  45. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  46. };
  47. /** enum i2c_address_mode - available address modes */
  48. enum i2c_address_mode {
  49. I2C_MODE_7_BIT,
  50. I2C_MODE_10_BIT
  51. };
  52. /** enum i2c_device_t - Types of I2C devices, used for compatible strings */
  53. enum i2c_device_t {
  54. I2C_DEVICE_GENERIC,
  55. I2C_DEVICE_HID_OVER_I2C,
  56. };
  57. struct udevice;
  58. /**
  59. * struct dm_i2c_chip - information about an i2c chip
  60. *
  61. * An I2C chip is a device on the I2C bus. It sits at a particular address
  62. * and normally supports 7-bit or 10-bit addressing.
  63. *
  64. * To obtain this structure, use dev_get_parent_plat(dev) where dev is
  65. * the chip to examine.
  66. *
  67. * @chip_addr: Chip address on bus
  68. * @offset_len: Length of offset in bytes. A single byte offset can
  69. * represent up to 256 bytes. A value larger than 1 may be
  70. * needed for larger devices.
  71. * @flags: Flags for this chip (dm_i2c_chip_flags)
  72. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  73. * devices which steal addresses as part of offset.
  74. * If offset_len is zero, then the offset is encoded
  75. * completely within the chip address itself.
  76. * e.g. a devce with chip address of 0x2c with 512
  77. * registers might use the bottom bit of the address
  78. * to indicate which half of the address space is being
  79. * accessed while still only using 1 byte offset.
  80. * This means it will respond to chip address 0x2c and
  81. * 0x2d.
  82. * A real world example is the Atmel AT24C04. It's
  83. * datasheet explains it's usage of this addressing
  84. * mode.
  85. * @emul: Emulator for this chip address (only used for emulation)
  86. * @emul_idx: Emulator index, used for of-platdata and set by each i2c chip's
  87. * bind() method. This allows i2c_emul_find() to work with of-platdata.
  88. */
  89. struct dm_i2c_chip {
  90. uint chip_addr;
  91. uint offset_len;
  92. uint flags;
  93. uint chip_addr_offset_mask;
  94. #ifdef CONFIG_SANDBOX
  95. struct udevice *emul;
  96. bool test_mode;
  97. int emul_idx;
  98. #endif
  99. };
  100. /**
  101. * struct dm_i2c_bus- information about an i2c bus
  102. *
  103. * An I2C bus contains 0 or more chips on it, each at its own address. The
  104. * bus can operate at different speeds (measured in Hz, typically 100KHz
  105. * or 400KHz).
  106. *
  107. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  108. * I2C bus udevice.
  109. *
  110. * @speed_hz: Bus speed in hertz (typically 100000)
  111. * @max_transaction_bytes: Maximal size of single I2C transfer
  112. */
  113. struct dm_i2c_bus {
  114. int speed_hz;
  115. int max_transaction_bytes;
  116. };
  117. /*
  118. * Not all of these flags are implemented in the U-Boot API
  119. */
  120. enum dm_i2c_msg_flags {
  121. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  122. I2C_M_RD = 0x0001, /* read data, from slave to master */
  123. I2C_M_STOP = 0x8000, /* send stop after this message */
  124. I2C_M_NOSTART = 0x4000, /* no start before this message */
  125. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  126. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  127. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  128. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  129. };
  130. /**
  131. * struct i2c_msg - an I2C message
  132. *
  133. * @addr: Slave address
  134. * @flags: Flags (see enum dm_i2c_msg_flags)
  135. * @len: Length of buffer in bytes, may be 0 for a probe
  136. * @buf: Buffer to send/receive, or NULL if no data
  137. */
  138. struct i2c_msg {
  139. uint addr;
  140. uint flags;
  141. uint len;
  142. u8 *buf;
  143. };
  144. /**
  145. * struct i2c_msg_list - a list of I2C messages
  146. *
  147. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  148. * appropriate in U-Boot.
  149. *
  150. * @msg: Pointer to i2c_msg array
  151. * @nmsgs: Number of elements in the array
  152. */
  153. struct i2c_msg_list {
  154. struct i2c_msg *msgs;
  155. uint nmsgs;
  156. };
  157. /**
  158. * dm_i2c_read() - read bytes from an I2C chip
  159. *
  160. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  161. * can use i2c_get_chip(). To obtain a bus by bus number use
  162. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  163. *
  164. * To set the address length of a devce use i2c_set_addr_len(). It
  165. * defaults to 1.
  166. *
  167. * @dev: Chip to read from
  168. * @offset: Offset within chip to start reading
  169. * @buffer: Place to put data
  170. * @len: Number of bytes to read
  171. *
  172. * Return: 0 on success, -ve on failure
  173. */
  174. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  175. /**
  176. * dm_i2c_write() - write bytes to an I2C chip
  177. *
  178. * See notes for dm_i2c_read() above.
  179. *
  180. * @dev: Chip to write to
  181. * @offset: Offset within chip to start writing
  182. * @buffer: Buffer containing data to write
  183. * @len: Number of bytes to write
  184. *
  185. * Return: 0 on success, -ve on failure
  186. */
  187. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  188. int len);
  189. /**
  190. * dm_i2c_probe() - probe a particular chip address
  191. *
  192. * This can be useful to check for the existence of a chip on the bus.
  193. * It is typically implemented by writing the chip address to the bus
  194. * and checking that the chip replies with an ACK.
  195. *
  196. * @bus: Bus to probe
  197. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  198. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  199. * @devp: Returns the device found, or NULL if none
  200. * Return: 0 if a chip was found at that address, -ve if not
  201. */
  202. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  203. struct udevice **devp);
  204. /**
  205. * dm_i2c_reg_read() - Read a value from an I2C register
  206. *
  207. * This reads a single value from the given address in an I2C chip
  208. *
  209. * @dev: Device to use for transfer
  210. * @addr: Address to read from
  211. * Return: value read, or -ve on error
  212. */
  213. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  214. /**
  215. * dm_i2c_reg_write() - Write a value to an I2C register
  216. *
  217. * This writes a single value to the given address in an I2C chip
  218. *
  219. * @dev: Device to use for transfer
  220. * @addr: Address to write to
  221. * @val: Value to write (normally a byte)
  222. * Return: 0 on success, -ve on error
  223. */
  224. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  225. /**
  226. * dm_i2c_reg_clrset() - Apply bitmask to an I2C register
  227. *
  228. * Read value, apply bitmask and write modified value back to the
  229. * given address in an I2C chip
  230. *
  231. * @dev: Device to use for transfer
  232. * @offset: Address for the R/W operation
  233. * @clr: Bitmask of bits that should be cleared
  234. * @set: Bitmask of bits that should be set
  235. * Return: 0 on success, -ve on error
  236. */
  237. int dm_i2c_reg_clrset(struct udevice *dev, uint offset, u32 clr, u32 set);
  238. /**
  239. * dm_i2c_xfer() - Transfer messages over I2C
  240. *
  241. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  242. * instead.
  243. *
  244. * @dev: Device to use for transfer
  245. * @msg: List of messages to transfer
  246. * @nmsgs: Number of messages to transfer
  247. * Return: 0 on success, -ve on error
  248. */
  249. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  250. /**
  251. * dm_i2c_set_bus_speed() - set the speed of a bus
  252. *
  253. * @bus: Bus to adjust
  254. * @speed: Requested speed in Hz
  255. * Return: 0 if OK, -EINVAL for invalid values
  256. */
  257. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  258. /**
  259. * dm_i2c_get_bus_speed() - get the speed of a bus
  260. *
  261. * @bus: Bus to check
  262. * Return: speed of selected I2C bus in Hz, -ve on error
  263. */
  264. int dm_i2c_get_bus_speed(struct udevice *bus);
  265. /**
  266. * i2c_set_chip_flags() - set flags for a chip
  267. *
  268. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  269. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  270. *
  271. * @dev: Chip to adjust
  272. * @flags: New flags
  273. * Return: 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  274. */
  275. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  276. /**
  277. * i2c_get_chip_flags() - get flags for a chip
  278. *
  279. * @dev: Chip to check
  280. * @flagsp: Place to put flags
  281. * Return: 0 if OK, other -ve value on error
  282. */
  283. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  284. /**
  285. * i2c_set_offset_len() - set the offset length for a chip
  286. *
  287. * The offset used to access a chip may be up to 4 bytes long. Typically it
  288. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  289. * registers. The default value is 1, but you can call this function to
  290. * change it.
  291. *
  292. * @offset_len: New offset length value (typically 1 or 2)
  293. */
  294. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  295. /**
  296. * i2c_get_offset_len() - get the offset length for a chip
  297. *
  298. * @return: Current offset length value (typically 1 or 2)
  299. */
  300. int i2c_get_chip_offset_len(struct udevice *dev);
  301. /**
  302. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  303. *
  304. * Some devices listen on multiple chip addresses to achieve larger offsets
  305. * than their single or multiple byte offsets would allow for. You can use this
  306. * function to set the bits that are valid to be used for offset overflow.
  307. *
  308. * @mask: The mask to be used for high offset bits within address
  309. * Return: 0 if OK, other -ve value on error
  310. */
  311. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  312. /*
  313. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  314. *
  315. * Return: current chip addr offset mask
  316. */
  317. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  318. /**
  319. * i2c_deblock() - recover a bus that is in an unknown state
  320. *
  321. * See the deblock() method in 'struct dm_i2c_ops' for full information
  322. *
  323. * @bus: Bus to recover
  324. * Return: 0 if OK, -ve on error
  325. */
  326. int i2c_deblock(struct udevice *bus);
  327. /**
  328. * i2c_deblock_gpio_loop() - recover a bus from an unknown state by toggling SDA/SCL
  329. *
  330. * This is the inner logic used for toggling I2C SDA/SCL lines as GPIOs
  331. * for deblocking the I2C bus.
  332. *
  333. * @sda_pin: SDA GPIO
  334. * @scl_pin: SCL GPIO
  335. * @scl_count: Number of SCL clock cycles generated to deblock SDA
  336. * @start_count:Number of I2C start conditions sent after deblocking SDA
  337. * @delay: Delay between SCL clock line changes
  338. * Return: 0 if OK, -ve on error
  339. */
  340. struct gpio_desc;
  341. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin, struct gpio_desc *scl_pin,
  342. unsigned int scl_count, unsigned int start_count,
  343. unsigned int delay);
  344. /**
  345. * struct dm_i2c_ops - driver operations for I2C uclass
  346. *
  347. * Drivers should support these operations unless otherwise noted. These
  348. * operations are intended to be used by uclass code, not directly from
  349. * other code.
  350. */
  351. struct dm_i2c_ops {
  352. /**
  353. * xfer() - transfer a list of I2C messages
  354. *
  355. * @bus: Bus to read from
  356. * @msg: List of messages to transfer
  357. * @nmsgs: Number of messages in the list
  358. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  359. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  360. * flags cannot be supported, other -ve value on some other error
  361. */
  362. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  363. /**
  364. * probe_chip() - probe for the presense of a chip address
  365. *
  366. * This function is optional. If omitted, the uclass will send a zero
  367. * length message instead.
  368. *
  369. * @bus: Bus to probe
  370. * @chip_addr: Chip address to probe
  371. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  372. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  373. * to default probem other -ve value on error
  374. */
  375. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  376. /**
  377. * set_bus_speed() - set the speed of a bus (optional)
  378. *
  379. * The bus speed value will be updated by the uclass if this function
  380. * does not return an error. This method is optional - if it is not
  381. * provided then the driver can read the speed from
  382. * dev_get_uclass_priv(bus)->speed_hz
  383. *
  384. * @bus: Bus to adjust
  385. * @speed: Requested speed in Hz
  386. * @return 0 if OK, -EINVAL for invalid values
  387. */
  388. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  389. /**
  390. * get_bus_speed() - get the speed of a bus (optional)
  391. *
  392. * Normally this can be provided by the uclass, but if you want your
  393. * driver to check the bus speed by looking at the hardware, you can
  394. * implement that here. This method is optional. This method would
  395. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  396. *
  397. * @bus: Bus to check
  398. * @return speed of selected I2C bus in Hz, -ve on error
  399. */
  400. int (*get_bus_speed)(struct udevice *bus);
  401. /**
  402. * set_flags() - set the flags for a chip (optional)
  403. *
  404. * This is generally implemented by the uclass, but drivers can
  405. * check the value to ensure that unsupported options are not used.
  406. * This method is optional. If provided, this method will always be
  407. * called when the flags change.
  408. *
  409. * @dev: Chip to adjust
  410. * @flags: New flags value
  411. * @return 0 if OK, -EINVAL if value is unsupported
  412. */
  413. int (*set_flags)(struct udevice *dev, uint flags);
  414. /**
  415. * deblock() - recover a bus that is in an unknown state
  416. *
  417. * I2C is a synchronous protocol and resets of the processor in the
  418. * middle of an access can block the I2C Bus until a powerdown of
  419. * the full unit is done. This is because slaves can be stuck
  420. * waiting for addition bus transitions for a transaction that will
  421. * never complete. Resetting the I2C master does not help. The only
  422. * way is to force the bus through a series of transitions to make
  423. * sure that all slaves are done with the transaction. This method
  424. * performs this 'deblocking' if support by the driver.
  425. *
  426. * This method is optional.
  427. */
  428. int (*deblock)(struct udevice *bus);
  429. };
  430. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  431. /**
  432. * struct i2c_mux_ops - operations for an I2C mux
  433. *
  434. * The current mux state is expected to be stored in the mux itself since
  435. * it is the only thing that knows how to make things work. The mux can
  436. * record the current state and then avoid switching unless it is necessary.
  437. * So select() can be skipped if the mux is already in the correct state.
  438. * Also deselect() can be made a nop if required.
  439. */
  440. struct i2c_mux_ops {
  441. /**
  442. * select() - select one of of I2C buses attached to a mux
  443. *
  444. * This will be called when there is no bus currently selected by the
  445. * mux. This method does not need to deselect the old bus since
  446. * deselect() will be already have been called if necessary.
  447. *
  448. * @mux: Mux device
  449. * @bus: I2C bus to select
  450. * @channel: Channel number correponding to the bus to select
  451. * @return 0 if OK, -ve on error
  452. */
  453. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  454. /**
  455. * deselect() - select one of of I2C buses attached to a mux
  456. *
  457. * This is used to deselect the currently selected I2C bus.
  458. *
  459. * @mux: Mux device
  460. * @bus: I2C bus to deselect
  461. * @channel: Channel number correponding to the bus to deselect
  462. * @return 0 if OK, -ve on error
  463. */
  464. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  465. };
  466. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  467. /**
  468. * i2c_get_chip() - get a device to use to access a chip on a bus
  469. *
  470. * This returns the device for the given chip address. The device can then
  471. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  472. *
  473. * @bus: Bus to examine
  474. * @chip_addr: Chip address for the new device
  475. * @offset_len: Length of a register offset in bytes (normally 1)
  476. * @devp: Returns pointer to new device if found or -ENODEV if not
  477. * found
  478. */
  479. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  480. struct udevice **devp);
  481. /**
  482. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  483. * a bus number
  484. *
  485. * This returns the device for the given chip address on a particular bus
  486. * number.
  487. *
  488. * @busnum: Bus number to examine
  489. * @chip_addr: Chip address for the new device
  490. * @offset_len: Length of a register offset in bytes (normally 1)
  491. * @devp: Returns pointer to new device if found or -ENODEV if not
  492. * found
  493. */
  494. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  495. struct udevice **devp);
  496. /**
  497. * i2c_chip_of_to_plat() - Decode standard I2C platform data
  498. *
  499. * This decodes the chip address from a device tree node and puts it into
  500. * its dm_i2c_chip structure. This should be called in your driver's
  501. * of_to_plat() method.
  502. *
  503. * @blob: Device tree blob
  504. * @node: Node offset to read from
  505. * @spi: Place to put the decoded information
  506. */
  507. int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip);
  508. /**
  509. * i2c_dump_msgs() - Dump a list of I2C messages
  510. *
  511. * This may be useful for debugging.
  512. *
  513. * @msg: Message list to dump
  514. * @nmsgs: Number of messages
  515. */
  516. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  517. /**
  518. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  519. *
  520. * This looks at the device's 'emul' phandle
  521. *
  522. * @dev: Device to find an emulator for
  523. * @emulp: Returns the associated emulator, if found *
  524. * Return: 0 if OK, -ENOENT or -ENODEV if not found
  525. */
  526. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  527. /**
  528. * i2c_emul_set_idx() - Set the emulator index for an i2c sandbox device
  529. *
  530. * With of-platdata we cannot find the emulator using the device tree, so rely
  531. * on the bind() method of each i2c driver calling this function to tell us
  532. * the of-platdata idx of the emulator
  533. *
  534. * @dev: i2c device to set the emulator for
  535. * @emul_idx: of-platdata index for that emulator
  536. */
  537. void i2c_emul_set_idx(struct udevice *dev, int emul_idx);
  538. /**
  539. * i2c_emul_get_device() - Find the device being emulated
  540. *
  541. * Given an emulator this returns the associated device
  542. *
  543. * @emul: Emulator for the device
  544. * Return: device that @emul is emulating
  545. */
  546. struct udevice *i2c_emul_get_device(struct udevice *emul);
  547. /* ACPI operations for generic I2C devices */
  548. extern struct acpi_ops i2c_acpi_ops;
  549. /**
  550. * acpi_i2c_of_to_plat() - Read properties intended for ACPI
  551. *
  552. * This reads the generic I2C properties from the device tree, so that these
  553. * can be used to create ACPI information for the device.
  554. *
  555. * See the i2c/generic-acpi.txt binding file for information about the
  556. * properties.
  557. *
  558. * @dev: I2C device to process
  559. * Return: 0 if OK, -EINVAL if acpi,hid is not present
  560. */
  561. int acpi_i2c_of_to_plat(struct udevice *dev);
  562. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  563. void i2c_early_init_f(void);
  564. #endif
  565. #if !CONFIG_IS_ENABLED(DM_I2C)
  566. /*
  567. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  568. *
  569. * The implementation MUST NOT use static or global variables if the
  570. * I2C routines are used to read SDRAM configuration information
  571. * because this is done before the memories are initialized. Limited
  572. * use of stack-based variables are OK (the initial stack size is
  573. * limited).
  574. *
  575. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  576. */
  577. /*
  578. * Configuration items.
  579. */
  580. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  581. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  582. /* no muxes used bus = i2c adapters */
  583. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  584. #define CONFIG_SYS_I2C_MAX_HOPS 0
  585. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  586. #else
  587. /* we use i2c muxes */
  588. #undef CONFIG_SYS_I2C_DIRECT_BUS
  589. #endif
  590. /* define the I2C bus number for RTC and DTT if not already done */
  591. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  592. #define CONFIG_SYS_RTC_BUS_NUM 0
  593. #endif
  594. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  595. #define CONFIG_SYS_SPD_BUS_NUM 0
  596. #endif
  597. struct i2c_adapter {
  598. void (*init)(struct i2c_adapter *adap, int speed,
  599. int slaveaddr);
  600. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  601. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  602. uint addr, int alen, uint8_t *buffer,
  603. int len);
  604. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  605. uint addr, int alen, uint8_t *buffer,
  606. int len);
  607. uint (*set_bus_speed)(struct i2c_adapter *adap,
  608. uint speed);
  609. int speed;
  610. int waitdelay;
  611. int slaveaddr;
  612. int init_done;
  613. int hwadapnr;
  614. char *name;
  615. };
  616. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  617. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  618. { \
  619. .init = _init, \
  620. .probe = _probe, \
  621. .read = _read, \
  622. .write = _write, \
  623. .set_bus_speed = _set_speed, \
  624. .speed = _speed, \
  625. .slaveaddr = _slaveaddr, \
  626. .init_done = 0, \
  627. .hwadapnr = _hwadapnr, \
  628. .name = #_name \
  629. };
  630. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  631. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  632. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  633. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  634. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  635. struct i2c_adapter *i2c_get_adapter(int index);
  636. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  637. struct i2c_mux {
  638. int id;
  639. char name[16];
  640. };
  641. struct i2c_next_hop {
  642. struct i2c_mux mux;
  643. uint8_t chip;
  644. uint8_t channel;
  645. };
  646. struct i2c_bus_hose {
  647. int adapter;
  648. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  649. };
  650. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  651. extern struct i2c_bus_hose i2c_bus[];
  652. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  653. #else
  654. #define I2C_ADAPTER(bus) bus
  655. #endif
  656. #define I2C_BUS gd->cur_i2c_bus
  657. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  658. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  659. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  660. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  661. #define I2C_MUX_PCA9540_ID 1
  662. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  663. #define I2C_MUX_PCA9542_ID 2
  664. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  665. #define I2C_MUX_PCA9544_ID 3
  666. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  667. #define I2C_MUX_PCA9547_ID 4
  668. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  669. #define I2C_MUX_PCA9548_ID 5
  670. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  671. #endif
  672. #ifndef I2C_SOFT_DECLARATIONS
  673. # if (defined(CONFIG_AT91RM9200) || \
  674. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  675. defined(CONFIG_AT91SAM9263))
  676. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  677. # else
  678. # define I2C_SOFT_DECLARATIONS
  679. # endif
  680. #endif
  681. /*
  682. * Initialization, must be called once on start up, may be called
  683. * repeatedly to change the speed and slave addresses.
  684. */
  685. void i2c_init(int speed, int slaveaddr);
  686. void i2c_init_board(void);
  687. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
  688. /*
  689. * i2c_get_bus_num:
  690. *
  691. * Returns index of currently active I2C bus. Zero-based.
  692. */
  693. unsigned int i2c_get_bus_num(void);
  694. /*
  695. * i2c_set_bus_num:
  696. *
  697. * Change the active I2C bus. Subsequent read/write calls will
  698. * go to this one.
  699. *
  700. * bus - bus index, zero based
  701. *
  702. * Returns: 0 on success, not 0 on failure
  703. *
  704. */
  705. int i2c_set_bus_num(unsigned int bus);
  706. /*
  707. * i2c_init_all():
  708. *
  709. * Initializes all I2C adapters in the system. All i2c_adap structures must
  710. * be initialized beforehead with function pointers and data, including
  711. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  712. */
  713. void i2c_init_all(void);
  714. /*
  715. * Probe the given I2C chip address. Returns 0 if a chip responded,
  716. * not 0 on failure.
  717. */
  718. int i2c_probe(uint8_t chip);
  719. /*
  720. * Read/Write interface:
  721. * chip: I2C chip address, range 0..127
  722. * addr: Memory (register) address within the chip
  723. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  724. * memories, 0 for register type devices with only one
  725. * register)
  726. * buffer: Where to read/write the data
  727. * len: How many bytes to read/write
  728. *
  729. * Returns: 0 on success, not 0 on failure
  730. */
  731. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  732. uint8_t *buffer, int len);
  733. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  734. uint8_t *buffer, int len);
  735. /*
  736. * Utility routines to read/write registers.
  737. */
  738. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  739. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  740. /*
  741. * i2c_set_bus_speed:
  742. *
  743. * Change the speed of the active I2C bus
  744. *
  745. * speed - bus speed in Hz
  746. *
  747. * Returns: new bus speed
  748. *
  749. */
  750. unsigned int i2c_set_bus_speed(unsigned int speed);
  751. /*
  752. * i2c_get_bus_speed:
  753. *
  754. * Returns speed of currently active I2C bus in Hz
  755. */
  756. unsigned int i2c_get_bus_speed(void);
  757. #else
  758. /*
  759. * Probe the given I2C chip address. Returns 0 if a chip responded,
  760. * not 0 on failure.
  761. */
  762. int i2c_probe(uchar chip);
  763. /*
  764. * Read/Write interface:
  765. * chip: I2C chip address, range 0..127
  766. * addr: Memory (register) address within the chip
  767. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  768. * memories, 0 for register type devices with only one
  769. * register)
  770. * buffer: Where to read/write the data
  771. * len: How many bytes to read/write
  772. *
  773. * Returns: 0 on success, not 0 on failure
  774. */
  775. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  776. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  777. /*
  778. * Utility routines to read/write registers.
  779. */
  780. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  781. {
  782. u8 buf;
  783. #ifdef DEBUG
  784. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  785. #endif
  786. i2c_read(addr, reg, 1, &buf, 1);
  787. return buf;
  788. }
  789. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  790. {
  791. #ifdef DEBUG
  792. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  793. __func__, addr, reg, val);
  794. #endif
  795. i2c_write(addr, reg, 1, &val, 1);
  796. }
  797. /*
  798. * Functions for setting the current I2C bus and its speed
  799. */
  800. /*
  801. * i2c_set_bus_num:
  802. *
  803. * Change the active I2C bus. Subsequent read/write calls will
  804. * go to this one.
  805. *
  806. * bus - bus index, zero based
  807. *
  808. * Returns: 0 on success, not 0 on failure
  809. *
  810. */
  811. int i2c_set_bus_num(unsigned int bus);
  812. /*
  813. * i2c_get_bus_num:
  814. *
  815. * Returns index of currently active I2C bus. Zero-based.
  816. */
  817. unsigned int i2c_get_bus_num(void);
  818. /*
  819. * i2c_set_bus_speed:
  820. *
  821. * Change the speed of the active I2C bus
  822. *
  823. * speed - bus speed in Hz
  824. *
  825. * Returns: 0 on success, not 0 on failure
  826. *
  827. */
  828. int i2c_set_bus_speed(unsigned int);
  829. /*
  830. * i2c_get_bus_speed:
  831. *
  832. * Returns speed of currently active I2C bus in Hz
  833. */
  834. unsigned int i2c_get_bus_speed(void);
  835. #endif /* CONFIG_SYS_I2C_LEGACY */
  836. /*
  837. * only for backwardcompatibility, should go away if we switched
  838. * completely to new multibus support.
  839. */
  840. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
  841. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  842. # define CONFIG_SYS_MAX_I2C_BUS 2
  843. # endif
  844. # define I2C_MULTI_BUS 1
  845. #else
  846. # define CONFIG_SYS_MAX_I2C_BUS 1
  847. # define I2C_MULTI_BUS 0
  848. #endif
  849. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  850. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  851. static inline unsigned int I2C_GET_BUS(void)
  852. {
  853. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  854. }
  855. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  856. static inline void I2C_SET_BUS(unsigned int bus)
  857. {
  858. if (I2C_MULTI_BUS)
  859. i2c_set_bus_num(bus);
  860. }
  861. /* Multi I2C definitions */
  862. enum {
  863. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  864. I2C_8, I2C_9, I2C_10,
  865. };
  866. /**
  867. * Get FDT values for i2c bus.
  868. *
  869. * @param blob Device tree blbo
  870. * Return: the number of I2C bus
  871. */
  872. void board_i2c_init(const void *blob);
  873. /**
  874. * Find the I2C bus number by given a FDT I2C node.
  875. *
  876. * @param blob Device tree blbo
  877. * @param node FDT I2C node to find
  878. * Return: the number of I2C bus (zero based), or -1 on error
  879. */
  880. int i2c_get_bus_num_fdt(int node);
  881. /**
  882. * Reset the I2C bus represented by the given a FDT I2C node.
  883. *
  884. * @param blob Device tree blbo
  885. * @param node FDT I2C node to find
  886. * Return: 0 if port was reset, -1 if not found
  887. */
  888. int i2c_reset_port_fdt(const void *blob, int node);
  889. #endif /* !CONFIG_DM_I2C */
  890. #endif /* _I2C_H_ */