i2c.c 48 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Sergey Kubushyn, himself, ksi@koi8.net
  5. *
  6. * Changes for unified multibus/multiadapter I2C support.
  7. *
  8. * (C) Copyright 2001
  9. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  10. */
  11. /*
  12. * I2C Functions similar to the standard memory functions.
  13. *
  14. * There are several parameters in many of the commands that bear further
  15. * explanations:
  16. *
  17. * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
  18. * Each I2C chip on the bus has a unique address. On the I2C data bus,
  19. * the address is the upper seven bits and the LSB is the "read/write"
  20. * bit. Note that the {i2c_chip} address specified on the command
  21. * line is not shifted up: e.g. a typical EEPROM memory chip may have
  22. * an I2C address of 0x50, but the data put on the bus will be 0xA0
  23. * for write and 0xA1 for read. This "non shifted" address notation
  24. * matches at least half of the data sheets :-/.
  25. *
  26. * {addr} is the address (or offset) within the chip. Small memory
  27. * chips have 8 bit addresses. Large memory chips have 16 bit
  28. * addresses. Other memory chips have 9, 10, or 11 bit addresses.
  29. * Many non-memory chips have multiple registers and {addr} is used
  30. * as the register index. Some non-memory chips have only one register
  31. * and therefore don't need any {addr} parameter.
  32. *
  33. * The default {addr} parameter is one byte (.1) which works well for
  34. * memories and registers with 8 bits of address space.
  35. *
  36. * You can specify the length of the {addr} field with the optional .0,
  37. * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
  38. * manipulating a single register device which doesn't use an address
  39. * field, use "0.0" for the address and the ".0" length field will
  40. * suppress the address in the I2C data stream. This also works for
  41. * successive reads using the I2C auto-incrementing memory pointer.
  42. *
  43. * If you are manipulating a large memory with 2-byte addresses, use
  44. * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
  45. *
  46. * Then there are the unfortunate memory chips that spill the most
  47. * significant 1, 2, or 3 bits of address into the chip address byte.
  48. * This effectively makes one chip (logically) look like 2, 4, or
  49. * 8 chips. This is handled (awkwardly) by #defining
  50. * CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
  51. * {addr} field (since .1 is the default, it doesn't actually have to
  52. * be specified). Examples: given a memory chip at I2C chip address
  53. * 0x50, the following would happen...
  54. * i2c md 50 0 10 display 16 bytes starting at 0x000
  55. * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
  56. * i2c md 50 100 10 display 16 bytes starting at 0x100
  57. * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
  58. * i2c md 50 210 10 display 16 bytes starting at 0x210
  59. * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
  60. * This is awfully ugly. It would be nice if someone would think up
  61. * a better way of handling this.
  62. *
  63. * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
  64. */
  65. #include <common.h>
  66. #include <bootretry.h>
  67. #include <cli.h>
  68. #include <command.h>
  69. #include <console.h>
  70. #include <dm.h>
  71. #include <edid.h>
  72. #include <errno.h>
  73. #include <i2c.h>
  74. #include <log.h>
  75. #include <malloc.h>
  76. #include <asm/byteorder.h>
  77. #include <linux/compiler.h>
  78. #include <linux/delay.h>
  79. #include <u-boot/crc.h>
  80. /* Display values from last command.
  81. * Memory modify remembered values are different from display memory.
  82. */
  83. static uint i2c_dp_last_chip;
  84. static uint i2c_dp_last_addr;
  85. static uint i2c_dp_last_alen;
  86. static uint i2c_dp_last_length = 0x10;
  87. static uint i2c_mm_last_chip;
  88. static uint i2c_mm_last_addr;
  89. static uint i2c_mm_last_alen;
  90. /* If only one I2C bus is present, the list of devices to ignore when
  91. * the probe command is issued is represented by a 1D array of addresses.
  92. * When multiple buses are present, the list is an array of bus-address
  93. * pairs. The following macros take care of this */
  94. #if defined(CONFIG_SYS_I2C_NOPROBES)
  95. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS)
  96. static struct
  97. {
  98. uchar bus;
  99. uchar addr;
  100. } i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  101. #define GET_BUS_NUM i2c_get_bus_num()
  102. #define COMPARE_BUS(b,i) (i2c_no_probes[(i)].bus == (b))
  103. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)].addr == (a))
  104. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)].addr
  105. #else /* single bus */
  106. static uchar i2c_no_probes[] = CONFIG_SYS_I2C_NOPROBES;
  107. #define GET_BUS_NUM 0
  108. #define COMPARE_BUS(b,i) ((b) == 0) /* Make compiler happy */
  109. #define COMPARE_ADDR(a,i) (i2c_no_probes[(i)] == (a))
  110. #define NO_PROBE_ADDR(i) i2c_no_probes[(i)]
  111. #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
  112. #endif
  113. #define DISP_LINE_LEN 16
  114. /*
  115. * Default for driver model is to use the chip's existing address length.
  116. * For legacy code, this is not stored, so we need to use a suitable
  117. * default.
  118. */
  119. #if CONFIG_IS_ENABLED(DM_I2C)
  120. #define DEFAULT_ADDR_LEN (-1)
  121. #else
  122. #define DEFAULT_ADDR_LEN 1
  123. #endif
  124. #if CONFIG_IS_ENABLED(DM_I2C)
  125. static struct udevice *i2c_cur_bus;
  126. static int cmd_i2c_set_bus_num(unsigned int busnum)
  127. {
  128. struct udevice *bus;
  129. int ret;
  130. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  131. if (ret) {
  132. debug("%s: No bus %d\n", __func__, busnum);
  133. return ret;
  134. }
  135. i2c_cur_bus = bus;
  136. return 0;
  137. }
  138. static int i2c_get_cur_bus(struct udevice **busp)
  139. {
  140. #ifdef CONFIG_I2C_SET_DEFAULT_BUS_NUM
  141. if (!i2c_cur_bus) {
  142. if (cmd_i2c_set_bus_num(CONFIG_I2C_DEFAULT_BUS_NUMBER)) {
  143. printf("Default I2C bus %d not found\n",
  144. CONFIG_I2C_DEFAULT_BUS_NUMBER);
  145. return -ENODEV;
  146. }
  147. }
  148. #endif
  149. if (!i2c_cur_bus) {
  150. puts("No I2C bus selected\n");
  151. return -ENODEV;
  152. }
  153. *busp = i2c_cur_bus;
  154. return 0;
  155. }
  156. static int i2c_get_cur_bus_chip(uint chip_addr, struct udevice **devp)
  157. {
  158. struct udevice *bus;
  159. int ret;
  160. ret = i2c_get_cur_bus(&bus);
  161. if (ret)
  162. return ret;
  163. return i2c_get_chip(bus, chip_addr, 1, devp);
  164. }
  165. #endif
  166. /**
  167. * i2c_init_board() - Board-specific I2C bus init
  168. *
  169. * This function is the default no-op implementation of I2C bus
  170. * initialization. This function can be overridden by board-specific
  171. * implementation if needed.
  172. */
  173. __weak
  174. void i2c_init_board(void)
  175. {
  176. }
  177. /**
  178. * get_alen() - Small parser helper function to get address length
  179. *
  180. * Returns the address length.
  181. */
  182. static uint get_alen(char *arg, int default_len)
  183. {
  184. int j;
  185. int alen;
  186. alen = default_len;
  187. for (j = 0; j < 8; j++) {
  188. if (arg[j] == '.') {
  189. alen = arg[j+1] - '0';
  190. break;
  191. } else if (arg[j] == '\0')
  192. break;
  193. }
  194. return alen;
  195. }
  196. enum i2c_err_op {
  197. I2C_ERR_READ,
  198. I2C_ERR_WRITE,
  199. };
  200. static int i2c_report_err(int ret, enum i2c_err_op op)
  201. {
  202. printf("Error %s the chip: %d\n",
  203. op == I2C_ERR_READ ? "reading" : "writing", ret);
  204. return CMD_RET_FAILURE;
  205. }
  206. /**
  207. * do_i2c_read() - Handle the "i2c read" command-line command
  208. * @cmdtp: Command data struct pointer
  209. * @flag: Command flag
  210. * @argc: Command-line argument count
  211. * @argv: Array of command-line arguments
  212. *
  213. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  214. * on error.
  215. *
  216. * Syntax:
  217. * i2c read {i2c_chip} {devaddr}{.0, .1, .2} {len} {memaddr}
  218. */
  219. static int do_i2c_read(struct cmd_tbl *cmdtp, int flag, int argc,
  220. char *const argv[])
  221. {
  222. uint chip;
  223. uint devaddr, length;
  224. int alen;
  225. u_char *memaddr;
  226. int ret;
  227. #if CONFIG_IS_ENABLED(DM_I2C)
  228. struct udevice *dev;
  229. #endif
  230. if (argc != 5)
  231. return CMD_RET_USAGE;
  232. /*
  233. * I2C chip address
  234. */
  235. chip = hextoul(argv[1], NULL);
  236. /*
  237. * I2C data address within the chip. This can be 1 or
  238. * 2 bytes long. Some day it might be 3 bytes long :-).
  239. */
  240. devaddr = hextoul(argv[2], NULL);
  241. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  242. if (alen > 3)
  243. return CMD_RET_USAGE;
  244. /*
  245. * Length is the number of objects, not number of bytes.
  246. */
  247. length = hextoul(argv[3], NULL);
  248. /*
  249. * memaddr is the address where to store things in memory
  250. */
  251. memaddr = (u_char *)hextoul(argv[4], NULL);
  252. #if CONFIG_IS_ENABLED(DM_I2C)
  253. ret = i2c_get_cur_bus_chip(chip, &dev);
  254. if (!ret && alen != -1)
  255. ret = i2c_set_chip_offset_len(dev, alen);
  256. if (!ret)
  257. ret = dm_i2c_read(dev, devaddr, memaddr, length);
  258. #else
  259. ret = i2c_read(chip, devaddr, alen, memaddr, length);
  260. #endif
  261. if (ret)
  262. return i2c_report_err(ret, I2C_ERR_READ);
  263. return 0;
  264. }
  265. static int do_i2c_write(struct cmd_tbl *cmdtp, int flag, int argc,
  266. char *const argv[])
  267. {
  268. uint chip;
  269. uint devaddr, length;
  270. int alen;
  271. u_char *memaddr;
  272. int ret;
  273. #if CONFIG_IS_ENABLED(DM_I2C)
  274. struct udevice *dev;
  275. struct dm_i2c_chip *i2c_chip;
  276. #endif
  277. if ((argc < 5) || (argc > 6))
  278. return cmd_usage(cmdtp);
  279. /*
  280. * memaddr is the address where to store things in memory
  281. */
  282. memaddr = (u_char *)hextoul(argv[1], NULL);
  283. /*
  284. * I2C chip address
  285. */
  286. chip = hextoul(argv[2], NULL);
  287. /*
  288. * I2C data address within the chip. This can be 1 or
  289. * 2 bytes long. Some day it might be 3 bytes long :-).
  290. */
  291. devaddr = hextoul(argv[3], NULL);
  292. alen = get_alen(argv[3], DEFAULT_ADDR_LEN);
  293. if (alen > 3)
  294. return cmd_usage(cmdtp);
  295. /*
  296. * Length is the number of bytes.
  297. */
  298. length = hextoul(argv[4], NULL);
  299. #if CONFIG_IS_ENABLED(DM_I2C)
  300. ret = i2c_get_cur_bus_chip(chip, &dev);
  301. if (!ret && alen != -1)
  302. ret = i2c_set_chip_offset_len(dev, alen);
  303. if (ret)
  304. return i2c_report_err(ret, I2C_ERR_WRITE);
  305. i2c_chip = dev_get_parent_plat(dev);
  306. if (!i2c_chip)
  307. return i2c_report_err(ret, I2C_ERR_WRITE);
  308. #endif
  309. if (argc == 6 && !strcmp(argv[5], "-s")) {
  310. /*
  311. * Write all bytes in a single I2C transaction. If the target
  312. * device is an EEPROM, it is your responsibility to not cross
  313. * a page boundary. No write delay upon completion, take this
  314. * into account if linking commands.
  315. */
  316. #if CONFIG_IS_ENABLED(DM_I2C)
  317. i2c_chip->flags &= ~DM_I2C_CHIP_WR_ADDRESS;
  318. ret = dm_i2c_write(dev, devaddr, memaddr, length);
  319. #else
  320. ret = i2c_write(chip, devaddr, alen, memaddr, length);
  321. #endif
  322. if (ret)
  323. return i2c_report_err(ret, I2C_ERR_WRITE);
  324. } else {
  325. /*
  326. * Repeated addressing - perform <length> separate
  327. * write transactions of one byte each
  328. */
  329. while (length-- > 0) {
  330. #if CONFIG_IS_ENABLED(DM_I2C)
  331. i2c_chip->flags |= DM_I2C_CHIP_WR_ADDRESS;
  332. ret = dm_i2c_write(dev, devaddr++, memaddr++, 1);
  333. #else
  334. ret = i2c_write(chip, devaddr++, alen, memaddr++, 1);
  335. #endif
  336. if (ret)
  337. return i2c_report_err(ret, I2C_ERR_WRITE);
  338. /*
  339. * No write delay with FRAM devices.
  340. */
  341. #if !defined(CONFIG_SYS_I2C_FRAM)
  342. udelay(11000);
  343. #endif
  344. }
  345. }
  346. return 0;
  347. }
  348. #if CONFIG_IS_ENABLED(DM_I2C)
  349. static int do_i2c_flags(struct cmd_tbl *cmdtp, int flag, int argc,
  350. char *const argv[])
  351. {
  352. struct udevice *dev;
  353. uint flags;
  354. int chip;
  355. int ret;
  356. if (argc < 2)
  357. return CMD_RET_USAGE;
  358. chip = hextoul(argv[1], NULL);
  359. ret = i2c_get_cur_bus_chip(chip, &dev);
  360. if (ret)
  361. return i2c_report_err(ret, I2C_ERR_READ);
  362. if (argc > 2) {
  363. flags = hextoul(argv[2], NULL);
  364. ret = i2c_set_chip_flags(dev, flags);
  365. } else {
  366. ret = i2c_get_chip_flags(dev, &flags);
  367. if (!ret)
  368. printf("%x\n", flags);
  369. }
  370. if (ret)
  371. return i2c_report_err(ret, I2C_ERR_READ);
  372. return 0;
  373. }
  374. static int do_i2c_olen(struct cmd_tbl *cmdtp, int flag, int argc,
  375. char *const argv[])
  376. {
  377. struct udevice *dev;
  378. uint olen;
  379. int chip;
  380. int ret;
  381. if (argc < 2)
  382. return CMD_RET_USAGE;
  383. chip = hextoul(argv[1], NULL);
  384. ret = i2c_get_cur_bus_chip(chip, &dev);
  385. if (ret)
  386. return i2c_report_err(ret, I2C_ERR_READ);
  387. if (argc > 2) {
  388. olen = hextoul(argv[2], NULL);
  389. ret = i2c_set_chip_offset_len(dev, olen);
  390. } else {
  391. ret = i2c_get_chip_offset_len(dev);
  392. if (ret >= 0) {
  393. printf("%x\n", ret);
  394. ret = 0;
  395. }
  396. }
  397. if (ret)
  398. return i2c_report_err(ret, I2C_ERR_READ);
  399. return 0;
  400. }
  401. #endif
  402. /**
  403. * do_i2c_md() - Handle the "i2c md" command-line command
  404. * @cmdtp: Command data struct pointer
  405. * @flag: Command flag
  406. * @argc: Command-line argument count
  407. * @argv: Array of command-line arguments
  408. *
  409. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  410. * on error.
  411. *
  412. * Syntax:
  413. * i2c md {i2c_chip} {addr}{.0, .1, .2} {len}
  414. */
  415. static int do_i2c_md(struct cmd_tbl *cmdtp, int flag, int argc,
  416. char *const argv[])
  417. {
  418. uint chip;
  419. uint addr, length;
  420. int alen;
  421. int j, nbytes, linebytes;
  422. int ret;
  423. #if CONFIG_IS_ENABLED(DM_I2C)
  424. struct udevice *dev;
  425. #endif
  426. /* We use the last specified parameters, unless new ones are
  427. * entered.
  428. */
  429. chip = i2c_dp_last_chip;
  430. addr = i2c_dp_last_addr;
  431. alen = i2c_dp_last_alen;
  432. length = i2c_dp_last_length;
  433. if (argc < 3)
  434. return CMD_RET_USAGE;
  435. if ((flag & CMD_FLAG_REPEAT) == 0) {
  436. /*
  437. * New command specified.
  438. */
  439. /*
  440. * I2C chip address
  441. */
  442. chip = hextoul(argv[1], NULL);
  443. /*
  444. * I2C data address within the chip. This can be 1 or
  445. * 2 bytes long. Some day it might be 3 bytes long :-).
  446. */
  447. addr = hextoul(argv[2], NULL);
  448. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  449. if (alen > 3)
  450. return CMD_RET_USAGE;
  451. /*
  452. * If another parameter, it is the length to display.
  453. * Length is the number of objects, not number of bytes.
  454. */
  455. if (argc > 3)
  456. length = hextoul(argv[3], NULL);
  457. }
  458. #if CONFIG_IS_ENABLED(DM_I2C)
  459. ret = i2c_get_cur_bus_chip(chip, &dev);
  460. if (!ret && alen != -1)
  461. ret = i2c_set_chip_offset_len(dev, alen);
  462. if (ret)
  463. return i2c_report_err(ret, I2C_ERR_READ);
  464. #endif
  465. /*
  466. * Print the lines.
  467. *
  468. * We buffer all read data, so we can make sure data is read only
  469. * once.
  470. */
  471. nbytes = length;
  472. do {
  473. unsigned char linebuf[DISP_LINE_LEN];
  474. unsigned char *cp;
  475. linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
  476. #if CONFIG_IS_ENABLED(DM_I2C)
  477. ret = dm_i2c_read(dev, addr, linebuf, linebytes);
  478. #else
  479. ret = i2c_read(chip, addr, alen, linebuf, linebytes);
  480. #endif
  481. if (ret)
  482. return i2c_report_err(ret, I2C_ERR_READ);
  483. else {
  484. printf("%04x:", addr);
  485. cp = linebuf;
  486. for (j=0; j<linebytes; j++) {
  487. printf(" %02x", *cp++);
  488. addr++;
  489. }
  490. puts (" ");
  491. cp = linebuf;
  492. for (j=0; j<linebytes; j++) {
  493. if ((*cp < 0x20) || (*cp > 0x7e))
  494. puts (".");
  495. else
  496. printf("%c", *cp);
  497. cp++;
  498. }
  499. putc ('\n');
  500. }
  501. nbytes -= linebytes;
  502. } while (nbytes > 0);
  503. i2c_dp_last_chip = chip;
  504. i2c_dp_last_addr = addr;
  505. i2c_dp_last_alen = alen;
  506. i2c_dp_last_length = length;
  507. return 0;
  508. }
  509. /**
  510. * do_i2c_mw() - Handle the "i2c mw" command-line command
  511. * @cmdtp: Command data struct pointer
  512. * @flag: Command flag
  513. * @argc: Command-line argument count
  514. * @argv: Array of command-line arguments
  515. *
  516. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  517. * on error.
  518. *
  519. * Syntax:
  520. * i2c mw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
  521. */
  522. static int do_i2c_mw(struct cmd_tbl *cmdtp, int flag, int argc,
  523. char *const argv[])
  524. {
  525. uint chip;
  526. ulong addr;
  527. int alen;
  528. uchar byte;
  529. int count;
  530. int ret;
  531. #if CONFIG_IS_ENABLED(DM_I2C)
  532. struct udevice *dev;
  533. #endif
  534. if ((argc < 4) || (argc > 5))
  535. return CMD_RET_USAGE;
  536. /*
  537. * Chip is always specified.
  538. */
  539. chip = hextoul(argv[1], NULL);
  540. /*
  541. * Address is always specified.
  542. */
  543. addr = hextoul(argv[2], NULL);
  544. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  545. if (alen > 3)
  546. return CMD_RET_USAGE;
  547. #if CONFIG_IS_ENABLED(DM_I2C)
  548. ret = i2c_get_cur_bus_chip(chip, &dev);
  549. if (!ret && alen != -1)
  550. ret = i2c_set_chip_offset_len(dev, alen);
  551. if (ret)
  552. return i2c_report_err(ret, I2C_ERR_WRITE);
  553. #endif
  554. /*
  555. * Value to write is always specified.
  556. */
  557. byte = hextoul(argv[3], NULL);
  558. /*
  559. * Optional count
  560. */
  561. if (argc == 5)
  562. count = hextoul(argv[4], NULL);
  563. else
  564. count = 1;
  565. while (count-- > 0) {
  566. #if CONFIG_IS_ENABLED(DM_I2C)
  567. ret = dm_i2c_write(dev, addr++, &byte, 1);
  568. #else
  569. ret = i2c_write(chip, addr++, alen, &byte, 1);
  570. #endif
  571. if (ret)
  572. return i2c_report_err(ret, I2C_ERR_WRITE);
  573. /*
  574. * Wait for the write to complete. The write can take
  575. * up to 10mSec (we allow a little more time).
  576. */
  577. /*
  578. * No write delay with FRAM devices.
  579. */
  580. #if !defined(CONFIG_SYS_I2C_FRAM)
  581. udelay(11000);
  582. #endif
  583. }
  584. return 0;
  585. }
  586. /**
  587. * do_i2c_crc() - Handle the "i2c crc32" command-line command
  588. * @cmdtp: Command data struct pointer
  589. * @flag: Command flag
  590. * @argc: Command-line argument count
  591. * @argv: Array of command-line arguments
  592. *
  593. * Calculate a CRC on memory
  594. *
  595. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  596. * on error.
  597. *
  598. * Syntax:
  599. * i2c crc32 {i2c_chip} {addr}{.0, .1, .2} {count}
  600. */
  601. static int do_i2c_crc(struct cmd_tbl *cmdtp, int flag, int argc,
  602. char *const argv[])
  603. {
  604. uint chip;
  605. ulong addr;
  606. int alen;
  607. int count;
  608. uchar byte;
  609. ulong crc;
  610. ulong err;
  611. int ret = 0;
  612. #if CONFIG_IS_ENABLED(DM_I2C)
  613. struct udevice *dev;
  614. #endif
  615. if (argc < 4)
  616. return CMD_RET_USAGE;
  617. /*
  618. * Chip is always specified.
  619. */
  620. chip = hextoul(argv[1], NULL);
  621. /*
  622. * Address is always specified.
  623. */
  624. addr = hextoul(argv[2], NULL);
  625. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  626. if (alen > 3)
  627. return CMD_RET_USAGE;
  628. #if CONFIG_IS_ENABLED(DM_I2C)
  629. ret = i2c_get_cur_bus_chip(chip, &dev);
  630. if (!ret && alen != -1)
  631. ret = i2c_set_chip_offset_len(dev, alen);
  632. if (ret)
  633. return i2c_report_err(ret, I2C_ERR_READ);
  634. #endif
  635. /*
  636. * Count is always specified
  637. */
  638. count = hextoul(argv[3], NULL);
  639. printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
  640. /*
  641. * CRC a byte at a time. This is going to be slooow, but hey, the
  642. * memories are small and slow too so hopefully nobody notices.
  643. */
  644. crc = 0;
  645. err = 0;
  646. while (count-- > 0) {
  647. #if CONFIG_IS_ENABLED(DM_I2C)
  648. ret = dm_i2c_read(dev, addr, &byte, 1);
  649. #else
  650. ret = i2c_read(chip, addr, alen, &byte, 1);
  651. #endif
  652. if (ret)
  653. err++;
  654. crc = crc32(crc, &byte, 1);
  655. addr++;
  656. }
  657. if (err > 0)
  658. i2c_report_err(ret, I2C_ERR_READ);
  659. else
  660. printf ("%08lx\n", crc);
  661. return 0;
  662. }
  663. /**
  664. * mod_i2c_mem() - Handle the "i2c mm" and "i2c nm" command-line command
  665. * @cmdtp: Command data struct pointer
  666. * @flag: Command flag
  667. * @argc: Command-line argument count
  668. * @argv: Array of command-line arguments
  669. *
  670. * Modify memory.
  671. *
  672. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  673. * on error.
  674. *
  675. * Syntax:
  676. * i2c mm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  677. * i2c nm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
  678. */
  679. static int mod_i2c_mem(struct cmd_tbl *cmdtp, int incrflag, int flag, int argc,
  680. char *const argv[])
  681. {
  682. uint chip;
  683. ulong addr;
  684. int alen;
  685. ulong data;
  686. int size = 1;
  687. int nbytes;
  688. int ret;
  689. #if CONFIG_IS_ENABLED(DM_I2C)
  690. struct udevice *dev;
  691. #endif
  692. if (argc != 3)
  693. return CMD_RET_USAGE;
  694. bootretry_reset_cmd_timeout(); /* got a good command to get here */
  695. /*
  696. * We use the last specified parameters, unless new ones are
  697. * entered.
  698. */
  699. chip = i2c_mm_last_chip;
  700. addr = i2c_mm_last_addr;
  701. alen = i2c_mm_last_alen;
  702. if ((flag & CMD_FLAG_REPEAT) == 0) {
  703. /*
  704. * New command specified. Check for a size specification.
  705. * Defaults to byte if no or incorrect specification.
  706. */
  707. size = cmd_get_data_size(argv[0], 1);
  708. /*
  709. * Chip is always specified.
  710. */
  711. chip = hextoul(argv[1], NULL);
  712. /*
  713. * Address is always specified.
  714. */
  715. addr = hextoul(argv[2], NULL);
  716. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  717. if (alen > 3)
  718. return CMD_RET_USAGE;
  719. }
  720. #if CONFIG_IS_ENABLED(DM_I2C)
  721. ret = i2c_get_cur_bus_chip(chip, &dev);
  722. if (!ret && alen != -1)
  723. ret = i2c_set_chip_offset_len(dev, alen);
  724. if (ret)
  725. return i2c_report_err(ret, I2C_ERR_WRITE);
  726. #endif
  727. /*
  728. * Print the address, followed by value. Then accept input for
  729. * the next value. A non-converted value exits.
  730. */
  731. do {
  732. printf("%08lx:", addr);
  733. #if CONFIG_IS_ENABLED(DM_I2C)
  734. ret = dm_i2c_read(dev, addr, (uchar *)&data, size);
  735. #else
  736. ret = i2c_read(chip, addr, alen, (uchar *)&data, size);
  737. #endif
  738. if (ret)
  739. return i2c_report_err(ret, I2C_ERR_READ);
  740. data = cpu_to_be32(data);
  741. if (size == 1)
  742. printf(" %02lx", (data >> 24) & 0x000000FF);
  743. else if (size == 2)
  744. printf(" %04lx", (data >> 16) & 0x0000FFFF);
  745. else
  746. printf(" %08lx", data);
  747. nbytes = cli_readline(" ? ");
  748. if (nbytes == 0) {
  749. /*
  750. * <CR> pressed as only input, don't modify current
  751. * location and move to next.
  752. */
  753. if (incrflag)
  754. addr += size;
  755. nbytes = size;
  756. /* good enough to not time out */
  757. bootretry_reset_cmd_timeout();
  758. }
  759. #ifdef CONFIG_BOOT_RETRY_TIME
  760. else if (nbytes == -2)
  761. break; /* timed out, exit the command */
  762. #endif
  763. else {
  764. char *endp;
  765. data = hextoul(console_buffer, &endp);
  766. if (size == 1)
  767. data = data << 24;
  768. else if (size == 2)
  769. data = data << 16;
  770. data = be32_to_cpu(data);
  771. nbytes = endp - console_buffer;
  772. if (nbytes) {
  773. /*
  774. * good enough to not time out
  775. */
  776. bootretry_reset_cmd_timeout();
  777. #if CONFIG_IS_ENABLED(DM_I2C)
  778. ret = dm_i2c_write(dev, addr, (uchar *)&data,
  779. size);
  780. #else
  781. ret = i2c_write(chip, addr, alen,
  782. (uchar *)&data, size);
  783. #endif
  784. if (ret)
  785. return i2c_report_err(ret,
  786. I2C_ERR_WRITE);
  787. #if CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS > 0
  788. udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
  789. #endif
  790. if (incrflag)
  791. addr += size;
  792. }
  793. }
  794. } while (nbytes);
  795. i2c_mm_last_chip = chip;
  796. i2c_mm_last_addr = addr;
  797. i2c_mm_last_alen = alen;
  798. return 0;
  799. }
  800. /**
  801. * do_i2c_probe() - Handle the "i2c probe" command-line command
  802. * @cmdtp: Command data struct pointer
  803. * @flag: Command flag
  804. * @argc: Command-line argument count
  805. * @argv: Array of command-line arguments
  806. *
  807. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  808. * on error.
  809. *
  810. * Syntax:
  811. * i2c probe {addr}
  812. *
  813. * Returns zero (success) if one or more I2C devices was found
  814. */
  815. static int do_i2c_probe(struct cmd_tbl *cmdtp, int flag, int argc,
  816. char *const argv[])
  817. {
  818. int j;
  819. int addr = -1;
  820. int found = 0;
  821. #if defined(CONFIG_SYS_I2C_NOPROBES)
  822. int k, skip;
  823. unsigned int bus = GET_BUS_NUM;
  824. #endif /* NOPROBES */
  825. int ret;
  826. #if CONFIG_IS_ENABLED(DM_I2C)
  827. struct udevice *bus, *dev;
  828. if (i2c_get_cur_bus(&bus))
  829. return CMD_RET_FAILURE;
  830. #endif
  831. if (argc == 2)
  832. addr = simple_strtol(argv[1], 0, 16);
  833. puts ("Valid chip addresses:");
  834. for (j = 0; j < 128; j++) {
  835. if ((0 <= addr) && (j != addr))
  836. continue;
  837. #if defined(CONFIG_SYS_I2C_NOPROBES)
  838. skip = 0;
  839. for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
  840. if (COMPARE_BUS(bus, k) && COMPARE_ADDR(j, k)) {
  841. skip = 1;
  842. break;
  843. }
  844. }
  845. if (skip)
  846. continue;
  847. #endif
  848. #if CONFIG_IS_ENABLED(DM_I2C)
  849. ret = dm_i2c_probe(bus, j, 0, &dev);
  850. #else
  851. ret = i2c_probe(j);
  852. #endif
  853. if (ret == 0) {
  854. printf(" %02X", j);
  855. found++;
  856. }
  857. }
  858. putc ('\n');
  859. #if defined(CONFIG_SYS_I2C_NOPROBES)
  860. puts ("Excluded chip addresses:");
  861. for (k = 0; k < ARRAY_SIZE(i2c_no_probes); k++) {
  862. if (COMPARE_BUS(bus,k))
  863. printf(" %02X", NO_PROBE_ADDR(k));
  864. }
  865. putc ('\n');
  866. #endif
  867. return (0 == found);
  868. }
  869. /**
  870. * do_i2c_loop() - Handle the "i2c loop" command-line command
  871. * @cmdtp: Command data struct pointer
  872. * @flag: Command flag
  873. * @argc: Command-line argument count
  874. * @argv: Array of command-line arguments
  875. *
  876. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  877. * on error.
  878. *
  879. * Syntax:
  880. * i2c loop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
  881. * {length} - Number of bytes to read
  882. * {delay} - A DECIMAL number and defaults to 1000 uSec
  883. */
  884. static int do_i2c_loop(struct cmd_tbl *cmdtp, int flag, int argc,
  885. char *const argv[])
  886. {
  887. uint chip;
  888. int alen;
  889. uint addr;
  890. uint length;
  891. u_char bytes[16];
  892. int delay;
  893. int ret;
  894. #if CONFIG_IS_ENABLED(DM_I2C)
  895. struct udevice *dev;
  896. #endif
  897. if (argc < 3)
  898. return CMD_RET_USAGE;
  899. /*
  900. * Chip is always specified.
  901. */
  902. chip = hextoul(argv[1], NULL);
  903. /*
  904. * Address is always specified.
  905. */
  906. addr = hextoul(argv[2], NULL);
  907. alen = get_alen(argv[2], DEFAULT_ADDR_LEN);
  908. if (alen > 3)
  909. return CMD_RET_USAGE;
  910. #if CONFIG_IS_ENABLED(DM_I2C)
  911. ret = i2c_get_cur_bus_chip(chip, &dev);
  912. if (!ret && alen != -1)
  913. ret = i2c_set_chip_offset_len(dev, alen);
  914. if (ret)
  915. return i2c_report_err(ret, I2C_ERR_WRITE);
  916. #endif
  917. /*
  918. * Length is the number of objects, not number of bytes.
  919. */
  920. length = 1;
  921. length = hextoul(argv[3], NULL);
  922. if (length > sizeof(bytes))
  923. length = sizeof(bytes);
  924. /*
  925. * The delay time (uSec) is optional.
  926. */
  927. delay = 1000;
  928. if (argc > 3)
  929. delay = dectoul(argv[4], NULL);
  930. /*
  931. * Run the loop...
  932. */
  933. while (1) {
  934. #if CONFIG_IS_ENABLED(DM_I2C)
  935. ret = dm_i2c_read(dev, addr, bytes, length);
  936. #else
  937. ret = i2c_read(chip, addr, alen, bytes, length);
  938. #endif
  939. if (ret)
  940. i2c_report_err(ret, I2C_ERR_READ);
  941. udelay(delay);
  942. }
  943. /* NOTREACHED */
  944. return 0;
  945. }
  946. /*
  947. * The SDRAM command is separately configured because many
  948. * (most?) embedded boards don't use SDRAM DIMMs.
  949. *
  950. * FIXME: Document and probably move elsewhere!
  951. */
  952. #if defined(CONFIG_CMD_SDRAM)
  953. static void print_ddr2_tcyc (u_char const b)
  954. {
  955. printf ("%d.", (b >> 4) & 0x0F);
  956. switch (b & 0x0F) {
  957. case 0x0:
  958. case 0x1:
  959. case 0x2:
  960. case 0x3:
  961. case 0x4:
  962. case 0x5:
  963. case 0x6:
  964. case 0x7:
  965. case 0x8:
  966. case 0x9:
  967. printf ("%d ns\n", b & 0x0F);
  968. break;
  969. case 0xA:
  970. puts ("25 ns\n");
  971. break;
  972. case 0xB:
  973. puts ("33 ns\n");
  974. break;
  975. case 0xC:
  976. puts ("66 ns\n");
  977. break;
  978. case 0xD:
  979. puts ("75 ns\n");
  980. break;
  981. default:
  982. puts ("?? ns\n");
  983. break;
  984. }
  985. }
  986. static void decode_bits (u_char const b, char const *str[], int const do_once)
  987. {
  988. u_char mask;
  989. for (mask = 0x80; mask != 0x00; mask >>= 1, ++str) {
  990. if (b & mask) {
  991. puts (*str);
  992. if (do_once)
  993. return;
  994. }
  995. }
  996. }
  997. /*
  998. * Syntax:
  999. * i2c sdram {i2c_chip}
  1000. */
  1001. static int do_sdram(struct cmd_tbl *cmdtp, int flag, int argc,
  1002. char *const argv[])
  1003. {
  1004. enum { unknown, EDO, SDRAM, DDR, DDR2, DDR3, DDR4 } type;
  1005. uint chip;
  1006. u_char data[128];
  1007. u_char cksum;
  1008. int j, ret;
  1009. #if CONFIG_IS_ENABLED(DM_I2C)
  1010. struct udevice *dev;
  1011. #endif
  1012. static const char *decode_CAS_DDR2[] = {
  1013. " TBD", " 6", " 5", " 4", " 3", " 2", " TBD", " TBD"
  1014. };
  1015. static const char *decode_CAS_default[] = {
  1016. " TBD", " 7", " 6", " 5", " 4", " 3", " 2", " 1"
  1017. };
  1018. static const char *decode_CS_WE_default[] = {
  1019. " TBD", " 6", " 5", " 4", " 3", " 2", " 1", " 0"
  1020. };
  1021. static const char *decode_byte21_default[] = {
  1022. " TBD (bit 7)\n",
  1023. " Redundant row address\n",
  1024. " Differential clock input\n",
  1025. " Registerd DQMB inputs\n",
  1026. " Buffered DQMB inputs\n",
  1027. " On-card PLL\n",
  1028. " Registered address/control lines\n",
  1029. " Buffered address/control lines\n"
  1030. };
  1031. static const char *decode_byte22_DDR2[] = {
  1032. " TBD (bit 7)\n",
  1033. " TBD (bit 6)\n",
  1034. " TBD (bit 5)\n",
  1035. " TBD (bit 4)\n",
  1036. " TBD (bit 3)\n",
  1037. " Supports partial array self refresh\n",
  1038. " Supports 50 ohm ODT\n",
  1039. " Supports weak driver\n"
  1040. };
  1041. static const char *decode_row_density_DDR2[] = {
  1042. "512 MiB", "256 MiB", "128 MiB", "16 GiB",
  1043. "8 GiB", "4 GiB", "2 GiB", "1 GiB"
  1044. };
  1045. static const char *decode_row_density_default[] = {
  1046. "512 MiB", "256 MiB", "128 MiB", "64 MiB",
  1047. "32 MiB", "16 MiB", "8 MiB", "4 MiB"
  1048. };
  1049. if (argc < 2)
  1050. return CMD_RET_USAGE;
  1051. /*
  1052. * Chip is always specified.
  1053. */
  1054. chip = hextoul(argv[1], NULL);
  1055. #if CONFIG_IS_ENABLED(DM_I2C)
  1056. ret = i2c_get_cur_bus_chip(chip, &dev);
  1057. if (!ret)
  1058. ret = dm_i2c_read(dev, 0, data, sizeof(data));
  1059. #else
  1060. ret = i2c_read(chip, 0, 1, data, sizeof(data));
  1061. #endif
  1062. if (ret) {
  1063. puts ("No SDRAM Serial Presence Detect found.\n");
  1064. return 1;
  1065. }
  1066. cksum = 0;
  1067. for (j = 0; j < 63; j++) {
  1068. cksum += data[j];
  1069. }
  1070. if (cksum != data[63]) {
  1071. printf ("WARNING: Configuration data checksum failure:\n"
  1072. " is 0x%02x, calculated 0x%02x\n", data[63], cksum);
  1073. }
  1074. printf ("SPD data revision %d.%d\n",
  1075. (data[62] >> 4) & 0x0F, data[62] & 0x0F);
  1076. printf ("Bytes used 0x%02X\n", data[0]);
  1077. printf ("Serial memory size 0x%02X\n", 1 << data[1]);
  1078. puts ("Memory type ");
  1079. switch (data[2]) {
  1080. case 2:
  1081. type = EDO;
  1082. puts ("EDO\n");
  1083. break;
  1084. case 4:
  1085. type = SDRAM;
  1086. puts ("SDRAM\n");
  1087. break;
  1088. case 7:
  1089. type = DDR;
  1090. puts("DDR\n");
  1091. break;
  1092. case 8:
  1093. type = DDR2;
  1094. puts ("DDR2\n");
  1095. break;
  1096. case 11:
  1097. type = DDR3;
  1098. puts("DDR3\n");
  1099. break;
  1100. case 12:
  1101. type = DDR4;
  1102. puts("DDR4\n");
  1103. break;
  1104. default:
  1105. type = unknown;
  1106. puts ("unknown\n");
  1107. break;
  1108. }
  1109. puts ("Row address bits ");
  1110. if ((data[3] & 0x00F0) == 0)
  1111. printf ("%d\n", data[3] & 0x0F);
  1112. else
  1113. printf ("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
  1114. puts ("Column address bits ");
  1115. if ((data[4] & 0x00F0) == 0)
  1116. printf ("%d\n", data[4] & 0x0F);
  1117. else
  1118. printf ("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
  1119. switch (type) {
  1120. case DDR2:
  1121. printf ("Number of ranks %d\n",
  1122. (data[5] & 0x07) + 1);
  1123. break;
  1124. default:
  1125. printf ("Module rows %d\n", data[5]);
  1126. break;
  1127. }
  1128. switch (type) {
  1129. case DDR2:
  1130. printf ("Module data width %d bits\n", data[6]);
  1131. break;
  1132. default:
  1133. printf ("Module data width %d bits\n",
  1134. (data[7] << 8) | data[6]);
  1135. break;
  1136. }
  1137. puts ("Interface signal levels ");
  1138. switch(data[8]) {
  1139. case 0: puts ("TTL 5.0 V\n"); break;
  1140. case 1: puts ("LVTTL\n"); break;
  1141. case 2: puts ("HSTL 1.5 V\n"); break;
  1142. case 3: puts ("SSTL 3.3 V\n"); break;
  1143. case 4: puts ("SSTL 2.5 V\n"); break;
  1144. case 5: puts ("SSTL 1.8 V\n"); break;
  1145. default: puts ("unknown\n"); break;
  1146. }
  1147. switch (type) {
  1148. case DDR2:
  1149. printf ("SDRAM cycle time ");
  1150. print_ddr2_tcyc (data[9]);
  1151. break;
  1152. default:
  1153. printf ("SDRAM cycle time %d.%d ns\n",
  1154. (data[9] >> 4) & 0x0F, data[9] & 0x0F);
  1155. break;
  1156. }
  1157. switch (type) {
  1158. case DDR2:
  1159. printf ("SDRAM access time 0.%d%d ns\n",
  1160. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  1161. break;
  1162. default:
  1163. printf ("SDRAM access time %d.%d ns\n",
  1164. (data[10] >> 4) & 0x0F, data[10] & 0x0F);
  1165. break;
  1166. }
  1167. puts ("EDC configuration ");
  1168. switch (data[11]) {
  1169. case 0: puts ("None\n"); break;
  1170. case 1: puts ("Parity\n"); break;
  1171. case 2: puts ("ECC\n"); break;
  1172. default: puts ("unknown\n"); break;
  1173. }
  1174. if ((data[12] & 0x80) == 0)
  1175. puts ("No self refresh, rate ");
  1176. else
  1177. puts ("Self refresh, rate ");
  1178. switch(data[12] & 0x7F) {
  1179. case 0: puts ("15.625 us\n"); break;
  1180. case 1: puts ("3.9 us\n"); break;
  1181. case 2: puts ("7.8 us\n"); break;
  1182. case 3: puts ("31.3 us\n"); break;
  1183. case 4: puts ("62.5 us\n"); break;
  1184. case 5: puts ("125 us\n"); break;
  1185. default: puts ("unknown\n"); break;
  1186. }
  1187. switch (type) {
  1188. case DDR2:
  1189. printf ("SDRAM width (primary) %d\n", data[13]);
  1190. break;
  1191. default:
  1192. printf ("SDRAM width (primary) %d\n", data[13] & 0x7F);
  1193. if ((data[13] & 0x80) != 0) {
  1194. printf (" (second bank) %d\n",
  1195. 2 * (data[13] & 0x7F));
  1196. }
  1197. break;
  1198. }
  1199. switch (type) {
  1200. case DDR2:
  1201. if (data[14] != 0)
  1202. printf ("EDC width %d\n", data[14]);
  1203. break;
  1204. default:
  1205. if (data[14] != 0) {
  1206. printf ("EDC width %d\n",
  1207. data[14] & 0x7F);
  1208. if ((data[14] & 0x80) != 0) {
  1209. printf (" (second bank) %d\n",
  1210. 2 * (data[14] & 0x7F));
  1211. }
  1212. }
  1213. break;
  1214. }
  1215. if (DDR2 != type) {
  1216. printf ("Min clock delay, back-to-back random column addresses "
  1217. "%d\n", data[15]);
  1218. }
  1219. puts ("Burst length(s) ");
  1220. if (data[16] & 0x80) puts (" Page");
  1221. if (data[16] & 0x08) puts (" 8");
  1222. if (data[16] & 0x04) puts (" 4");
  1223. if (data[16] & 0x02) puts (" 2");
  1224. if (data[16] & 0x01) puts (" 1");
  1225. putc ('\n');
  1226. printf ("Number of banks %d\n", data[17]);
  1227. switch (type) {
  1228. case DDR2:
  1229. puts ("CAS latency(s) ");
  1230. decode_bits (data[18], decode_CAS_DDR2, 0);
  1231. putc ('\n');
  1232. break;
  1233. default:
  1234. puts ("CAS latency(s) ");
  1235. decode_bits (data[18], decode_CAS_default, 0);
  1236. putc ('\n');
  1237. break;
  1238. }
  1239. if (DDR2 != type) {
  1240. puts ("CS latency(s) ");
  1241. decode_bits (data[19], decode_CS_WE_default, 0);
  1242. putc ('\n');
  1243. }
  1244. if (DDR2 != type) {
  1245. puts ("WE latency(s) ");
  1246. decode_bits (data[20], decode_CS_WE_default, 0);
  1247. putc ('\n');
  1248. }
  1249. switch (type) {
  1250. case DDR2:
  1251. puts ("Module attributes:\n");
  1252. if (data[21] & 0x80)
  1253. puts (" TBD (bit 7)\n");
  1254. if (data[21] & 0x40)
  1255. puts (" Analysis probe installed\n");
  1256. if (data[21] & 0x20)
  1257. puts (" TBD (bit 5)\n");
  1258. if (data[21] & 0x10)
  1259. puts (" FET switch external enable\n");
  1260. printf (" %d PLLs on DIMM\n", (data[21] >> 2) & 0x03);
  1261. if (data[20] & 0x11) {
  1262. printf (" %d active registers on DIMM\n",
  1263. (data[21] & 0x03) + 1);
  1264. }
  1265. break;
  1266. default:
  1267. puts ("Module attributes:\n");
  1268. if (!data[21])
  1269. puts (" (none)\n");
  1270. else
  1271. decode_bits (data[21], decode_byte21_default, 0);
  1272. break;
  1273. }
  1274. switch (type) {
  1275. case DDR2:
  1276. decode_bits (data[22], decode_byte22_DDR2, 0);
  1277. break;
  1278. default:
  1279. puts ("Device attributes:\n");
  1280. if (data[22] & 0x80) puts (" TBD (bit 7)\n");
  1281. if (data[22] & 0x40) puts (" TBD (bit 6)\n");
  1282. if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
  1283. else puts (" Upper Vcc tolerance 10%\n");
  1284. if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
  1285. else puts (" Lower Vcc tolerance 10%\n");
  1286. if (data[22] & 0x08) puts (" Supports write1/read burst\n");
  1287. if (data[22] & 0x04) puts (" Supports precharge all\n");
  1288. if (data[22] & 0x02) puts (" Supports auto precharge\n");
  1289. if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
  1290. break;
  1291. }
  1292. switch (type) {
  1293. case DDR2:
  1294. printf ("SDRAM cycle time (2nd highest CAS latency) ");
  1295. print_ddr2_tcyc (data[23]);
  1296. break;
  1297. default:
  1298. printf ("SDRAM cycle time (2nd highest CAS latency) %d."
  1299. "%d ns\n", (data[23] >> 4) & 0x0F, data[23] & 0x0F);
  1300. break;
  1301. }
  1302. switch (type) {
  1303. case DDR2:
  1304. printf ("SDRAM access from clock (2nd highest CAS latency) 0."
  1305. "%d%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  1306. break;
  1307. default:
  1308. printf ("SDRAM access from clock (2nd highest CAS latency) %d."
  1309. "%d ns\n", (data[24] >> 4) & 0x0F, data[24] & 0x0F);
  1310. break;
  1311. }
  1312. switch (type) {
  1313. case DDR2:
  1314. printf ("SDRAM cycle time (3rd highest CAS latency) ");
  1315. print_ddr2_tcyc (data[25]);
  1316. break;
  1317. default:
  1318. printf ("SDRAM cycle time (3rd highest CAS latency) %d."
  1319. "%d ns\n", (data[25] >> 4) & 0x0F, data[25] & 0x0F);
  1320. break;
  1321. }
  1322. switch (type) {
  1323. case DDR2:
  1324. printf ("SDRAM access from clock (3rd highest CAS latency) 0."
  1325. "%d%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  1326. break;
  1327. default:
  1328. printf ("SDRAM access from clock (3rd highest CAS latency) %d."
  1329. "%d ns\n", (data[26] >> 4) & 0x0F, data[26] & 0x0F);
  1330. break;
  1331. }
  1332. switch (type) {
  1333. case DDR2:
  1334. printf ("Minimum row precharge %d.%02d ns\n",
  1335. (data[27] >> 2) & 0x3F, 25 * (data[27] & 0x03));
  1336. break;
  1337. default:
  1338. printf ("Minimum row precharge %d ns\n", data[27]);
  1339. break;
  1340. }
  1341. switch (type) {
  1342. case DDR2:
  1343. printf ("Row active to row active min %d.%02d ns\n",
  1344. (data[28] >> 2) & 0x3F, 25 * (data[28] & 0x03));
  1345. break;
  1346. default:
  1347. printf ("Row active to row active min %d ns\n", data[28]);
  1348. break;
  1349. }
  1350. switch (type) {
  1351. case DDR2:
  1352. printf ("RAS to CAS delay min %d.%02d ns\n",
  1353. (data[29] >> 2) & 0x3F, 25 * (data[29] & 0x03));
  1354. break;
  1355. default:
  1356. printf ("RAS to CAS delay min %d ns\n", data[29]);
  1357. break;
  1358. }
  1359. printf ("Minimum RAS pulse width %d ns\n", data[30]);
  1360. switch (type) {
  1361. case DDR2:
  1362. puts ("Density of each row ");
  1363. decode_bits (data[31], decode_row_density_DDR2, 1);
  1364. putc ('\n');
  1365. break;
  1366. default:
  1367. puts ("Density of each row ");
  1368. decode_bits (data[31], decode_row_density_default, 1);
  1369. putc ('\n');
  1370. break;
  1371. }
  1372. switch (type) {
  1373. case DDR2:
  1374. puts ("Command and Address setup ");
  1375. if (data[32] >= 0xA0) {
  1376. printf ("1.%d%d ns\n",
  1377. ((data[32] >> 4) & 0x0F) - 10, data[32] & 0x0F);
  1378. } else {
  1379. printf ("0.%d%d ns\n",
  1380. ((data[32] >> 4) & 0x0F), data[32] & 0x0F);
  1381. }
  1382. break;
  1383. default:
  1384. printf ("Command and Address setup %c%d.%d ns\n",
  1385. (data[32] & 0x80) ? '-' : '+',
  1386. (data[32] >> 4) & 0x07, data[32] & 0x0F);
  1387. break;
  1388. }
  1389. switch (type) {
  1390. case DDR2:
  1391. puts ("Command and Address hold ");
  1392. if (data[33] >= 0xA0) {
  1393. printf ("1.%d%d ns\n",
  1394. ((data[33] >> 4) & 0x0F) - 10, data[33] & 0x0F);
  1395. } else {
  1396. printf ("0.%d%d ns\n",
  1397. ((data[33] >> 4) & 0x0F), data[33] & 0x0F);
  1398. }
  1399. break;
  1400. default:
  1401. printf ("Command and Address hold %c%d.%d ns\n",
  1402. (data[33] & 0x80) ? '-' : '+',
  1403. (data[33] >> 4) & 0x07, data[33] & 0x0F);
  1404. break;
  1405. }
  1406. switch (type) {
  1407. case DDR2:
  1408. printf ("Data signal input setup 0.%d%d ns\n",
  1409. (data[34] >> 4) & 0x0F, data[34] & 0x0F);
  1410. break;
  1411. default:
  1412. printf ("Data signal input setup %c%d.%d ns\n",
  1413. (data[34] & 0x80) ? '-' : '+',
  1414. (data[34] >> 4) & 0x07, data[34] & 0x0F);
  1415. break;
  1416. }
  1417. switch (type) {
  1418. case DDR2:
  1419. printf ("Data signal input hold 0.%d%d ns\n",
  1420. (data[35] >> 4) & 0x0F, data[35] & 0x0F);
  1421. break;
  1422. default:
  1423. printf ("Data signal input hold %c%d.%d ns\n",
  1424. (data[35] & 0x80) ? '-' : '+',
  1425. (data[35] >> 4) & 0x07, data[35] & 0x0F);
  1426. break;
  1427. }
  1428. puts ("Manufacturer's JEDEC ID ");
  1429. for (j = 64; j <= 71; j++)
  1430. printf ("%02X ", data[j]);
  1431. putc ('\n');
  1432. printf ("Manufacturing Location %02X\n", data[72]);
  1433. puts ("Manufacturer's Part Number ");
  1434. for (j = 73; j <= 90; j++)
  1435. printf ("%02X ", data[j]);
  1436. putc ('\n');
  1437. printf ("Revision Code %02X %02X\n", data[91], data[92]);
  1438. printf ("Manufacturing Date %02X %02X\n", data[93], data[94]);
  1439. puts ("Assembly Serial Number ");
  1440. for (j = 95; j <= 98; j++)
  1441. printf ("%02X ", data[j]);
  1442. putc ('\n');
  1443. if (DDR2 != type) {
  1444. printf ("Speed rating PC%d\n",
  1445. data[126] == 0x66 ? 66 : data[126]);
  1446. }
  1447. return 0;
  1448. }
  1449. #endif
  1450. /*
  1451. * Syntax:
  1452. * i2c edid {i2c_chip}
  1453. */
  1454. #if defined(CONFIG_I2C_EDID)
  1455. int do_edid(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  1456. {
  1457. uint chip;
  1458. struct edid1_info edid;
  1459. int ret;
  1460. #if CONFIG_IS_ENABLED(DM_I2C)
  1461. struct udevice *dev;
  1462. #endif
  1463. if (argc < 2) {
  1464. cmd_usage(cmdtp);
  1465. return 1;
  1466. }
  1467. chip = hextoul(argv[1], NULL);
  1468. #if CONFIG_IS_ENABLED(DM_I2C)
  1469. ret = i2c_get_cur_bus_chip(chip, &dev);
  1470. if (!ret)
  1471. ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid));
  1472. #else
  1473. ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid));
  1474. #endif
  1475. if (ret)
  1476. return i2c_report_err(ret, I2C_ERR_READ);
  1477. if (edid_check_info(&edid)) {
  1478. puts("Content isn't valid EDID.\n");
  1479. return 1;
  1480. }
  1481. edid_print_info(&edid);
  1482. return 0;
  1483. }
  1484. #endif /* CONFIG_I2C_EDID */
  1485. #if CONFIG_IS_ENABLED(DM_I2C)
  1486. static void show_bus(struct udevice *bus)
  1487. {
  1488. struct udevice *dev;
  1489. printf("Bus %d:\t%s", dev_seq(bus), bus->name);
  1490. if (device_active(bus))
  1491. printf(" (active %d)", dev_seq(bus));
  1492. printf("\n");
  1493. for (device_find_first_child(bus, &dev);
  1494. dev;
  1495. device_find_next_child(&dev)) {
  1496. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  1497. printf(" %02x: %s, offset len %x, flags %x\n",
  1498. chip->chip_addr, dev->name, chip->offset_len,
  1499. chip->flags);
  1500. }
  1501. }
  1502. #endif
  1503. /**
  1504. * do_i2c_show_bus() - Handle the "i2c bus" command-line command
  1505. * @cmdtp: Command data struct pointer
  1506. * @flag: Command flag
  1507. * @argc: Command-line argument count
  1508. * @argv: Array of command-line arguments
  1509. *
  1510. * Returns zero always.
  1511. */
  1512. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1513. static int do_i2c_show_bus(struct cmd_tbl *cmdtp, int flag, int argc,
  1514. char *const argv[])
  1515. {
  1516. if (argc == 1) {
  1517. /* show all busses */
  1518. #if CONFIG_IS_ENABLED(DM_I2C)
  1519. struct udevice *bus;
  1520. struct uclass *uc;
  1521. int ret;
  1522. ret = uclass_get(UCLASS_I2C, &uc);
  1523. if (ret)
  1524. return CMD_RET_FAILURE;
  1525. uclass_foreach_dev(bus, uc)
  1526. show_bus(bus);
  1527. #else
  1528. int i;
  1529. for (i = 0; i < CONFIG_SYS_NUM_I2C_BUSES; i++) {
  1530. printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
  1531. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  1532. int j;
  1533. for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
  1534. if (i2c_bus[i].next_hop[j].chip == 0)
  1535. break;
  1536. printf("->%s@0x%2x:%d",
  1537. i2c_bus[i].next_hop[j].mux.name,
  1538. i2c_bus[i].next_hop[j].chip,
  1539. i2c_bus[i].next_hop[j].channel);
  1540. }
  1541. #endif
  1542. printf("\n");
  1543. }
  1544. #endif
  1545. } else {
  1546. int i;
  1547. /* show specific bus */
  1548. i = dectoul(argv[1], NULL);
  1549. #if CONFIG_IS_ENABLED(DM_I2C)
  1550. struct udevice *bus;
  1551. int ret;
  1552. ret = uclass_get_device_by_seq(UCLASS_I2C, i, &bus);
  1553. if (ret) {
  1554. printf("Invalid bus %d: err=%d\n", i, ret);
  1555. return CMD_RET_FAILURE;
  1556. }
  1557. show_bus(bus);
  1558. #else
  1559. if (i >= CONFIG_SYS_NUM_I2C_BUSES) {
  1560. printf("Invalid bus %d\n", i);
  1561. return -1;
  1562. }
  1563. printf("Bus %d:\t%s", i, I2C_ADAP_NR(i)->name);
  1564. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  1565. int j;
  1566. for (j = 0; j < CONFIG_SYS_I2C_MAX_HOPS; j++) {
  1567. if (i2c_bus[i].next_hop[j].chip == 0)
  1568. break;
  1569. printf("->%s@0x%2x:%d",
  1570. i2c_bus[i].next_hop[j].mux.name,
  1571. i2c_bus[i].next_hop[j].chip,
  1572. i2c_bus[i].next_hop[j].channel);
  1573. }
  1574. #endif
  1575. printf("\n");
  1576. #endif
  1577. }
  1578. return 0;
  1579. }
  1580. #endif
  1581. /**
  1582. * do_i2c_bus_num() - Handle the "i2c dev" command-line command
  1583. * @cmdtp: Command data struct pointer
  1584. * @flag: Command flag
  1585. * @argc: Command-line argument count
  1586. * @argv: Array of command-line arguments
  1587. *
  1588. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1589. * on error.
  1590. */
  1591. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || defined(CONFIG_I2C_MULTI_BUS) || \
  1592. CONFIG_IS_ENABLED(DM_I2C)
  1593. static int do_i2c_bus_num(struct cmd_tbl *cmdtp, int flag, int argc,
  1594. char *const argv[])
  1595. {
  1596. int ret = 0;
  1597. int bus_no;
  1598. if (argc == 1) {
  1599. /* querying current setting */
  1600. #if CONFIG_IS_ENABLED(DM_I2C)
  1601. struct udevice *bus;
  1602. if (!i2c_get_cur_bus(&bus))
  1603. bus_no = dev_seq(bus);
  1604. else
  1605. bus_no = -1;
  1606. #else
  1607. bus_no = i2c_get_bus_num();
  1608. #endif
  1609. printf("Current bus is %d\n", bus_no);
  1610. } else {
  1611. bus_no = dectoul(argv[1], NULL);
  1612. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
  1613. if (bus_no >= CONFIG_SYS_NUM_I2C_BUSES) {
  1614. printf("Invalid bus %d\n", bus_no);
  1615. return -1;
  1616. }
  1617. #endif
  1618. printf("Setting bus to %d\n", bus_no);
  1619. #if CONFIG_IS_ENABLED(DM_I2C)
  1620. ret = cmd_i2c_set_bus_num(bus_no);
  1621. #else
  1622. ret = i2c_set_bus_num(bus_no);
  1623. #endif
  1624. if (ret)
  1625. printf("Failure changing bus number (%d)\n", ret);
  1626. }
  1627. return ret ? CMD_RET_FAILURE : 0;
  1628. }
  1629. #endif /* CONFIG_IS_ENABLED(SYS_I2C_LEGACY) */
  1630. /**
  1631. * do_i2c_bus_speed() - Handle the "i2c speed" command-line command
  1632. * @cmdtp: Command data struct pointer
  1633. * @flag: Command flag
  1634. * @argc: Command-line argument count
  1635. * @argv: Array of command-line arguments
  1636. *
  1637. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1638. * on error.
  1639. */
  1640. static int do_i2c_bus_speed(struct cmd_tbl *cmdtp, int flag, int argc,
  1641. char *const argv[])
  1642. {
  1643. int speed, ret=0;
  1644. #if CONFIG_IS_ENABLED(DM_I2C)
  1645. struct udevice *bus;
  1646. if (i2c_get_cur_bus(&bus))
  1647. return 1;
  1648. #endif
  1649. if (argc == 1) {
  1650. #if CONFIG_IS_ENABLED(DM_I2C)
  1651. speed = dm_i2c_get_bus_speed(bus);
  1652. #else
  1653. speed = i2c_get_bus_speed();
  1654. #endif
  1655. /* querying current speed */
  1656. printf("Current bus speed=%d\n", speed);
  1657. } else {
  1658. speed = dectoul(argv[1], NULL);
  1659. printf("Setting bus speed to %d Hz\n", speed);
  1660. #if CONFIG_IS_ENABLED(DM_I2C)
  1661. ret = dm_i2c_set_bus_speed(bus, speed);
  1662. #else
  1663. ret = i2c_set_bus_speed(speed);
  1664. #endif
  1665. if (ret)
  1666. printf("Failure changing bus speed (%d)\n", ret);
  1667. }
  1668. return ret ? CMD_RET_FAILURE : 0;
  1669. }
  1670. /**
  1671. * do_i2c_mm() - Handle the "i2c mm" command-line command
  1672. * @cmdtp: Command data struct pointer
  1673. * @flag: Command flag
  1674. * @argc: Command-line argument count
  1675. * @argv: Array of command-line arguments
  1676. *
  1677. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1678. * on error.
  1679. */
  1680. static int do_i2c_mm(struct cmd_tbl *cmdtp, int flag, int argc,
  1681. char *const argv[])
  1682. {
  1683. return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
  1684. }
  1685. /**
  1686. * do_i2c_nm() - Handle the "i2c nm" command-line command
  1687. * @cmdtp: Command data struct pointer
  1688. * @flag: Command flag
  1689. * @argc: Command-line argument count
  1690. * @argv: Array of command-line arguments
  1691. *
  1692. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1693. * on error.
  1694. */
  1695. static int do_i2c_nm(struct cmd_tbl *cmdtp, int flag, int argc,
  1696. char *const argv[])
  1697. {
  1698. return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
  1699. }
  1700. /**
  1701. * do_i2c_reset() - Handle the "i2c reset" command-line command
  1702. * @cmdtp: Command data struct pointer
  1703. * @flag: Command flag
  1704. * @argc: Command-line argument count
  1705. * @argv: Array of command-line arguments
  1706. *
  1707. * Returns zero always.
  1708. */
  1709. static int do_i2c_reset(struct cmd_tbl *cmdtp, int flag, int argc,
  1710. char *const argv[])
  1711. {
  1712. #if CONFIG_IS_ENABLED(DM_I2C)
  1713. struct udevice *bus;
  1714. if (i2c_get_cur_bus(&bus))
  1715. return CMD_RET_FAILURE;
  1716. if (i2c_deblock(bus)) {
  1717. printf("Error: Not supported by the driver\n");
  1718. return CMD_RET_FAILURE;
  1719. }
  1720. #elif CONFIG_IS_ENABLED(SYS_I2C_LEGACY)
  1721. i2c_init(I2C_ADAP->speed, I2C_ADAP->slaveaddr);
  1722. #endif
  1723. return 0;
  1724. }
  1725. static struct cmd_tbl cmd_i2c_sub[] = {
  1726. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1727. U_BOOT_CMD_MKENT(bus, 1, 1, do_i2c_show_bus, "", ""),
  1728. #endif
  1729. U_BOOT_CMD_MKENT(crc32, 3, 1, do_i2c_crc, "", ""),
  1730. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
  1731. defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
  1732. U_BOOT_CMD_MKENT(dev, 1, 1, do_i2c_bus_num, "", ""),
  1733. #endif /* CONFIG_I2C_MULTI_BUS */
  1734. #if defined(CONFIG_I2C_EDID)
  1735. U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
  1736. #endif /* CONFIG_I2C_EDID */
  1737. U_BOOT_CMD_MKENT(loop, 3, 1, do_i2c_loop, "", ""),
  1738. U_BOOT_CMD_MKENT(md, 3, 1, do_i2c_md, "", ""),
  1739. U_BOOT_CMD_MKENT(mm, 2, 1, do_i2c_mm, "", ""),
  1740. U_BOOT_CMD_MKENT(mw, 3, 1, do_i2c_mw, "", ""),
  1741. U_BOOT_CMD_MKENT(nm, 2, 1, do_i2c_nm, "", ""),
  1742. U_BOOT_CMD_MKENT(probe, 0, 1, do_i2c_probe, "", ""),
  1743. U_BOOT_CMD_MKENT(read, 5, 1, do_i2c_read, "", ""),
  1744. U_BOOT_CMD_MKENT(write, 6, 0, do_i2c_write, "", ""),
  1745. #if CONFIG_IS_ENABLED(DM_I2C)
  1746. U_BOOT_CMD_MKENT(flags, 2, 1, do_i2c_flags, "", ""),
  1747. U_BOOT_CMD_MKENT(olen, 2, 1, do_i2c_olen, "", ""),
  1748. #endif
  1749. U_BOOT_CMD_MKENT(reset, 0, 1, do_i2c_reset, "", ""),
  1750. #if defined(CONFIG_CMD_SDRAM)
  1751. U_BOOT_CMD_MKENT(sdram, 1, 1, do_sdram, "", ""),
  1752. #endif
  1753. U_BOOT_CMD_MKENT(speed, 1, 1, do_i2c_bus_speed, "", ""),
  1754. };
  1755. static __maybe_unused void i2c_reloc(void)
  1756. {
  1757. static int relocated;
  1758. if (!relocated) {
  1759. fixup_cmdtable(cmd_i2c_sub, ARRAY_SIZE(cmd_i2c_sub));
  1760. relocated = 1;
  1761. };
  1762. }
  1763. /**
  1764. * do_i2c() - Handle the "i2c" command-line command
  1765. * @cmdtp: Command data struct pointer
  1766. * @flag: Command flag
  1767. * @argc: Command-line argument count
  1768. * @argv: Array of command-line arguments
  1769. *
  1770. * Returns zero on success, CMD_RET_USAGE in case of misuse and negative
  1771. * on error.
  1772. */
  1773. static int do_i2c(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
  1774. {
  1775. struct cmd_tbl *c;
  1776. #ifdef CONFIG_NEEDS_MANUAL_RELOC
  1777. i2c_reloc();
  1778. #endif
  1779. if (argc < 2)
  1780. return CMD_RET_USAGE;
  1781. /* Strip off leading 'i2c' command argument */
  1782. argc--;
  1783. argv++;
  1784. c = find_cmd_tbl(argv[0], &cmd_i2c_sub[0], ARRAY_SIZE(cmd_i2c_sub));
  1785. if (c)
  1786. return c->cmd(cmdtp, flag, argc, argv);
  1787. else
  1788. return CMD_RET_USAGE;
  1789. }
  1790. /***************************************************/
  1791. #ifdef CONFIG_SYS_LONGHELP
  1792. static char i2c_help_text[] =
  1793. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || CONFIG_IS_ENABLED(DM_I2C)
  1794. "bus [muxtype:muxaddr:muxchannel] - show I2C bus info\n"
  1795. "i2c " /* That's the prefix for the crc32 command below. */
  1796. #endif
  1797. "crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
  1798. #if CONFIG_IS_ENABLED(SYS_I2C_LEGACY) || \
  1799. defined(CONFIG_I2C_MULTI_BUS) || CONFIG_IS_ENABLED(DM_I2C)
  1800. "i2c dev [dev] - show or set current I2C bus\n"
  1801. #endif /* CONFIG_I2C_MULTI_BUS */
  1802. #if defined(CONFIG_I2C_EDID)
  1803. "i2c edid chip - print EDID configuration information\n"
  1804. #endif /* CONFIG_I2C_EDID */
  1805. "i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
  1806. "i2c md chip address[.0, .1, .2] [# of objects] - read from I2C device\n"
  1807. "i2c mm chip address[.0, .1, .2] - write to I2C device (auto-incrementing)\n"
  1808. "i2c mw chip address[.0, .1, .2] value [count] - write to I2C device (fill)\n"
  1809. "i2c nm chip address[.0, .1, .2] - write to I2C device (constant address)\n"
  1810. "i2c probe [address] - test for and show device(s) on the I2C bus\n"
  1811. "i2c read chip address[.0, .1, .2] length memaddress - read to memory\n"
  1812. "i2c write memaddress chip address[.0, .1, .2] length [-s] - write memory\n"
  1813. " to I2C; the -s option selects bulk write in a single transaction\n"
  1814. #if CONFIG_IS_ENABLED(DM_I2C)
  1815. "i2c flags chip [flags] - set or get chip flags\n"
  1816. "i2c olen chip [offset_length] - set or get chip offset length\n"
  1817. #endif
  1818. "i2c reset - re-init the I2C Controller\n"
  1819. #if defined(CONFIG_CMD_SDRAM)
  1820. "i2c sdram chip - print SDRAM configuration information\n"
  1821. #endif
  1822. "i2c speed [speed] - show or set I2C bus speed";
  1823. #endif
  1824. U_BOOT_CMD(
  1825. i2c, 7, 1, do_i2c,
  1826. "I2C sub-system",
  1827. i2c_help_text
  1828. );