netspace_v2.c 2.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2011 Simon Guinot <sguinot@lacie.com>
  4. *
  5. * Based on Kirkwood support:
  6. * (C) Copyright 2009
  7. * Marvell Semiconductor <www.marvell.com>
  8. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  9. */
  10. #include <common.h>
  11. #include <command.h>
  12. #include <env.h>
  13. #include <environment.h>
  14. #include <asm/mach-types.h>
  15. #include <asm/arch/cpu.h>
  16. #include <asm/arch/soc.h>
  17. #include <asm/arch/mpp.h>
  18. #include <asm/arch/gpio.h>
  19. #include "netspace_v2.h"
  20. #include "../common/common.h"
  21. DECLARE_GLOBAL_DATA_PTR;
  22. int board_early_init_f(void)
  23. {
  24. /* Gpio configuration */
  25. mvebu_config_gpio(NETSPACE_V2_OE_VAL_LOW, NETSPACE_V2_OE_VAL_HIGH,
  26. NETSPACE_V2_OE_LOW, NETSPACE_V2_OE_HIGH);
  27. /* Multi-Purpose Pins Functionality configuration */
  28. static const u32 kwmpp_config[] = {
  29. MPP0_SPI_SCn,
  30. MPP1_SPI_MOSI,
  31. MPP2_SPI_SCK,
  32. MPP3_SPI_MISO,
  33. MPP4_NF_IO6,
  34. MPP5_NF_IO7,
  35. MPP6_SYSRST_OUTn,
  36. MPP7_GPO, /* Fan speed (bit 1) */
  37. MPP8_TW_SDA,
  38. MPP9_TW_SCK,
  39. MPP10_UART0_TXD,
  40. MPP11_UART0_RXD,
  41. MPP12_GPO, /* Red led */
  42. MPP14_GPIO, /* USB fuse */
  43. MPP16_GPIO, /* SATA 0 power */
  44. MPP17_GPIO, /* SATA 1 power */
  45. MPP18_NF_IO0,
  46. MPP19_NF_IO1,
  47. MPP20_SATA1_ACTn,
  48. MPP21_SATA0_ACTn,
  49. MPP22_GPIO, /* Fan speed (bit 0) */
  50. MPP23_GPIO, /* Fan power */
  51. MPP24_GPIO, /* USB mode select */
  52. MPP25_GPIO, /* Fan rotation fail */
  53. MPP26_GPIO, /* USB vbus-in detection */
  54. MPP28_GPIO, /* USB enable vbus-out */
  55. MPP29_GPIO, /* Blue led (slow register) */
  56. MPP30_GPIO, /* Blue led (command register) */
  57. MPP31_GPIO, /* Board power off */
  58. MPP32_GPIO, /* Button (0 = Released, 1 = Pushed) */
  59. MPP33_GPIO, /* Fan speed (bit 2) */
  60. 0
  61. };
  62. kirkwood_mpp_conf(kwmpp_config, NULL);
  63. return 0;
  64. }
  65. int board_init(void)
  66. {
  67. /* Machine number */
  68. gd->bd->bi_arch_number = CONFIG_MACH_TYPE;
  69. /* Boot parameters address */
  70. gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
  71. return 0;
  72. }
  73. #if defined(CONFIG_MISC_INIT_R)
  74. int misc_init_r(void)
  75. {
  76. #if defined(CONFIG_CMD_I2C) && defined(CONFIG_SYS_I2C_EEPROM_ADDR)
  77. if (!env_get("ethaddr")) {
  78. uchar mac[6];
  79. if (lacie_read_mac_address(mac) == 0)
  80. eth_env_set_enetaddr("ethaddr", mac);
  81. }
  82. #endif
  83. return 0;
  84. }
  85. #endif
  86. #if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
  87. /* Configure and initialize PHY */
  88. void reset_phy(void)
  89. {
  90. #if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
  91. mv_phy_88e1318_init("egiga0", 0);
  92. #else
  93. mv_phy_88e1116_init("egiga0", 8);
  94. #endif
  95. }
  96. #endif
  97. #if defined(CONFIG_KIRKWOOD_GPIO)
  98. /* Return GPIO button status */
  99. static int
  100. do_read_button(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
  101. {
  102. return kw_gpio_get_value(NETSPACE_V2_GPIO_BUTTON);
  103. }
  104. U_BOOT_CMD(button, 1, 1, do_read_button,
  105. "Return GPIO button status 0=off 1=on", "");
  106. #endif