Kconfig 5.6 KB

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  1. if ARCH_STM32MP
  2. config SPL
  3. select SPL_BOARD_INIT
  4. select SPL_CLK
  5. select SPL_DM
  6. select SPL_DM_SEQ_ALIAS
  7. select SPL_DRIVERS_MISC
  8. select SPL_FRAMEWORK
  9. select SPL_GPIO
  10. select SPL_LIBCOMMON_SUPPORT
  11. select SPL_LIBGENERIC_SUPPORT
  12. select SPL_OF_CONTROL
  13. select SPL_OF_TRANSLATE
  14. select SPL_PINCTRL
  15. select SPL_REGMAP
  16. select SPL_DM_RESET
  17. select SPL_SERIAL_SUPPORT
  18. select SPL_SYSCON
  19. select SPL_WATCHDOG if WATCHDOG
  20. imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
  21. imply SPL_BOOTSTAGE if BOOTSTAGE
  22. imply SPL_DISPLAY_PRINT
  23. imply SPL_LIBDISK_SUPPORT
  24. imply SPL_SPI_LOAD if SPL_SPI_SUPPORT
  25. config SYS_SOC
  26. default "stm32mp"
  27. config SYS_MALLOC_LEN
  28. default 0x2000000
  29. config ENV_SIZE
  30. default 0x2000
  31. config STM32MP15x
  32. bool "Support STMicroelectronics STM32MP15x Soc"
  33. select ARCH_SUPPORT_PSCI if !TFABOOT
  34. select ARM_SMCCC if TFABOOT
  35. select CPU_V7A
  36. select CPU_V7_HAS_NONSEC if !TFABOOT
  37. select CPU_V7_HAS_VIRT
  38. select OF_BOARD_SETUP
  39. select PINCTRL_STM32
  40. select STM32_RCC
  41. select STM32_RESET
  42. select STM32_SERIAL
  43. select SYS_ARCH_TIMER
  44. imply CMD_NVEDIT_INFO
  45. imply SYSRESET_PSCI if TFABOOT
  46. imply SYSRESET_SYSCON if !TFABOOT
  47. help
  48. support of STMicroelectronics SOC STM32MP15x family
  49. STM32MP157, STM32MP153 or STM32MP151
  50. STMicroelectronics MPU with core ARMv7
  51. dual core A7 for STM32MP157/3, monocore for STM32MP151
  52. target all the STMicroelectronics board with SOC STM32MP1 family
  53. choice
  54. prompt "STM32MP15x board select"
  55. optional
  56. config TARGET_ST_STM32MP15x
  57. bool "STMicroelectronics STM32MP15x boards"
  58. select STM32MP15x
  59. imply BOOTCOUNT_LIMIT
  60. imply BOOTSTAGE
  61. imply CMD_BOOTCOUNT
  62. imply CMD_BOOTSTAGE
  63. imply CMD_CLS if CMD_BMP
  64. imply DISABLE_CONSOLE
  65. imply PRE_CONSOLE_BUFFER
  66. imply SILENT_CONSOLE
  67. help
  68. target the STMicroelectronics board with SOC STM32MP15x
  69. managed by board/st/stm32mp1:
  70. Evalulation board (EV1) or Discovery board (DK1 and DK2).
  71. The difference between board are managed with devicetree
  72. config TARGET_MICROGEA_STM32MP1
  73. bool "Engicam MicroGEA STM32MP1 SOM"
  74. select STM32MP15x
  75. imply BOOTCOUNT_LIMIT
  76. imply BOOTSTAGE
  77. imply CMD_BOOTCOUNT
  78. imply CMD_BOOTSTAGE
  79. imply CMD_CLS if CMD_BMP
  80. imply DISABLE_CONSOLE
  81. imply PRE_CONSOLE_BUFFER
  82. imply SILENT_CONSOLE
  83. help
  84. MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
  85. MicroGEA STM32MP1 MicroDev 2.0:
  86. * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
  87. LTE and LVDS panel interfaces.
  88. * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
  89. for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
  90. MicroGEA STM32MP1 MicroDev 2.0 7" OF:
  91. * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
  92. panel and toucscreen.
  93. * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
  94. pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
  95. Open Frame Solution board.
  96. config TARGET_ICORE_STM32MP1
  97. bool "Engicam i.Core STM32MP1 SOM"
  98. select STM32MP15x
  99. imply BOOTCOUNT_LIMIT
  100. imply BOOTSTAGE
  101. imply CMD_BOOTCOUNT
  102. imply CMD_BOOTSTAGE
  103. imply CMD_CLS if CMD_BMP
  104. imply DISABLE_CONSOLE
  105. imply PRE_CONSOLE_BUFFER
  106. imply SILENT_CONSOLE
  107. help
  108. i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
  109. i.Core STM32MP1 EDIMM2.2:
  110. * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
  111. * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
  112. creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
  113. i.Core STM32MP1 C.TOUCH 2.0
  114. * C.TOUCH 2.0 is a general purpose Carrier board.
  115. * i.Core STM32MP1 needs to mount on top of this Carrier board
  116. for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
  117. config TARGET_DH_STM32MP1_PDK2
  118. bool "DH STM32MP1 PDK2"
  119. select STM32MP15x
  120. imply BOOTCOUNT_LIMIT
  121. imply CMD_BOOTCOUNT
  122. help
  123. Target the DH PDK2 development kit with STM32MP15x SoM.
  124. endchoice
  125. config SYS_TEXT_BASE
  126. default 0xC0100000
  127. config NR_DRAM_BANKS
  128. default 1
  129. config DDR_CACHEABLE_SIZE
  130. hex "Size of the DDR marked cacheable in pre-reloc stage"
  131. default 0x10000000 if TFABOOT
  132. default 0x40000000
  133. help
  134. Define the size of the DDR marked as cacheable in U-Boot
  135. pre-reloc stage.
  136. This option can be useful to avoid speculatif access
  137. to secured area of DDR used by TF-A or OP-TEE before U-Boot
  138. initialization.
  139. The areas marked "no-map" in device tree should be located
  140. before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
  141. config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
  142. hex "Partition on MMC2 to use to load U-Boot from"
  143. depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  144. default 1
  145. help
  146. Partition on the second MMC to load U-Boot from when the MMC is being
  147. used in raw mode
  148. config STM32_ETZPC
  149. bool "STM32 Extended TrustZone Protection"
  150. depends on STM32MP15x
  151. default y
  152. help
  153. Say y to enable STM32 Extended TrustZone Protection
  154. config CMD_STM32KEY
  155. bool "command stm32key to fuse public key hash"
  156. default n
  157. help
  158. fuse public key hash in corresponding fuse used to authenticate
  159. binary.
  160. This command is used to evaluate the secure boot on stm32mp SOC,
  161. it is deactivated by default in real products.
  162. config PRE_CON_BUF_ADDR
  163. default 0xC02FF000
  164. config PRE_CON_BUF_SZ
  165. default 4096
  166. config BOOTSTAGE_STASH_ADDR
  167. default 0xC3000000
  168. if BOOTCOUNT_LIMIT
  169. config SYS_BOOTCOUNT_SINGLEWORD
  170. default y
  171. # TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
  172. config SYS_BOOTCOUNT_ADDR
  173. default 0x5C00A154
  174. endif
  175. if DEBUG_UART
  176. config DEBUG_UART_BOARD_INIT
  177. default y
  178. # debug on UART4 by default
  179. config DEBUG_UART_BASE
  180. default 0x40010000
  181. # clock source is HSI on reset
  182. config DEBUG_UART_CLOCK
  183. default 64000000
  184. endif
  185. source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
  186. source "board/dhelectronics/dh_stm32mp1/Kconfig"
  187. source "board/engicam/stm32mp1/Kconfig"
  188. source "board/st/stm32mp1/Kconfig"
  189. endif