Kconfig 48 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed from
  16. almost any 4K aligned address. This logic relies on the relocation
  17. information that is embedded in the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config INIT_SP_RELATIVE
  20. bool "Specify the early stack pointer relative to the .bss section"
  21. default n if ARCH_QEMU
  22. default y if POSITION_INDEPENDENT
  23. help
  24. U-Boot typically uses a hard-coded value for the stack pointer
  25. before relocation. Enable this option to instead calculate the
  26. initial SP at run-time. This is useful to avoid hard-coding addresses
  27. into U-Boot, so that it can be loaded and executed at arbitrary
  28. addresses and thus avoid using arbitrary addresses at runtime.
  29. If this option is enabled, the early stack pointer is set to
  30. &_bss_start with a offset value added. The offset is specified by
  31. SYS_INIT_SP_BSS_OFFSET.
  32. config SYS_INIT_SP_BSS_OFFSET
  33. int "Early stack offset from the .bss base address"
  34. depends on INIT_SP_RELATIVE
  35. default 524288
  36. help
  37. This option's value is the offset added to &_bss_start in order to
  38. calculate the stack pointer. This offset should be large enough so
  39. that the early malloc region, global data (gd), and early stack usage
  40. do not overlap any appended DTB.
  41. config LINUX_KERNEL_IMAGE_HEADER
  42. bool
  43. help
  44. Place a Linux kernel image header at the start of the U-Boot binary.
  45. The format of the header is described in the Linux kernel source at
  46. Documentation/arm64/booting.txt. This feature is useful since the
  47. image header reports the amount of memory (BSS and similar) that
  48. U-Boot needs to use, but which isn't part of the binary.
  49. if LINUX_KERNEL_IMAGE_HEADER
  50. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  51. hex
  52. help
  53. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  54. TEXT_OFFSET value written to the Linux kernel image header.
  55. endif
  56. endif
  57. config GIC_V3_ITS
  58. bool "ARM GICV3 ITS"
  59. select REGMAP
  60. select SYSCON
  61. help
  62. ARM GICV3 Interrupt translation service (ITS).
  63. Basic support for programming locality specific peripheral
  64. interrupts (LPI) configuration tables and enable LPI tables.
  65. LPI configuration table can be used by u-boot or Linux.
  66. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  67. configuration table can not be re-programmed, unless GICV3 reset.
  68. config STATIC_RELA
  69. bool
  70. default y if ARM64
  71. config DMA_ADDR_T_64BIT
  72. bool
  73. default y if ARM64
  74. config HAS_VBAR
  75. bool
  76. config HAS_THUMB2
  77. bool
  78. # Used for compatibility with asm files copied from the kernel
  79. config ARM_ASM_UNIFIED
  80. bool
  81. default y
  82. # Used for compatibility with asm files copied from the kernel
  83. config THUMB2_KERNEL
  84. bool
  85. config SYS_ICACHE_OFF
  86. bool "Do not enable icache"
  87. default n
  88. help
  89. Do not enable instruction cache in U-Boot.
  90. config SPL_SYS_ICACHE_OFF
  91. bool "Do not enable icache in SPL"
  92. depends on SPL
  93. default SYS_ICACHE_OFF
  94. help
  95. Do not enable instruction cache in SPL.
  96. config SYS_DCACHE_OFF
  97. bool "Do not enable dcache"
  98. default n
  99. help
  100. Do not enable data cache in U-Boot.
  101. config SPL_SYS_DCACHE_OFF
  102. bool "Do not enable dcache in SPL"
  103. depends on SPL
  104. default SYS_DCACHE_OFF
  105. help
  106. Do not enable data cache in SPL.
  107. config SYS_ARM_CACHE_CP15
  108. bool "CP15 based cache enabling support"
  109. help
  110. Select this if your processor suports enabling caches by using
  111. CP15 registers.
  112. config SYS_ARM_MMU
  113. bool "MMU-based Paged Memory Management Support"
  114. select SYS_ARM_CACHE_CP15
  115. help
  116. Select if you want MMU-based virtualised addressing space
  117. support via paged memory management.
  118. config SYS_ARM_MPU
  119. bool 'Use the ARM v7 PMSA Compliant MPU'
  120. help
  121. Some ARM systems without an MMU have instead a Memory Protection
  122. Unit (MPU) that defines the type and permissions for regions of
  123. memory.
  124. If your CPU has an MPU then you should choose 'y' here unless you
  125. know that you do not want to use the MPU.
  126. # If set, the workarounds for these ARM errata are applied early during U-Boot
  127. # startup. Note that in general these options force the workarounds to be
  128. # applied; no CPU-type/version detection exists, unlike the similar options in
  129. # the Linux kernel. Do not set these options unless they apply! Also note that
  130. # the following can be machine-specific errata. These do have ability to
  131. # provide rudimentary version and machine-specific checks, but expect no
  132. # product checks:
  133. # CONFIG_ARM_ERRATA_430973
  134. # CONFIG_ARM_ERRATA_454179
  135. # CONFIG_ARM_ERRATA_621766
  136. # CONFIG_ARM_ERRATA_798870
  137. # CONFIG_ARM_ERRATA_801819
  138. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  139. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  140. config ARM_ERRATA_430973
  141. bool
  142. config ARM_ERRATA_454179
  143. bool
  144. config ARM_ERRATA_621766
  145. bool
  146. config ARM_ERRATA_716044
  147. bool
  148. config ARM_ERRATA_725233
  149. bool
  150. config ARM_ERRATA_742230
  151. bool
  152. config ARM_ERRATA_743622
  153. bool
  154. config ARM_ERRATA_751472
  155. bool
  156. config ARM_ERRATA_761320
  157. bool
  158. config ARM_ERRATA_773022
  159. bool
  160. config ARM_ERRATA_774769
  161. bool
  162. config ARM_ERRATA_794072
  163. bool
  164. config ARM_ERRATA_798870
  165. bool
  166. config ARM_ERRATA_801819
  167. bool
  168. config ARM_ERRATA_826974
  169. bool
  170. config ARM_ERRATA_828024
  171. bool
  172. config ARM_ERRATA_829520
  173. bool
  174. config ARM_ERRATA_833069
  175. bool
  176. config ARM_ERRATA_833471
  177. bool
  178. config ARM_ERRATA_845369
  179. bool
  180. config ARM_ERRATA_852421
  181. bool
  182. config ARM_ERRATA_852423
  183. bool
  184. config ARM_ERRATA_855873
  185. bool
  186. config ARM_CORTEX_A8_CVE_2017_5715
  187. bool
  188. config ARM_CORTEX_A15_CVE_2017_5715
  189. bool
  190. config CPU_ARM720T
  191. bool
  192. select SYS_CACHE_SHIFT_5
  193. imply SYS_ARM_MMU
  194. config CPU_ARM920T
  195. bool
  196. select SYS_CACHE_SHIFT_5
  197. imply SYS_ARM_MMU
  198. config CPU_ARM926EJS
  199. bool
  200. select SYS_CACHE_SHIFT_5
  201. imply SYS_ARM_MMU
  202. config CPU_ARM946ES
  203. bool
  204. select SYS_CACHE_SHIFT_5
  205. imply SYS_ARM_MMU
  206. config CPU_ARM1136
  207. bool
  208. select SYS_CACHE_SHIFT_5
  209. imply SYS_ARM_MMU
  210. config CPU_ARM1176
  211. bool
  212. select HAS_VBAR
  213. select SYS_CACHE_SHIFT_5
  214. imply SYS_ARM_MMU
  215. config CPU_V7A
  216. bool
  217. select HAS_THUMB2
  218. select HAS_VBAR
  219. select SYS_CACHE_SHIFT_6
  220. imply SYS_ARM_MMU
  221. config CPU_V7M
  222. bool
  223. select HAS_THUMB2
  224. select SYS_ARM_MPU
  225. select SYS_CACHE_SHIFT_5
  226. select SYS_THUMB_BUILD
  227. select THUMB2_KERNEL
  228. config CPU_V7R
  229. bool
  230. select HAS_THUMB2
  231. select SYS_ARM_CACHE_CP15
  232. select SYS_ARM_MPU
  233. select SYS_CACHE_SHIFT_6
  234. config CPU_PXA
  235. bool
  236. select SYS_CACHE_SHIFT_5
  237. imply SYS_ARM_MMU
  238. config CPU_SA1100
  239. bool
  240. select SYS_CACHE_SHIFT_5
  241. imply SYS_ARM_MMU
  242. config SYS_CPU
  243. default "arm720t" if CPU_ARM720T
  244. default "arm920t" if CPU_ARM920T
  245. default "arm926ejs" if CPU_ARM926EJS
  246. default "arm946es" if CPU_ARM946ES
  247. default "arm1136" if CPU_ARM1136
  248. default "arm1176" if CPU_ARM1176
  249. default "armv7" if CPU_V7A
  250. default "armv7" if CPU_V7R
  251. default "armv7m" if CPU_V7M
  252. default "pxa" if CPU_PXA
  253. default "sa1100" if CPU_SA1100
  254. default "armv8" if ARM64
  255. config SYS_ARM_ARCH
  256. int
  257. default 4 if CPU_ARM720T
  258. default 4 if CPU_ARM920T
  259. default 5 if CPU_ARM926EJS
  260. default 5 if CPU_ARM946ES
  261. default 6 if CPU_ARM1136
  262. default 6 if CPU_ARM1176
  263. default 7 if CPU_V7A
  264. default 7 if CPU_V7M
  265. default 7 if CPU_V7R
  266. default 5 if CPU_PXA
  267. default 4 if CPU_SA1100
  268. default 8 if ARM64
  269. config SYS_CACHE_SHIFT_5
  270. bool
  271. config SYS_CACHE_SHIFT_6
  272. bool
  273. config SYS_CACHE_SHIFT_7
  274. bool
  275. config SYS_CACHELINE_SIZE
  276. int
  277. default 128 if SYS_CACHE_SHIFT_7
  278. default 64 if SYS_CACHE_SHIFT_6
  279. default 32 if SYS_CACHE_SHIFT_5
  280. choice
  281. prompt "Select the ARM data write cache policy"
  282. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  283. TARGET_BCMNSP || CPU_PXA || RZA1
  284. default SYS_ARM_CACHE_WRITEBACK
  285. config SYS_ARM_CACHE_WRITEBACK
  286. bool "Write-back (WB)"
  287. help
  288. A write updates the cache only and marks the cache line as dirty.
  289. External memory is updated only when the line is evicted or explicitly
  290. cleaned.
  291. config SYS_ARM_CACHE_WRITETHROUGH
  292. bool "Write-through (WT)"
  293. help
  294. A write updates both the cache and the external memory system.
  295. This does not mark the cache line as dirty.
  296. config SYS_ARM_CACHE_WRITEALLOC
  297. bool "Write allocation (WA)"
  298. help
  299. A cache line is allocated on a write miss. This means that executing a
  300. store instruction on the processor might cause a burst read to occur.
  301. There is a linefill to obtain the data for the cache line, before the
  302. write is performed.
  303. endchoice
  304. config ARCH_CPU_INIT
  305. bool "Enable ARCH_CPU_INIT"
  306. help
  307. Some architectures require a call to arch_cpu_init().
  308. Say Y here to enable it
  309. config SYS_ARCH_TIMER
  310. bool "ARM Generic Timer support"
  311. depends on CPU_V7A || ARM64
  312. default y if ARM64
  313. help
  314. The ARM Generic Timer (aka arch-timer) provides an architected
  315. interface to a timer source on an SoC.
  316. It is mandatory for ARMv8 implementation and widely available
  317. on ARMv7 systems.
  318. config ARM_SMCCC
  319. bool "Support for ARM SMC Calling Convention (SMCCC)"
  320. depends on CPU_V7A || ARM64
  321. select ARM_PSCI_FW
  322. help
  323. Say Y here if you want to enable ARM SMC Calling Convention.
  324. This should be enabled if U-Boot needs to communicate with system
  325. firmware (for example, PSCI) according to SMCCC.
  326. config SEMIHOSTING
  327. bool "support boot from semihosting"
  328. help
  329. In emulated environments, semihosting is a way for
  330. the hosted environment to call out to the emulator to
  331. retrieve files from the host machine.
  332. config SYS_THUMB_BUILD
  333. bool "Build U-Boot using the Thumb instruction set"
  334. depends on !ARM64
  335. help
  336. Use this flag to build U-Boot using the Thumb instruction set for
  337. ARM architectures. Thumb instruction set provides better code
  338. density. For ARM architectures that support Thumb2 this flag will
  339. result in Thumb2 code generated by GCC.
  340. config SPL_SYS_THUMB_BUILD
  341. bool "Build SPL using the Thumb instruction set"
  342. default y if SYS_THUMB_BUILD
  343. depends on !ARM64 && SPL
  344. help
  345. Use this flag to build SPL using the Thumb instruction set for
  346. ARM architectures. Thumb instruction set provides better code
  347. density. For ARM architectures that support Thumb2 this flag will
  348. result in Thumb2 code generated by GCC.
  349. config TPL_SYS_THUMB_BUILD
  350. bool "Build TPL using the Thumb instruction set"
  351. default y if SYS_THUMB_BUILD
  352. depends on TPL && !ARM64
  353. help
  354. Use this flag to build TPL using the Thumb instruction set for
  355. ARM architectures. Thumb instruction set provides better code
  356. density. For ARM architectures that support Thumb2 this flag will
  357. result in Thumb2 code generated by GCC.
  358. config SYS_L2CACHE_OFF
  359. bool "L2cache off"
  360. help
  361. If SoC does not support L2CACHE or one does not want to enable
  362. L2CACHE, choose this option.
  363. config ENABLE_ARM_SOC_BOOT0_HOOK
  364. bool "prepare BOOT0 header"
  365. help
  366. If the SoC's BOOT0 requires a header area filled with (magic)
  367. values, then choose this option, and create a file included as
  368. <asm/arch/boot0.h> which contains the required assembler code.
  369. config ARM_CORTEX_CPU_IS_UP
  370. bool
  371. default n
  372. config USE_ARCH_MEMCPY
  373. bool "Use an assembly optimized implementation of memcpy"
  374. default y
  375. depends on !ARM64
  376. help
  377. Enable the generation of an optimized version of memcpy.
  378. Such an implementation may be faster under some conditions
  379. but may increase the binary size.
  380. config SPL_USE_ARCH_MEMCPY
  381. bool "Use an assembly optimized implementation of memcpy for SPL"
  382. default y if USE_ARCH_MEMCPY
  383. depends on !ARM64 && SPL
  384. help
  385. Enable the generation of an optimized version of memcpy.
  386. Such an implementation may be faster under some conditions
  387. but may increase the binary size.
  388. config TPL_USE_ARCH_MEMCPY
  389. bool "Use an assembly optimized implementation of memcpy for TPL"
  390. default y if USE_ARCH_MEMCPY
  391. depends on !ARM64 && TPL
  392. help
  393. Enable the generation of an optimized version of memcpy.
  394. Such an implementation may be faster under some conditions
  395. but may increase the binary size.
  396. config USE_ARCH_MEMSET
  397. bool "Use an assembly optimized implementation of memset"
  398. default y
  399. depends on !ARM64
  400. help
  401. Enable the generation of an optimized version of memset.
  402. Such an implementation may be faster under some conditions
  403. but may increase the binary size.
  404. config SPL_USE_ARCH_MEMSET
  405. bool "Use an assembly optimized implementation of memset for SPL"
  406. default y if USE_ARCH_MEMSET
  407. depends on !ARM64 && SPL
  408. help
  409. Enable the generation of an optimized version of memset.
  410. Such an implementation may be faster under some conditions
  411. but may increase the binary size.
  412. config TPL_USE_ARCH_MEMSET
  413. bool "Use an assembly optimized implementation of memset for TPL"
  414. default y if USE_ARCH_MEMSET
  415. depends on !ARM64 && TPL
  416. help
  417. Enable the generation of an optimized version of memset.
  418. Such an implementation may be faster under some conditions
  419. but may increase the binary size.
  420. config ARM64_SUPPORT_AARCH32
  421. bool "ARM64 system support AArch32 execution state"
  422. depends on ARM64
  423. default y if !TARGET_THUNDERX_88XX
  424. help
  425. This ARM64 system supports AArch32 execution state.
  426. choice
  427. prompt "Target select"
  428. default TARGET_HIKEY
  429. config ARCH_AT91
  430. bool "Atmel AT91"
  431. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  432. select SPL_SEPARATE_BSS if SPL
  433. config TARGET_EDB93XX
  434. bool "Support edb93xx"
  435. select CPU_ARM920T
  436. select PL010_SERIAL
  437. config TARGET_ASPENITE
  438. bool "Support aspenite"
  439. select CPU_ARM926EJS
  440. config TARGET_GPLUGD
  441. bool "Support gplugd"
  442. select CPU_ARM926EJS
  443. config ARCH_DAVINCI
  444. bool "TI DaVinci"
  445. select CPU_ARM926EJS
  446. select SPL_DM_SPI if SPL
  447. imply CMD_SAVES
  448. help
  449. Support for TI's DaVinci platform.
  450. config ARCH_KIRKWOOD
  451. bool "Marvell Kirkwood"
  452. select ARCH_MISC_INIT
  453. select BOARD_EARLY_INIT_F
  454. select CPU_ARM926EJS
  455. config ARCH_MVEBU
  456. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  457. select DM
  458. select DM_ETH
  459. select DM_SERIAL
  460. select DM_SPI
  461. select DM_SPI_FLASH
  462. select SPL_DM_SPI if SPL
  463. select SPL_DM_SPI_FLASH if SPL
  464. select OF_CONTROL
  465. select OF_SEPARATE
  466. select SPI
  467. imply CMD_DM
  468. config TARGET_APF27
  469. bool "Support apf27"
  470. select CPU_ARM926EJS
  471. select SUPPORT_SPL
  472. config ARCH_ORION5X
  473. bool "Marvell Orion"
  474. select CPU_ARM926EJS
  475. config TARGET_SPEAR300
  476. bool "Support spear300"
  477. select BOARD_EARLY_INIT_F
  478. select CPU_ARM926EJS
  479. select PL011_SERIAL
  480. imply CMD_SAVES
  481. config TARGET_SPEAR310
  482. bool "Support spear310"
  483. select BOARD_EARLY_INIT_F
  484. select CPU_ARM926EJS
  485. select PL011_SERIAL
  486. imply CMD_SAVES
  487. config TARGET_SPEAR320
  488. bool "Support spear320"
  489. select BOARD_EARLY_INIT_F
  490. select CPU_ARM926EJS
  491. select PL011_SERIAL
  492. imply CMD_SAVES
  493. config TARGET_SPEAR600
  494. bool "Support spear600"
  495. select BOARD_EARLY_INIT_F
  496. select CPU_ARM926EJS
  497. select PL011_SERIAL
  498. imply CMD_SAVES
  499. config TARGET_STV0991
  500. bool "Support stv0991"
  501. select CPU_V7A
  502. select DM
  503. select DM_SERIAL
  504. select DM_SPI
  505. select DM_SPI_FLASH
  506. select PL01X_SERIAL
  507. select SPI
  508. select SPI_FLASH
  509. imply CMD_DM
  510. config TARGET_X600
  511. bool "Support x600"
  512. select BOARD_LATE_INIT
  513. select CPU_ARM926EJS
  514. select PL011_SERIAL
  515. select SUPPORT_SPL
  516. config TARGET_FLEA3
  517. bool "Support flea3"
  518. select CPU_ARM1136
  519. config ARCH_BCM283X
  520. bool "Broadcom BCM283X family"
  521. select DM
  522. select DM_GPIO
  523. select DM_SERIAL
  524. select OF_CONTROL
  525. select PL01X_SERIAL
  526. select SERIAL_SEARCH_ALL
  527. imply CMD_DM
  528. imply FAT_WRITE
  529. config ARCH_BCM63158
  530. bool "Broadcom BCM63158 family"
  531. select DM
  532. select OF_CONTROL
  533. imply CMD_DM
  534. config ARCH_BCM68360
  535. bool "Broadcom BCM68360 family"
  536. select DM
  537. select OF_CONTROL
  538. imply CMD_DM
  539. config ARCH_BCM6858
  540. bool "Broadcom BCM6858 family"
  541. select DM
  542. select OF_CONTROL
  543. imply CMD_DM
  544. config TARGET_VEXPRESS_CA15_TC2
  545. bool "Support vexpress_ca15_tc2"
  546. select CPU_V7A
  547. select CPU_V7_HAS_NONSEC
  548. select CPU_V7_HAS_VIRT
  549. select PL011_SERIAL
  550. config ARCH_BCMSTB
  551. bool "Broadcom BCM7XXX family"
  552. select CPU_V7A
  553. select DM
  554. select OF_CONTROL
  555. select OF_PRIOR_STAGE
  556. imply CMD_DM
  557. help
  558. This enables support for Broadcom ARM-based set-top box
  559. chipsets, including the 7445 family of chips.
  560. config TARGET_VEXPRESS_CA5X2
  561. bool "Support vexpress_ca5x2"
  562. select CPU_V7A
  563. select PL011_SERIAL
  564. config TARGET_VEXPRESS_CA9X4
  565. bool "Support vexpress_ca9x4"
  566. select CPU_V7A
  567. select PL011_SERIAL
  568. config TARGET_BCM23550_W1D
  569. bool "Support bcm23550_w1d"
  570. select CPU_V7A
  571. imply CRC32_VERIFY
  572. imply FAT_WRITE
  573. config TARGET_BCM28155_AP
  574. bool "Support bcm28155_ap"
  575. select CPU_V7A
  576. imply CRC32_VERIFY
  577. imply FAT_WRITE
  578. config TARGET_BCMCYGNUS
  579. bool "Support bcmcygnus"
  580. select CPU_V7A
  581. imply BCM_SF2_ETH
  582. imply BCM_SF2_ETH_GMAC
  583. imply CMD_HASH
  584. imply CRC32_VERIFY
  585. imply FAT_WRITE
  586. imply HASH_VERIFY
  587. imply NETDEVICES
  588. config TARGET_BCMNSP
  589. bool "Support bcmnsp"
  590. select CPU_V7A
  591. config TARGET_BCMNS2
  592. bool "Support Broadcom Northstar2"
  593. select ARM64
  594. help
  595. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  596. ARMv8 Cortex-A57 processors targeting a broad range of networking
  597. applications.
  598. config TARGET_BCMNS3
  599. bool "Support Broadcom NS3"
  600. select ARM64
  601. select BOARD_LATE_INIT
  602. help
  603. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  604. ARMv8 Cortex-A72 processors targeting a broad range of networking
  605. applications.
  606. config ARCH_EXYNOS
  607. bool "Samsung EXYNOS"
  608. select DM
  609. select DM_GPIO
  610. select DM_I2C
  611. select DM_KEYBOARD
  612. select DM_SERIAL
  613. select DM_SPI
  614. select DM_SPI_FLASH
  615. select SPI
  616. imply SYS_THUMB_BUILD
  617. imply CMD_DM
  618. imply FAT_WRITE
  619. config ARCH_S5PC1XX
  620. bool "Samsung S5PC1XX"
  621. select CPU_V7A
  622. select DM
  623. select DM_GPIO
  624. select DM_I2C
  625. select DM_SERIAL
  626. imply CMD_DM
  627. config ARCH_HIGHBANK
  628. bool "Calxeda Highbank"
  629. select CPU_V7A
  630. select PL011_SERIAL
  631. config ARCH_INTEGRATOR
  632. bool "ARM Ltd. Integrator family"
  633. select DM
  634. select DM_SERIAL
  635. select PL01X_SERIAL
  636. imply CMD_DM
  637. config ARCH_IPQ40XX
  638. bool "Qualcomm IPQ40xx SoCs"
  639. select CPU_V7A
  640. select DM
  641. select DM_GPIO
  642. select DM_SERIAL
  643. select DM_RESET
  644. select MSM_SMEM
  645. select PINCTRL
  646. select CLK
  647. select SMEM
  648. select OF_CONTROL
  649. imply CMD_DM
  650. config ARCH_KEYSTONE
  651. bool "TI Keystone"
  652. select CMD_POWEROFF
  653. select CPU_V7A
  654. select SUPPORT_SPL
  655. select SYS_ARCH_TIMER
  656. select SYS_THUMB_BUILD
  657. imply CMD_MTDPARTS
  658. imply CMD_SAVES
  659. imply FIT
  660. config ARCH_K3
  661. bool "Texas Instruments' K3 Architecture"
  662. select SPL
  663. select SUPPORT_SPL
  664. select FIT
  665. config ARCH_OMAP2PLUS
  666. bool "TI OMAP2+"
  667. select CPU_V7A
  668. select SPL_BOARD_INIT if SPL
  669. select SPL_STACK_R if SPL
  670. select SUPPORT_SPL
  671. imply TI_SYSC if DM && OF_CONTROL
  672. imply FIT
  673. config ARCH_MESON
  674. bool "Amlogic Meson"
  675. imply DISTRO_DEFAULTS
  676. imply DM_RNG
  677. help
  678. Support for the Meson SoC family developed by Amlogic Inc.,
  679. targeted at media players and tablet computers. We currently
  680. support the S905 (GXBaby) 64-bit SoC.
  681. config ARCH_MEDIATEK
  682. bool "MediaTek SoCs"
  683. select DM
  684. select OF_CONTROL
  685. select SPL_DM if SPL
  686. select SPL_LIBCOMMON_SUPPORT if SPL
  687. select SPL_LIBGENERIC_SUPPORT if SPL
  688. select SPL_OF_CONTROL if SPL
  689. select SUPPORT_SPL
  690. help
  691. Support for the MediaTek SoCs family developed by MediaTek Inc.
  692. Please refer to doc/README.mediatek for more information.
  693. config ARCH_LPC32XX
  694. bool "NXP LPC32xx platform"
  695. select CPU_ARM926EJS
  696. select DM
  697. select DM_GPIO
  698. select DM_SERIAL
  699. select SPL_DM if SPL
  700. select SUPPORT_SPL
  701. imply CMD_DM
  702. config ARCH_IMX8
  703. bool "NXP i.MX8 platform"
  704. select ARM64
  705. select DM
  706. select OF_CONTROL
  707. select ENABLE_ARM_SOC_BOOT0_HOOK
  708. config ARCH_IMX8M
  709. bool "NXP i.MX8M platform"
  710. select ARM64
  711. select DM
  712. select SUPPORT_SPL
  713. imply CMD_DM
  714. config ARCH_IMXRT
  715. bool "NXP i.MXRT platform"
  716. select CPU_V7M
  717. select DM
  718. select DM_SERIAL
  719. select SUPPORT_SPL
  720. imply CMD_DM
  721. config ARCH_MX23
  722. bool "NXP i.MX23 family"
  723. select CPU_ARM926EJS
  724. select PL011_SERIAL
  725. select SUPPORT_SPL
  726. config ARCH_MX25
  727. bool "NXP MX25"
  728. select CPU_ARM926EJS
  729. imply MXC_GPIO
  730. config ARCH_MX28
  731. bool "NXP i.MX28 family"
  732. select CPU_ARM926EJS
  733. select PL011_SERIAL
  734. select SUPPORT_SPL
  735. config ARCH_MX31
  736. bool "NXP i.MX31 family"
  737. select CPU_ARM1136
  738. config ARCH_MX7ULP
  739. bool "NXP MX7ULP"
  740. select CPU_V7A
  741. select ROM_UNIFIED_SECTIONS
  742. imply MXC_GPIO
  743. imply SYS_THUMB_BUILD
  744. config ARCH_MX7
  745. bool "Freescale MX7"
  746. select ARCH_MISC_INIT
  747. select CPU_V7A
  748. select SYS_FSL_HAS_SEC if IMX_HAB
  749. select SYS_FSL_SEC_COMPAT_4
  750. select SYS_FSL_SEC_LE
  751. imply BOARD_EARLY_INIT_F
  752. imply MXC_GPIO
  753. imply SYS_THUMB_BUILD
  754. config ARCH_MX6
  755. bool "Freescale MX6"
  756. select CPU_V7A
  757. select SYS_FSL_HAS_SEC
  758. select SYS_FSL_SEC_COMPAT_4
  759. select SYS_FSL_SEC_LE
  760. imply MXC_GPIO
  761. imply SYS_THUMB_BUILD
  762. if ARCH_MX6
  763. config SPL_LDSCRIPT
  764. default "arch/arm/mach-omap2/u-boot-spl.lds"
  765. endif
  766. config ARCH_MX5
  767. bool "Freescale MX5"
  768. select BOARD_EARLY_INIT_F
  769. select CPU_V7A
  770. imply MXC_GPIO
  771. config ARCH_NEXELL
  772. bool "Nexell S5P4418/S5P6818 SoC"
  773. select ENABLE_ARM_SOC_BOOT0_HOOK
  774. select DM
  775. config ARCH_OWL
  776. bool "Actions Semi OWL SoCs"
  777. select DM
  778. select DM_ETH
  779. select DM_SERIAL
  780. select OWL_SERIAL
  781. select CLK
  782. select CLK_OWL
  783. select OF_CONTROL
  784. select SYS_RELOC_GD_ENV_ADDR
  785. imply CMD_DM
  786. config ARCH_QEMU
  787. bool "QEMU Virtual Platform"
  788. select DM
  789. select DM_SERIAL
  790. select OF_CONTROL
  791. select PL01X_SERIAL
  792. imply CMD_DM
  793. imply DM_RNG
  794. imply DM_RTC
  795. imply RTC_PL031
  796. config ARCH_RMOBILE
  797. bool "Renesas ARM SoCs"
  798. select DM
  799. select DM_SERIAL
  800. imply BOARD_EARLY_INIT_F
  801. imply CMD_DM
  802. imply FAT_WRITE
  803. imply SYS_THUMB_BUILD
  804. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  805. config TARGET_S32V234EVB
  806. bool "Support s32v234evb"
  807. select ARM64
  808. select SYS_FSL_ERRATUM_ESDHC111
  809. config ARCH_SNAPDRAGON
  810. bool "Qualcomm Snapdragon SoCs"
  811. select ARM64
  812. select DM
  813. select DM_GPIO
  814. select DM_SERIAL
  815. select MSM_SMEM
  816. select OF_CONTROL
  817. select OF_SEPARATE
  818. select SMEM
  819. select SPMI
  820. imply CMD_DM
  821. config ARCH_SOCFPGA
  822. bool "Altera SOCFPGA family"
  823. select ARCH_EARLY_INIT_R
  824. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  825. select ARM64 if TARGET_SOCFPGA_SOC64
  826. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  827. select DM
  828. select DM_SERIAL
  829. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  830. select OF_CONTROL
  831. select SPL_DM_RESET if DM_RESET
  832. select SPL_DM_SERIAL
  833. select SPL_LIBCOMMON_SUPPORT
  834. select SPL_LIBGENERIC_SUPPORT
  835. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  836. select SPL_OF_CONTROL
  837. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
  838. select SPL_SERIAL_SUPPORT
  839. select SPL_SYSRESET
  840. select SPL_WATCHDOG_SUPPORT
  841. select SUPPORT_SPL
  842. select SYS_NS16550
  843. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  844. select SYSRESET
  845. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  846. select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
  847. imply CMD_DM
  848. imply CMD_MTDPARTS
  849. imply CRC32_VERIFY
  850. imply DM_SPI
  851. imply DM_SPI_FLASH
  852. imply FAT_WRITE
  853. imply SPL
  854. imply SPL_DM
  855. imply SPL_DM_SPI
  856. imply SPL_DM_SPI_FLASH
  857. imply SPL_LIBDISK_SUPPORT
  858. imply SPL_MMC_SUPPORT
  859. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  860. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  861. imply SPL_SPI_FLASH_SUPPORT
  862. imply SPL_SPI_SUPPORT
  863. imply L2X0_CACHE
  864. config ARCH_SUNXI
  865. bool "Support sunxi (Allwinner) SoCs"
  866. select BINMAN
  867. select CMD_GPIO
  868. select CMD_MMC if MMC
  869. select CMD_USB if DISTRO_DEFAULTS
  870. select CLK
  871. select DM
  872. select DM_ETH
  873. select DM_GPIO
  874. select DM_KEYBOARD
  875. select DM_MMC if MMC
  876. select DM_SCSI if SCSI
  877. select DM_SERIAL
  878. select DM_USB if DISTRO_DEFAULTS
  879. select OF_BOARD_SETUP
  880. select OF_CONTROL
  881. select OF_SEPARATE
  882. select SPECIFY_CONSOLE_INDEX
  883. select SPL_STACK_R if SPL
  884. select SPL_SYS_MALLOC_SIMPLE if SPL
  885. select SPL_SYS_THUMB_BUILD if !ARM64
  886. select SUNXI_GPIO
  887. select SYS_NS16550
  888. select SYS_THUMB_BUILD if !ARM64
  889. select USB if DISTRO_DEFAULTS
  890. select USB_KEYBOARD if DISTRO_DEFAULTS
  891. select USB_STORAGE if DISTRO_DEFAULTS
  892. select SPL_USE_TINY_PRINTF
  893. select USE_PREBOOT
  894. select SYS_RELOC_GD_ENV_ADDR
  895. imply BOARD_LATE_INIT
  896. imply CMD_DM
  897. imply CMD_GPT
  898. imply CMD_UBI if MTD_RAW_NAND
  899. imply DISTRO_DEFAULTS
  900. imply FAT_WRITE
  901. imply FIT
  902. imply OF_LIBFDT_OVERLAY
  903. imply PRE_CONSOLE_BUFFER
  904. imply SPL_GPIO_SUPPORT
  905. imply SPL_LIBCOMMON_SUPPORT
  906. imply SPL_LIBGENERIC_SUPPORT
  907. imply SPL_MMC_SUPPORT if MMC
  908. imply SPL_POWER_SUPPORT
  909. imply SPL_SERIAL_SUPPORT
  910. imply USB_GADGET
  911. config ARCH_U8500
  912. bool "ST-Ericsson U8500 Series"
  913. select CPU_V7A
  914. select DM
  915. select DM_GPIO
  916. select DM_MMC if MMC
  917. select DM_SERIAL
  918. select DM_USB if USB
  919. select OF_CONTROL
  920. select SYSRESET
  921. select TIMER
  922. imply ARM_PL180_MMCI
  923. imply DM_RTC
  924. imply NOMADIK_MTU_TIMER
  925. imply PL01X_SERIAL
  926. imply RTC_PL031
  927. imply SYSRESET_SYSCON
  928. config ARCH_VERSAL
  929. bool "Support Xilinx Versal Platform"
  930. select ARM64
  931. select CLK
  932. select DM
  933. select DM_ETH if NET
  934. select DM_MMC if MMC
  935. select DM_SERIAL
  936. select OF_CONTROL
  937. imply BOARD_LATE_INIT
  938. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  939. config ARCH_VF610
  940. bool "Freescale Vybrid"
  941. select CPU_V7A
  942. select SYS_FSL_ERRATUM_ESDHC111
  943. imply CMD_MTDPARTS
  944. imply MTD_RAW_NAND
  945. config ARCH_ZYNQ
  946. bool "Xilinx Zynq based platform"
  947. select CLK
  948. select CLK_ZYNQ
  949. select CPU_V7A
  950. select DM
  951. select DM_ETH if NET
  952. select DM_MMC if MMC
  953. select DM_SERIAL
  954. select DM_SPI
  955. select DM_SPI_FLASH
  956. select DM_USB if USB
  957. select OF_CONTROL
  958. select SPI
  959. select SPL_BOARD_INIT if SPL
  960. select SPL_CLK if SPL
  961. select SPL_DM if SPL
  962. select SPL_DM_SPI if SPL
  963. select SPL_DM_SPI_FLASH if SPL
  964. select SPL_OF_CONTROL if SPL
  965. select SPL_SEPARATE_BSS if SPL
  966. select SUPPORT_SPL
  967. imply ARCH_EARLY_INIT_R
  968. imply BOARD_LATE_INIT
  969. imply CMD_CLK
  970. imply CMD_DM
  971. imply CMD_SPL
  972. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  973. imply FAT_WRITE
  974. config ARCH_ZYNQMP_R5
  975. bool "Xilinx ZynqMP R5 based platform"
  976. select CLK
  977. select CPU_V7R
  978. select DM
  979. select DM_ETH if NET
  980. select DM_MMC if MMC
  981. select DM_SERIAL
  982. select OF_CONTROL
  983. imply CMD_DM
  984. imply DM_USB_GADGET
  985. config ARCH_ZYNQMP
  986. bool "Xilinx ZynqMP based platform"
  987. select ARM64
  988. select CLK
  989. select DM
  990. select DM_ETH if NET
  991. select DM_MAILBOX
  992. select DM_MMC if MMC
  993. select DM_SERIAL
  994. select DM_SPI if SPI
  995. select DM_SPI_FLASH if DM_SPI
  996. select DM_USB if USB
  997. select FIRMWARE
  998. select OF_CONTROL
  999. select SPL_BOARD_INIT if SPL
  1000. select SPL_CLK if SPL
  1001. select SPL_DM if SPL
  1002. select SPL_DM_SPI if SPI && SPL_DM
  1003. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  1004. select SPL_DM_MAILBOX if SPL
  1005. select SPL_FIRMWARE if SPL
  1006. select SPL_SEPARATE_BSS if SPL
  1007. select SUPPORT_SPL
  1008. select ZYNQMP_IPI
  1009. imply BOARD_LATE_INIT
  1010. imply CMD_DM
  1011. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1012. imply FAT_WRITE
  1013. imply MP
  1014. imply DM_USB_GADGET
  1015. config ARCH_TEGRA
  1016. bool "NVIDIA Tegra"
  1017. imply DISTRO_DEFAULTS
  1018. imply FAT_WRITE
  1019. config TARGET_VEXPRESS64_AEMV8A
  1020. bool "Support vexpress_aemv8a"
  1021. select ARM64
  1022. select PL01X_SERIAL
  1023. config TARGET_VEXPRESS64_BASE_FVP
  1024. bool "Support Versatile Express ARMv8a FVP BASE model"
  1025. select ARM64
  1026. select PL01X_SERIAL
  1027. select SEMIHOSTING
  1028. config TARGET_VEXPRESS64_JUNO
  1029. bool "Support Versatile Express Juno Development Platform"
  1030. select ARM64
  1031. select PL01X_SERIAL
  1032. select DM
  1033. select OF_CONTROL
  1034. select OF_BOARD
  1035. select CLK
  1036. select DM_SERIAL
  1037. select ARM_PSCI_FW
  1038. select PSCI_RESET
  1039. select DM_ETH
  1040. select BLK
  1041. select USB
  1042. select DM_USB
  1043. config TARGET_TOTAL_COMPUTE
  1044. bool "Support Total Compute Platform"
  1045. select ARM64
  1046. select PL01X_SERIAL
  1047. select DM
  1048. select DM_SERIAL
  1049. select DM_MMC
  1050. select DM_GPIO
  1051. config TARGET_LS2080A_EMU
  1052. bool "Support ls2080a_emu"
  1053. select ARCH_LS2080A
  1054. select ARM64
  1055. select ARMV8_MULTIENTRY
  1056. select FSL_DDR_SYNC_REFRESH
  1057. help
  1058. Support for Freescale LS2080A_EMU platform.
  1059. The LS2080A Development System (EMULATOR) is a pre-silicon
  1060. development platform that supports the QorIQ LS2080A
  1061. Layerscape Architecture processor.
  1062. config TARGET_LS1088AQDS
  1063. bool "Support ls1088aqds"
  1064. select ARCH_LS1088A
  1065. select ARM64
  1066. select ARMV8_MULTIENTRY
  1067. select ARCH_SUPPORT_TFABOOT
  1068. select BOARD_LATE_INIT
  1069. select SUPPORT_SPL
  1070. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1071. help
  1072. Support for NXP LS1088AQDS platform.
  1073. The LS1088A Development System (QDS) is a high-performance
  1074. development platform that supports the QorIQ LS1088A
  1075. Layerscape Architecture processor.
  1076. config TARGET_LS2080AQDS
  1077. bool "Support ls2080aqds"
  1078. select ARCH_LS2080A
  1079. select ARM64
  1080. select ARMV8_MULTIENTRY
  1081. select ARCH_SUPPORT_TFABOOT
  1082. select BOARD_LATE_INIT
  1083. select SUPPORT_SPL
  1084. imply SCSI
  1085. imply SCSI_AHCI
  1086. select FSL_DDR_BIST
  1087. select FSL_DDR_INTERACTIVE if !SPL
  1088. help
  1089. Support for Freescale LS2080AQDS platform.
  1090. The LS2080A Development System (QDS) is a high-performance
  1091. development platform that supports the QorIQ LS2080A
  1092. Layerscape Architecture processor.
  1093. config TARGET_LS2080ARDB
  1094. bool "Support ls2080ardb"
  1095. select ARCH_LS2080A
  1096. select ARM64
  1097. select ARMV8_MULTIENTRY
  1098. select ARCH_SUPPORT_TFABOOT
  1099. select BOARD_LATE_INIT
  1100. select SUPPORT_SPL
  1101. select FSL_DDR_BIST
  1102. select FSL_DDR_INTERACTIVE if !SPL
  1103. imply SCSI
  1104. imply SCSI_AHCI
  1105. help
  1106. Support for Freescale LS2080ARDB platform.
  1107. The LS2080A Reference design board (RDB) is a high-performance
  1108. development platform that supports the QorIQ LS2080A
  1109. Layerscape Architecture processor.
  1110. config TARGET_LS2081ARDB
  1111. bool "Support ls2081ardb"
  1112. select ARCH_LS2080A
  1113. select ARM64
  1114. select ARMV8_MULTIENTRY
  1115. select BOARD_LATE_INIT
  1116. select SUPPORT_SPL
  1117. help
  1118. Support for Freescale LS2081ARDB platform.
  1119. The LS2081A Reference design board (RDB) is a high-performance
  1120. development platform that supports the QorIQ LS2081A/LS2041A
  1121. Layerscape Architecture processor.
  1122. config TARGET_LX2160ARDB
  1123. bool "Support lx2160ardb"
  1124. select ARCH_LX2160A
  1125. select ARM64
  1126. select ARMV8_MULTIENTRY
  1127. select ARCH_SUPPORT_TFABOOT
  1128. select BOARD_LATE_INIT
  1129. help
  1130. Support for NXP LX2160ARDB platform.
  1131. The lx2160ardb (LX2160A Reference design board (RDB)
  1132. is a high-performance development platform that supports the
  1133. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1134. config TARGET_LX2160AQDS
  1135. bool "Support lx2160aqds"
  1136. select ARCH_LX2160A
  1137. select ARM64
  1138. select ARMV8_MULTIENTRY
  1139. select ARCH_SUPPORT_TFABOOT
  1140. select BOARD_LATE_INIT
  1141. help
  1142. Support for NXP LX2160AQDS platform.
  1143. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1144. is a high-performance development platform that supports the
  1145. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1146. config TARGET_LX2162AQDS
  1147. bool "Support lx2162aqds"
  1148. select ARCH_LX2162A
  1149. select ARCH_MISC_INIT
  1150. select ARM64
  1151. select ARMV8_MULTIENTRY
  1152. select ARCH_SUPPORT_TFABOOT
  1153. select BOARD_LATE_INIT
  1154. help
  1155. Support for NXP LX2162AQDS platform.
  1156. The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
  1157. config TARGET_HIKEY
  1158. bool "Support HiKey 96boards Consumer Edition Platform"
  1159. select ARM64
  1160. select DM
  1161. select DM_GPIO
  1162. select DM_SERIAL
  1163. select OF_CONTROL
  1164. select PL01X_SERIAL
  1165. select SPECIFY_CONSOLE_INDEX
  1166. imply CMD_DM
  1167. help
  1168. Support for HiKey 96boards platform. It features a HI6220
  1169. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1170. config TARGET_HIKEY960
  1171. bool "Support HiKey960 96boards Consumer Edition Platform"
  1172. select ARM64
  1173. select DM
  1174. select DM_SERIAL
  1175. select OF_CONTROL
  1176. select PL01X_SERIAL
  1177. imply CMD_DM
  1178. help
  1179. Support for HiKey960 96boards platform. It features a HI3660
  1180. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1181. config TARGET_POPLAR
  1182. bool "Support Poplar 96boards Enterprise Edition Platform"
  1183. select ARM64
  1184. select DM
  1185. select DM_SERIAL
  1186. select DM_USB
  1187. select OF_CONTROL
  1188. select PL01X_SERIAL
  1189. imply CMD_DM
  1190. help
  1191. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1192. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1193. making it capable of running any commercial set-top solution based on
  1194. Linux or Android.
  1195. config TARGET_LS1012AQDS
  1196. bool "Support ls1012aqds"
  1197. select ARCH_LS1012A
  1198. select ARM64
  1199. select ARCH_SUPPORT_TFABOOT
  1200. select BOARD_LATE_INIT
  1201. help
  1202. Support for Freescale LS1012AQDS platform.
  1203. The LS1012A Development System (QDS) is a high-performance
  1204. development platform that supports the QorIQ LS1012A
  1205. Layerscape Architecture processor.
  1206. config TARGET_LS1012ARDB
  1207. bool "Support ls1012ardb"
  1208. select ARCH_LS1012A
  1209. select ARM64
  1210. select ARCH_SUPPORT_TFABOOT
  1211. select BOARD_LATE_INIT
  1212. imply SCSI
  1213. imply SCSI_AHCI
  1214. help
  1215. Support for Freescale LS1012ARDB platform.
  1216. The LS1012A Reference design board (RDB) is a high-performance
  1217. development platform that supports the QorIQ LS1012A
  1218. Layerscape Architecture processor.
  1219. config TARGET_LS1012A2G5RDB
  1220. bool "Support ls1012a2g5rdb"
  1221. select ARCH_LS1012A
  1222. select ARM64
  1223. select ARCH_SUPPORT_TFABOOT
  1224. select BOARD_LATE_INIT
  1225. imply SCSI
  1226. help
  1227. Support for Freescale LS1012A2G5RDB platform.
  1228. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1229. development platform that supports the QorIQ LS1012A
  1230. Layerscape Architecture processor.
  1231. config TARGET_LS1012AFRWY
  1232. bool "Support ls1012afrwy"
  1233. select ARCH_LS1012A
  1234. select ARM64
  1235. select ARCH_SUPPORT_TFABOOT
  1236. select BOARD_LATE_INIT
  1237. imply SCSI
  1238. imply SCSI_AHCI
  1239. help
  1240. Support for Freescale LS1012AFRWY platform.
  1241. The LS1012A FRWY board (FRWY) is a high-performance
  1242. development platform that supports the QorIQ LS1012A
  1243. Layerscape Architecture processor.
  1244. config TARGET_LS1012AFRDM
  1245. bool "Support ls1012afrdm"
  1246. select ARCH_LS1012A
  1247. select ARM64
  1248. select ARCH_SUPPORT_TFABOOT
  1249. help
  1250. Support for Freescale LS1012AFRDM platform.
  1251. The LS1012A Freedom board (FRDM) is a high-performance
  1252. development platform that supports the QorIQ LS1012A
  1253. Layerscape Architecture processor.
  1254. config TARGET_LS1028AQDS
  1255. bool "Support ls1028aqds"
  1256. select ARCH_LS1028A
  1257. select ARM64
  1258. select ARMV8_MULTIENTRY
  1259. select ARCH_SUPPORT_TFABOOT
  1260. select BOARD_LATE_INIT
  1261. help
  1262. Support for Freescale LS1028AQDS platform
  1263. The LS1028A Development System (QDS) is a high-performance
  1264. development platform that supports the QorIQ LS1028A
  1265. Layerscape Architecture processor.
  1266. config TARGET_LS1028ARDB
  1267. bool "Support ls1028ardb"
  1268. select ARCH_LS1028A
  1269. select ARM64
  1270. select ARMV8_MULTIENTRY
  1271. select ARCH_SUPPORT_TFABOOT
  1272. select BOARD_LATE_INIT
  1273. help
  1274. Support for Freescale LS1028ARDB platform
  1275. The LS1028A Development System (RDB) is a high-performance
  1276. development platform that supports the QorIQ LS1028A
  1277. Layerscape Architecture processor.
  1278. config TARGET_LS1088ARDB
  1279. bool "Support ls1088ardb"
  1280. select ARCH_LS1088A
  1281. select ARM64
  1282. select ARMV8_MULTIENTRY
  1283. select ARCH_SUPPORT_TFABOOT
  1284. select BOARD_LATE_INIT
  1285. select SUPPORT_SPL
  1286. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1287. help
  1288. Support for NXP LS1088ARDB platform.
  1289. The LS1088A Reference design board (RDB) is a high-performance
  1290. development platform that supports the QorIQ LS1088A
  1291. Layerscape Architecture processor.
  1292. config TARGET_LS1021AQDS
  1293. bool "Support ls1021aqds"
  1294. select ARCH_LS1021A
  1295. select ARCH_SUPPORT_PSCI
  1296. select BOARD_EARLY_INIT_F
  1297. select BOARD_LATE_INIT
  1298. select CPU_V7A
  1299. select CPU_V7_HAS_NONSEC
  1300. select CPU_V7_HAS_VIRT
  1301. select LS1_DEEP_SLEEP
  1302. select SUPPORT_SPL
  1303. select SYS_FSL_DDR
  1304. select FSL_DDR_INTERACTIVE
  1305. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1306. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1307. imply SCSI
  1308. config TARGET_LS1021ATWR
  1309. bool "Support ls1021atwr"
  1310. select ARCH_LS1021A
  1311. select ARCH_SUPPORT_PSCI
  1312. select BOARD_EARLY_INIT_F
  1313. select BOARD_LATE_INIT
  1314. select CPU_V7A
  1315. select CPU_V7_HAS_NONSEC
  1316. select CPU_V7_HAS_VIRT
  1317. select LS1_DEEP_SLEEP
  1318. select SUPPORT_SPL
  1319. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1320. imply SCSI
  1321. config TARGET_LS1021ATSN
  1322. bool "Support ls1021atsn"
  1323. select ARCH_LS1021A
  1324. select ARCH_SUPPORT_PSCI
  1325. select BOARD_EARLY_INIT_F
  1326. select BOARD_LATE_INIT
  1327. select CPU_V7A
  1328. select CPU_V7_HAS_NONSEC
  1329. select CPU_V7_HAS_VIRT
  1330. select LS1_DEEP_SLEEP
  1331. select SUPPORT_SPL
  1332. imply SCSI
  1333. config TARGET_LS1021AIOT
  1334. bool "Support ls1021aiot"
  1335. select ARCH_LS1021A
  1336. select ARCH_SUPPORT_PSCI
  1337. select BOARD_LATE_INIT
  1338. select CPU_V7A
  1339. select CPU_V7_HAS_NONSEC
  1340. select CPU_V7_HAS_VIRT
  1341. select SUPPORT_SPL
  1342. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1343. imply SCSI
  1344. help
  1345. Support for Freescale LS1021AIOT platform.
  1346. The LS1021A Freescale board (IOT) is a high-performance
  1347. development platform that supports the QorIQ LS1021A
  1348. Layerscape Architecture processor.
  1349. config TARGET_LS1043AQDS
  1350. bool "Support ls1043aqds"
  1351. select ARCH_LS1043A
  1352. select ARM64
  1353. select ARMV8_MULTIENTRY
  1354. select ARCH_SUPPORT_TFABOOT
  1355. select BOARD_EARLY_INIT_F
  1356. select BOARD_LATE_INIT
  1357. select SUPPORT_SPL
  1358. select FSL_DDR_INTERACTIVE if !SPL
  1359. select FSL_DSPI if !SPL_NO_DSPI
  1360. select DM_SPI_FLASH if FSL_DSPI
  1361. imply SCSI
  1362. imply SCSI_AHCI
  1363. help
  1364. Support for Freescale LS1043AQDS platform.
  1365. config TARGET_LS1043ARDB
  1366. bool "Support ls1043ardb"
  1367. select ARCH_LS1043A
  1368. select ARM64
  1369. select ARMV8_MULTIENTRY
  1370. select ARCH_SUPPORT_TFABOOT
  1371. select BOARD_EARLY_INIT_F
  1372. select BOARD_LATE_INIT
  1373. select SUPPORT_SPL
  1374. select FSL_DSPI if !SPL_NO_DSPI
  1375. select DM_SPI_FLASH if FSL_DSPI
  1376. help
  1377. Support for Freescale LS1043ARDB platform.
  1378. config TARGET_LS1046AQDS
  1379. bool "Support ls1046aqds"
  1380. select ARCH_LS1046A
  1381. select ARM64
  1382. select ARMV8_MULTIENTRY
  1383. select ARCH_SUPPORT_TFABOOT
  1384. select BOARD_EARLY_INIT_F
  1385. select BOARD_LATE_INIT
  1386. select DM_SPI_FLASH if DM_SPI
  1387. select SUPPORT_SPL
  1388. select FSL_DDR_BIST if !SPL
  1389. select FSL_DDR_INTERACTIVE if !SPL
  1390. select FSL_DDR_INTERACTIVE if !SPL
  1391. imply SCSI
  1392. help
  1393. Support for Freescale LS1046AQDS platform.
  1394. The LS1046A Development System (QDS) is a high-performance
  1395. development platform that supports the QorIQ LS1046A
  1396. Layerscape Architecture processor.
  1397. config TARGET_LS1046ARDB
  1398. bool "Support ls1046ardb"
  1399. select ARCH_LS1046A
  1400. select ARM64
  1401. select ARMV8_MULTIENTRY
  1402. select ARCH_SUPPORT_TFABOOT
  1403. select BOARD_EARLY_INIT_F
  1404. select BOARD_LATE_INIT
  1405. select DM_SPI_FLASH if DM_SPI
  1406. select POWER_MC34VR500
  1407. select SUPPORT_SPL
  1408. select FSL_DDR_BIST
  1409. select FSL_DDR_INTERACTIVE if !SPL
  1410. imply SCSI
  1411. help
  1412. Support for Freescale LS1046ARDB platform.
  1413. The LS1046A Reference Design Board (RDB) is a high-performance
  1414. development platform that supports the QorIQ LS1046A
  1415. Layerscape Architecture processor.
  1416. config TARGET_LS1046AFRWY
  1417. bool "Support ls1046afrwy"
  1418. select ARCH_LS1046A
  1419. select ARM64
  1420. select ARMV8_MULTIENTRY
  1421. select ARCH_SUPPORT_TFABOOT
  1422. select BOARD_EARLY_INIT_F
  1423. select BOARD_LATE_INIT
  1424. select DM_SPI_FLASH if DM_SPI
  1425. imply SCSI
  1426. help
  1427. Support for Freescale LS1046AFRWY platform.
  1428. The LS1046A Freeway Board (FRWY) is a high-performance
  1429. development platform that supports the QorIQ LS1046A
  1430. Layerscape Architecture processor.
  1431. config TARGET_SL28
  1432. bool "Support sl28"
  1433. select ARCH_LS1028A
  1434. select ARM64
  1435. select ARMV8_MULTIENTRY
  1436. select SUPPORT_SPL
  1437. select BINMAN
  1438. help
  1439. Support for Kontron SMARC-sAL28 board.
  1440. config TARGET_COLIBRI_PXA270
  1441. bool "Support colibri_pxa270"
  1442. select CPU_PXA
  1443. config ARCH_UNIPHIER
  1444. bool "Socionext UniPhier SoCs"
  1445. select BOARD_LATE_INIT
  1446. select DM
  1447. select DM_ETH
  1448. select DM_GPIO
  1449. select DM_I2C
  1450. select DM_MMC
  1451. select DM_MTD
  1452. select DM_RESET
  1453. select DM_SERIAL
  1454. select DM_USB
  1455. select OF_BOARD_SETUP
  1456. select OF_CONTROL
  1457. select OF_LIBFDT
  1458. select PINCTRL
  1459. select SPL_BOARD_INIT if SPL
  1460. select SPL_DM if SPL
  1461. select SPL_LIBCOMMON_SUPPORT if SPL
  1462. select SPL_LIBGENERIC_SUPPORT if SPL
  1463. select SPL_OF_CONTROL if SPL
  1464. select SPL_PINCTRL if SPL
  1465. select SUPPORT_SPL
  1466. imply CMD_DM
  1467. imply DISTRO_DEFAULTS
  1468. imply FAT_WRITE
  1469. help
  1470. Support for UniPhier SoC family developed by Socionext Inc.
  1471. (formerly, System LSI Business Division of Panasonic Corporation)
  1472. config ARCH_STM32
  1473. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1474. select CPU_V7M
  1475. select DM
  1476. select DM_SERIAL
  1477. imply CMD_DM
  1478. config ARCH_STI
  1479. bool "Support STMicrolectronics SoCs"
  1480. select BLK
  1481. select CPU_V7A
  1482. select DM
  1483. select DM_MMC
  1484. select DM_RESET
  1485. select DM_SERIAL
  1486. imply CMD_DM
  1487. help
  1488. Support for STMicroelectronics STiH407/10 SoC family.
  1489. This SoC is used on Linaro 96Board STiH410-B2260
  1490. config ARCH_STM32MP
  1491. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1492. select ARCH_MISC_INIT
  1493. select ARCH_SUPPORT_TFABOOT
  1494. select BOARD_LATE_INIT
  1495. select CLK
  1496. select DM
  1497. select DM_GPIO
  1498. select DM_RESET
  1499. select DM_SERIAL
  1500. select MISC
  1501. select OF_CONTROL
  1502. select OF_LIBFDT
  1503. select OF_SYSTEM_SETUP
  1504. select PINCTRL
  1505. select REGMAP
  1506. select SUPPORT_SPL
  1507. select SYSCON
  1508. select SYSRESET
  1509. select SYS_THUMB_BUILD
  1510. imply SPL_SYSRESET
  1511. imply CMD_DM
  1512. imply CMD_POWEROFF
  1513. imply OF_LIBFDT_OVERLAY
  1514. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1515. imply USE_PREBOOT
  1516. help
  1517. Support for STM32MP SoC family developed by STMicroelectronics,
  1518. MPUs based on ARM cortex A core
  1519. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1520. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1521. chain.
  1522. SPL is the unsecure FSBL for the basic boot chain.
  1523. config ARCH_ROCKCHIP
  1524. bool "Support Rockchip SoCs"
  1525. select BLK
  1526. select BINMAN if SPL_OPTEE
  1527. select DM
  1528. select DM_GPIO
  1529. select DM_I2C
  1530. select DM_MMC
  1531. select DM_PWM
  1532. select DM_REGULATOR
  1533. select DM_SERIAL
  1534. select DM_SPI
  1535. select DM_SPI_FLASH
  1536. select DM_USB if USB
  1537. select ENABLE_ARM_SOC_BOOT0_HOOK
  1538. select OF_CONTROL
  1539. select SPI
  1540. select SPL_DM if SPL
  1541. select SPL_DM_SPI if SPL
  1542. select SPL_DM_SPI_FLASH if SPL
  1543. select SYS_MALLOC_F
  1544. select SYS_THUMB_BUILD if !ARM64
  1545. imply ADC
  1546. imply CMD_DM
  1547. imply DEBUG_UART_BOARD_INIT
  1548. imply DISTRO_DEFAULTS
  1549. imply FAT_WRITE
  1550. imply SARADC_ROCKCHIP
  1551. imply SPL_SYSRESET
  1552. imply SPL_SYS_MALLOC_SIMPLE
  1553. imply SYS_NS16550
  1554. imply TPL_SYSRESET
  1555. imply USB_FUNCTION_FASTBOOT
  1556. config ARCH_OCTEONTX
  1557. bool "Support OcteonTX SoCs"
  1558. select CLK
  1559. select DM
  1560. select ARM64
  1561. select OF_CONTROL
  1562. select OF_LIVE
  1563. select BOARD_LATE_INIT
  1564. select SYS_CACHE_SHIFT_7
  1565. config ARCH_OCTEONTX2
  1566. bool "Support OcteonTX2 SoCs"
  1567. select CLK
  1568. select DM
  1569. select ARM64
  1570. select OF_CONTROL
  1571. select OF_LIVE
  1572. select BOARD_LATE_INIT
  1573. select SYS_CACHE_SHIFT_7
  1574. config TARGET_THUNDERX_88XX
  1575. bool "Support ThunderX 88xx"
  1576. select ARM64
  1577. select OF_CONTROL
  1578. select PL01X_SERIAL
  1579. select SYS_CACHE_SHIFT_7
  1580. config ARCH_ASPEED
  1581. bool "Support Aspeed SoCs"
  1582. select DM
  1583. select OF_CONTROL
  1584. imply CMD_DM
  1585. config TARGET_DURIAN
  1586. bool "Support Phytium Durian Platform"
  1587. select ARM64
  1588. help
  1589. Support for durian platform.
  1590. It has 2GB Sdram, uart and pcie.
  1591. config TARGET_PRESIDIO_ASIC
  1592. bool "Support Cortina Presidio ASIC Platform"
  1593. select ARM64
  1594. config TARGET_XENGUEST_ARM64
  1595. bool "Xen guest ARM64"
  1596. select ARM64
  1597. select XEN
  1598. select OF_CONTROL
  1599. select LINUX_KERNEL_IMAGE_HEADER
  1600. select XEN_SERIAL
  1601. select SSCANF
  1602. endchoice
  1603. config ARCH_SUPPORT_TFABOOT
  1604. bool
  1605. config TFABOOT
  1606. bool "Support for booting from TF-A"
  1607. depends on ARCH_SUPPORT_TFABOOT
  1608. default n
  1609. help
  1610. Some platforms support the setup of secure registers (for instance
  1611. for CPU errata handling) or provide secure services like PSCI.
  1612. Those services could also be provided by other firmware parts
  1613. like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
  1614. does not need to (and cannot) execute this code.
  1615. Enabling this option will make a U-Boot binary that is relying
  1616. on other firmware layers to provide secure functionality.
  1617. config TI_SECURE_DEVICE
  1618. bool "HS Device Type Support"
  1619. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1620. help
  1621. If a high secure (HS) device type is being used, this config
  1622. must be set. This option impacts various aspects of the
  1623. build system (to create signed boot images that can be
  1624. authenticated) and the code. See the doc/README.ti-secure
  1625. file for further details.
  1626. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1627. config ISW_ENTRY_ADDR
  1628. hex "Address in memory or XIP address of bootloader entry point"
  1629. default 0x402F4000 if AM43XX
  1630. default 0x402F0400 if AM33XX
  1631. default 0x40301350 if OMAP54XX
  1632. help
  1633. After any reset, the boot ROM searches the boot media for a valid
  1634. boot image. For non-XIP devices, the ROM then copies the image into
  1635. internal memory. For all boot modes, after the ROM processes the
  1636. boot image it eventually computes the entry point address depending
  1637. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1638. image headers.
  1639. endif
  1640. source "arch/arm/mach-aspeed/Kconfig"
  1641. source "arch/arm/mach-at91/Kconfig"
  1642. source "arch/arm/mach-bcm283x/Kconfig"
  1643. source "arch/arm/mach-bcmstb/Kconfig"
  1644. source "arch/arm/mach-davinci/Kconfig"
  1645. source "arch/arm/mach-exynos/Kconfig"
  1646. source "arch/arm/mach-highbank/Kconfig"
  1647. source "arch/arm/mach-integrator/Kconfig"
  1648. source "arch/arm/mach-ipq40xx/Kconfig"
  1649. source "arch/arm/mach-k3/Kconfig"
  1650. source "arch/arm/mach-keystone/Kconfig"
  1651. source "arch/arm/mach-kirkwood/Kconfig"
  1652. source "arch/arm/mach-lpc32xx/Kconfig"
  1653. source "arch/arm/mach-mvebu/Kconfig"
  1654. source "arch/arm/mach-octeontx/Kconfig"
  1655. source "arch/arm/mach-octeontx2/Kconfig"
  1656. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1657. source "arch/arm/mach-imx/mx2/Kconfig"
  1658. source "arch/arm/mach-imx/mx3/Kconfig"
  1659. source "arch/arm/mach-imx/mx5/Kconfig"
  1660. source "arch/arm/mach-imx/mx6/Kconfig"
  1661. source "arch/arm/mach-imx/mx7/Kconfig"
  1662. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1663. source "arch/arm/mach-imx/imx8/Kconfig"
  1664. source "arch/arm/mach-imx/imx8m/Kconfig"
  1665. source "arch/arm/mach-imx/imxrt/Kconfig"
  1666. source "arch/arm/mach-imx/mxs/Kconfig"
  1667. source "arch/arm/mach-omap2/Kconfig"
  1668. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1669. source "arch/arm/mach-orion5x/Kconfig"
  1670. source "arch/arm/mach-owl/Kconfig"
  1671. source "arch/arm/mach-rmobile/Kconfig"
  1672. source "arch/arm/mach-meson/Kconfig"
  1673. source "arch/arm/mach-mediatek/Kconfig"
  1674. source "arch/arm/mach-qemu/Kconfig"
  1675. source "arch/arm/mach-rockchip/Kconfig"
  1676. source "arch/arm/mach-s5pc1xx/Kconfig"
  1677. source "arch/arm/mach-snapdragon/Kconfig"
  1678. source "arch/arm/mach-socfpga/Kconfig"
  1679. source "arch/arm/mach-sti/Kconfig"
  1680. source "arch/arm/mach-stm32/Kconfig"
  1681. source "arch/arm/mach-stm32mp/Kconfig"
  1682. source "arch/arm/mach-sunxi/Kconfig"
  1683. source "arch/arm/mach-tegra/Kconfig"
  1684. source "arch/arm/mach-u8500/Kconfig"
  1685. source "arch/arm/mach-uniphier/Kconfig"
  1686. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1687. source "arch/arm/mach-zynq/Kconfig"
  1688. source "arch/arm/mach-zynqmp/Kconfig"
  1689. source "arch/arm/mach-versal/Kconfig"
  1690. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1691. source "arch/arm/cpu/armv7/Kconfig"
  1692. source "arch/arm/cpu/armv8/Kconfig"
  1693. source "arch/arm/mach-imx/Kconfig"
  1694. source "arch/arm/mach-nexell/Kconfig"
  1695. source "board/armltd/total_compute/Kconfig"
  1696. source "board/bosch/shc/Kconfig"
  1697. source "board/bosch/guardian/Kconfig"
  1698. source "board/CarMediaLab/flea3/Kconfig"
  1699. source "board/Marvell/aspenite/Kconfig"
  1700. source "board/Marvell/gplugd/Kconfig"
  1701. source "board/Marvell/octeontx/Kconfig"
  1702. source "board/Marvell/octeontx2/Kconfig"
  1703. source "board/armadeus/apf27/Kconfig"
  1704. source "board/armltd/vexpress/Kconfig"
  1705. source "board/armltd/vexpress64/Kconfig"
  1706. source "board/cortina/presidio-asic/Kconfig"
  1707. source "board/broadcom/bcm23550_w1d/Kconfig"
  1708. source "board/broadcom/bcm28155_ap/Kconfig"
  1709. source "board/broadcom/bcm963158/Kconfig"
  1710. source "board/broadcom/bcm968360bg/Kconfig"
  1711. source "board/broadcom/bcm968580xref/Kconfig"
  1712. source "board/broadcom/bcmcygnus/Kconfig"
  1713. source "board/broadcom/bcmnsp/Kconfig"
  1714. source "board/broadcom/bcmns2/Kconfig"
  1715. source "board/broadcom/bcmns3/Kconfig"
  1716. source "board/cavium/thunderx/Kconfig"
  1717. source "board/cirrus/edb93xx/Kconfig"
  1718. source "board/eets/pdu001/Kconfig"
  1719. source "board/emulation/qemu-arm/Kconfig"
  1720. source "board/freescale/ls2080aqds/Kconfig"
  1721. source "board/freescale/ls2080ardb/Kconfig"
  1722. source "board/freescale/ls1088a/Kconfig"
  1723. source "board/freescale/ls1028a/Kconfig"
  1724. source "board/freescale/ls1021aqds/Kconfig"
  1725. source "board/freescale/ls1043aqds/Kconfig"
  1726. source "board/freescale/ls1021atwr/Kconfig"
  1727. source "board/freescale/ls1021atsn/Kconfig"
  1728. source "board/freescale/ls1021aiot/Kconfig"
  1729. source "board/freescale/ls1046aqds/Kconfig"
  1730. source "board/freescale/ls1043ardb/Kconfig"
  1731. source "board/freescale/ls1046ardb/Kconfig"
  1732. source "board/freescale/ls1046afrwy/Kconfig"
  1733. source "board/freescale/ls1012aqds/Kconfig"
  1734. source "board/freescale/ls1012ardb/Kconfig"
  1735. source "board/freescale/ls1012afrdm/Kconfig"
  1736. source "board/freescale/lx2160a/Kconfig"
  1737. source "board/freescale/s32v234evb/Kconfig"
  1738. source "board/grinn/chiliboard/Kconfig"
  1739. source "board/hisilicon/hikey/Kconfig"
  1740. source "board/hisilicon/hikey960/Kconfig"
  1741. source "board/hisilicon/poplar/Kconfig"
  1742. source "board/isee/igep003x/Kconfig"
  1743. source "board/kontron/sl28/Kconfig"
  1744. source "board/myir/mys_6ulx/Kconfig"
  1745. source "board/spear/spear300/Kconfig"
  1746. source "board/spear/spear310/Kconfig"
  1747. source "board/spear/spear320/Kconfig"
  1748. source "board/spear/spear600/Kconfig"
  1749. source "board/spear/x600/Kconfig"
  1750. source "board/st/stv0991/Kconfig"
  1751. source "board/tcl/sl50/Kconfig"
  1752. source "board/toradex/colibri_pxa270/Kconfig"
  1753. source "board/variscite/dart_6ul/Kconfig"
  1754. source "board/vscom/baltos/Kconfig"
  1755. source "board/phytium/durian/Kconfig"
  1756. source "board/xen/xenguest_arm64/Kconfig"
  1757. source "arch/arm/Kconfig.debug"
  1758. endmenu
  1759. config SPL_LDSCRIPT
  1760. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1761. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1762. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64