ns16550.c 17 KB

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  1. /*
  2. * COM1 NS16550 support
  3. * originally from linux source (arch/powerpc/boot/ns16550.c)
  4. * modified to use CONFIG_SYS_ISA_MEM and new defines
  5. */
  6. #include <clock_legacy.h>
  7. #include <common.h>
  8. #include <clk.h>
  9. #include <dm.h>
  10. #include <errno.h>
  11. #include <log.h>
  12. #include <ns16550.h>
  13. #include <reset.h>
  14. #include <serial.h>
  15. #include <watchdog.h>
  16. #include <asm/global_data.h>
  17. #include <linux/err.h>
  18. #include <linux/types.h>
  19. #include <asm/io.h>
  20. DECLARE_GLOBAL_DATA_PTR;
  21. #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
  22. #define UART_MCRVAL (UART_MCR_DTR | \
  23. UART_MCR_RTS) /* RTS/DTR */
  24. #if !CONFIG_IS_ENABLED(DM_SERIAL)
  25. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  26. #define serial_out(x, y) outb(x, (ulong)y)
  27. #define serial_in(y) inb((ulong)y)
  28. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
  29. #define serial_out(x, y) out_be32(y, x)
  30. #define serial_in(y) in_be32(y)
  31. #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
  32. #define serial_out(x, y) out_le32(y, x)
  33. #define serial_in(y) in_le32(y)
  34. #else
  35. #define serial_out(x, y) writeb(x, y)
  36. #define serial_in(y) readb(y)
  37. #endif
  38. #endif /* !CONFIG_DM_SERIAL */
  39. #if defined(CONFIG_SOC_KEYSTONE)
  40. #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
  41. #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
  42. #undef UART_MCRVAL
  43. #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
  44. #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
  45. #else
  46. #define UART_MCRVAL (UART_MCR_RTS)
  47. #endif
  48. #endif
  49. #ifndef CONFIG_SYS_NS16550_IER
  50. #define CONFIG_SYS_NS16550_IER 0x00
  51. #endif /* CONFIG_SYS_NS16550_IER */
  52. static inline void serial_out_shift(void *addr, int shift, int value)
  53. {
  54. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  55. outb(value, (ulong)addr);
  56. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  57. out_le32(addr, value);
  58. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  59. out_be32(addr, value);
  60. #elif defined(CONFIG_SYS_NS16550_MEM32)
  61. writel(value, addr);
  62. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  63. writeb(value, addr + (1 << shift) - 1);
  64. #else
  65. writeb(value, addr);
  66. #endif
  67. }
  68. static inline int serial_in_shift(void *addr, int shift)
  69. {
  70. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  71. return inb((ulong)addr);
  72. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
  73. return in_le32(addr);
  74. #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
  75. return in_be32(addr);
  76. #elif defined(CONFIG_SYS_NS16550_MEM32)
  77. return readl(addr);
  78. #elif defined(CONFIG_SYS_BIG_ENDIAN)
  79. return readb(addr + (1 << shift) - 1);
  80. #else
  81. return readb(addr);
  82. #endif
  83. }
  84. #if CONFIG_IS_ENABLED(DM_SERIAL)
  85. #ifndef CONFIG_SYS_NS16550_CLK
  86. #define CONFIG_SYS_NS16550_CLK 0
  87. #endif
  88. /*
  89. * Use this #ifdef for now since many platforms don't define in(), out(),
  90. * out_le32(), etc. but we don't have #defines to indicate this.
  91. *
  92. * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
  93. * on a platform
  94. */
  95. #ifdef CONFIG_NS16550_DYNAMIC
  96. static void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
  97. int value)
  98. {
  99. if (plat->flags & NS16550_FLAG_IO) {
  100. outb(value, addr);
  101. } else if (plat->reg_width == 4) {
  102. if (plat->flags & NS16550_FLAG_ENDIAN) {
  103. if (plat->flags & NS16550_FLAG_BE)
  104. out_be32(addr, value);
  105. else
  106. out_le32(addr, value);
  107. } else {
  108. writel(value, addr);
  109. }
  110. } else if (plat->flags & NS16550_FLAG_BE) {
  111. writeb(value, addr + (1 << plat->reg_shift) - 1);
  112. } else {
  113. writeb(value, addr);
  114. }
  115. }
  116. static int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
  117. {
  118. if (plat->flags & NS16550_FLAG_IO) {
  119. return inb(addr);
  120. } else if (plat->reg_width == 4) {
  121. if (plat->flags & NS16550_FLAG_ENDIAN) {
  122. if (plat->flags & NS16550_FLAG_BE)
  123. return in_be32(addr);
  124. else
  125. return in_le32(addr);
  126. } else {
  127. return readl(addr);
  128. }
  129. } else if (plat->flags & NS16550_FLAG_BE) {
  130. return readb(addr + (1 << plat->reg_shift) - 1);
  131. } else {
  132. return readb(addr);
  133. }
  134. }
  135. #else
  136. static inline void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
  137. int value)
  138. {
  139. }
  140. static inline int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
  141. {
  142. return 0;
  143. }
  144. #endif /* CONFIG_NS16550_DYNAMIC */
  145. static void ns16550_writeb(struct ns16550 *port, int offset, int value)
  146. {
  147. struct ns16550_plat *plat = port->plat;
  148. unsigned char *addr;
  149. offset *= 1 << plat->reg_shift;
  150. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  151. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  152. serial_out_dynamic(plat, addr, value);
  153. else
  154. serial_out_shift(addr, plat->reg_shift, value);
  155. }
  156. static int ns16550_readb(struct ns16550 *port, int offset)
  157. {
  158. struct ns16550_plat *plat = port->plat;
  159. unsigned char *addr;
  160. offset *= 1 << plat->reg_shift;
  161. addr = (unsigned char *)plat->base + offset + plat->reg_offset;
  162. if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
  163. return serial_in_dynamic(plat, addr);
  164. else
  165. return serial_in_shift(addr, plat->reg_shift);
  166. }
  167. static u32 ns16550_getfcr(struct ns16550 *port)
  168. {
  169. struct ns16550_plat *plat = port->plat;
  170. return plat->fcr;
  171. }
  172. /* We can clean these up once everything is moved to driver model */
  173. #define serial_out(value, addr) \
  174. ns16550_writeb(com_port, \
  175. (unsigned char *)addr - (unsigned char *)com_port, value)
  176. #define serial_in(addr) \
  177. ns16550_readb(com_port, \
  178. (unsigned char *)addr - (unsigned char *)com_port)
  179. #else
  180. static u32 ns16550_getfcr(struct ns16550 *port)
  181. {
  182. return UART_FCR_DEFVAL;
  183. }
  184. #endif
  185. int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate)
  186. {
  187. const unsigned int mode_x_div = 16;
  188. return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
  189. }
  190. static void ns16550_setbrg(struct ns16550 *com_port, int baud_divisor)
  191. {
  192. /* to keep serial format, read lcr before writing BKSE */
  193. int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
  194. serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
  195. serial_out(baud_divisor & 0xff, &com_port->dll);
  196. serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
  197. serial_out(lcr_val, &com_port->lcr);
  198. }
  199. void ns16550_init(struct ns16550 *com_port, int baud_divisor)
  200. {
  201. #if (defined(CONFIG_SPL_BUILD) && \
  202. (defined(CONFIG_OMAP34XX) || defined(CONFIG_OMAP44XX)))
  203. /*
  204. * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
  205. * before SPL starts only THRE bit is set. We have to empty the
  206. * transmitter before initialization starts.
  207. */
  208. if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
  209. == UART_LSR_THRE) {
  210. if (baud_divisor != -1)
  211. ns16550_setbrg(com_port, baud_divisor);
  212. else {
  213. // Re-use old baud rate divisor to flush transmit reg.
  214. const int dll = serial_in(&com_port->dll);
  215. const int dlm = serial_in(&com_port->dlm);
  216. const int divisor = dll | (dlm << 8);
  217. ns16550_setbrg(com_port, divisor);
  218. }
  219. serial_out(0, &com_port->mdr1);
  220. }
  221. #endif
  222. while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
  223. ;
  224. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  225. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
  226. serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
  227. #endif
  228. serial_out(UART_MCRVAL, &com_port->mcr);
  229. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  230. /* initialize serial config to 8N1 before writing baudrate */
  231. serial_out(UART_LCRVAL, &com_port->lcr);
  232. if (baud_divisor != -1)
  233. ns16550_setbrg(com_port, baud_divisor);
  234. #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
  235. defined(CONFIG_OMAP_SERIAL)
  236. /* /16 is proper to hit 115200 with 48MHz */
  237. serial_out(0, &com_port->mdr1);
  238. #endif
  239. #if defined(CONFIG_SOC_KEYSTONE)
  240. serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
  241. #endif
  242. }
  243. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  244. void ns16550_reinit(struct ns16550 *com_port, int baud_divisor)
  245. {
  246. serial_out(CONFIG_SYS_NS16550_IER, &com_port->ier);
  247. ns16550_setbrg(com_port, 0);
  248. serial_out(UART_MCRVAL, &com_port->mcr);
  249. serial_out(ns16550_getfcr(com_port), &com_port->fcr);
  250. ns16550_setbrg(com_port, baud_divisor);
  251. }
  252. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  253. void ns16550_putc(struct ns16550 *com_port, char c)
  254. {
  255. while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
  256. ;
  257. serial_out(c, &com_port->thr);
  258. /*
  259. * Call watchdog_reset() upon newline. This is done here in putc
  260. * since the environment code uses a single puts() to print the complete
  261. * environment upon "printenv". So we can't put this watchdog call
  262. * in puts().
  263. */
  264. if (c == '\n')
  265. WATCHDOG_RESET();
  266. }
  267. #ifndef CONFIG_NS16550_MIN_FUNCTIONS
  268. char ns16550_getc(struct ns16550 *com_port)
  269. {
  270. while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) {
  271. #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_TTY)
  272. extern void usbtty_poll(void);
  273. usbtty_poll();
  274. #endif
  275. WATCHDOG_RESET();
  276. }
  277. return serial_in(&com_port->rbr);
  278. }
  279. int ns16550_tstc(struct ns16550 *com_port)
  280. {
  281. return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
  282. }
  283. #endif /* CONFIG_NS16550_MIN_FUNCTIONS */
  284. #ifdef CONFIG_DEBUG_UART_NS16550
  285. #include <debug_uart.h>
  286. static inline void _debug_uart_init(void)
  287. {
  288. struct ns16550 *com_port = (struct ns16550 *)CONFIG_DEBUG_UART_BASE;
  289. int baud_divisor;
  290. /*
  291. * We copy the code from above because it is already horribly messy.
  292. * Trying to refactor to nicely remove the duplication doesn't seem
  293. * feasible. The better fix is to move all users of this driver to
  294. * driver model.
  295. */
  296. baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
  297. CONFIG_BAUDRATE);
  298. serial_dout(&com_port->ier, CONFIG_SYS_NS16550_IER);
  299. serial_dout(&com_port->mcr, UART_MCRVAL);
  300. serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
  301. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  302. serial_dout(&com_port->dll, baud_divisor & 0xff);
  303. serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
  304. serial_dout(&com_port->lcr, UART_LCRVAL);
  305. }
  306. static inline int NS16550_read_baud_divisor(struct ns16550 *com_port)
  307. {
  308. int ret;
  309. serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
  310. ret = serial_din(&com_port->dll) & 0xff;
  311. ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
  312. serial_dout(&com_port->lcr, UART_LCRVAL);
  313. return ret;
  314. }
  315. static inline void _debug_uart_putc(int ch)
  316. {
  317. struct ns16550 *com_port = (struct ns16550 *)CONFIG_DEBUG_UART_BASE;
  318. while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
  319. #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
  320. if (!NS16550_read_baud_divisor(com_port))
  321. return;
  322. #endif
  323. }
  324. serial_dout(&com_port->thr, ch);
  325. }
  326. DEBUG_UART_FUNCS
  327. #endif
  328. #if CONFIG_IS_ENABLED(DM_SERIAL)
  329. static int ns16550_serial_putc(struct udevice *dev, const char ch)
  330. {
  331. struct ns16550 *const com_port = dev_get_priv(dev);
  332. if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
  333. return -EAGAIN;
  334. serial_out(ch, &com_port->thr);
  335. /*
  336. * Call watchdog_reset() upon newline. This is done here in putc
  337. * since the environment code uses a single puts() to print the complete
  338. * environment upon "printenv". So we can't put this watchdog call
  339. * in puts().
  340. */
  341. if (ch == '\n')
  342. WATCHDOG_RESET();
  343. return 0;
  344. }
  345. static int ns16550_serial_pending(struct udevice *dev, bool input)
  346. {
  347. struct ns16550 *const com_port = dev_get_priv(dev);
  348. if (input)
  349. return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
  350. else
  351. return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
  352. }
  353. static int ns16550_serial_getc(struct udevice *dev)
  354. {
  355. struct ns16550 *const com_port = dev_get_priv(dev);
  356. if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
  357. return -EAGAIN;
  358. return serial_in(&com_port->rbr);
  359. }
  360. static int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
  361. {
  362. struct ns16550 *const com_port = dev_get_priv(dev);
  363. struct ns16550_plat *plat = com_port->plat;
  364. int clock_divisor;
  365. clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
  366. ns16550_setbrg(com_port, clock_divisor);
  367. return 0;
  368. }
  369. static int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
  370. {
  371. struct ns16550 *const com_port = dev_get_priv(dev);
  372. int lcr_val = UART_LCR_WLS_8;
  373. uint parity = SERIAL_GET_PARITY(serial_config);
  374. uint bits = SERIAL_GET_BITS(serial_config);
  375. uint stop = SERIAL_GET_STOP(serial_config);
  376. /*
  377. * only parity config is implemented, check if other serial settings
  378. * are the default one.
  379. */
  380. if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
  381. return -ENOTSUPP; /* not supported in driver*/
  382. switch (parity) {
  383. case SERIAL_PAR_NONE:
  384. /* no bits to add */
  385. break;
  386. case SERIAL_PAR_ODD:
  387. lcr_val |= UART_LCR_PEN;
  388. break;
  389. case SERIAL_PAR_EVEN:
  390. lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
  391. break;
  392. default:
  393. return -ENOTSUPP; /* not supported in driver*/
  394. }
  395. serial_out(lcr_val, &com_port->lcr);
  396. return 0;
  397. }
  398. static int ns16550_serial_getinfo(struct udevice *dev,
  399. struct serial_device_info *info)
  400. {
  401. struct ns16550 *const com_port = dev_get_priv(dev);
  402. struct ns16550_plat *plat = com_port->plat;
  403. info->type = SERIAL_CHIP_16550_COMPATIBLE;
  404. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  405. info->addr_space = SERIAL_ADDRESS_SPACE_IO;
  406. #else
  407. info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
  408. #endif
  409. info->addr = plat->base;
  410. info->reg_width = plat->reg_width;
  411. info->reg_shift = plat->reg_shift;
  412. info->reg_offset = plat->reg_offset;
  413. info->clock = plat->clock;
  414. return 0;
  415. }
  416. static int ns16550_serial_assign_base(struct ns16550_plat *plat, fdt_addr_t base)
  417. {
  418. if (base == FDT_ADDR_T_NONE)
  419. return -EINVAL;
  420. #ifdef CONFIG_SYS_NS16550_PORT_MAPPED
  421. plat->base = base;
  422. #else
  423. plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
  424. #endif
  425. return 0;
  426. }
  427. int ns16550_serial_probe(struct udevice *dev)
  428. {
  429. struct ns16550_plat *plat = dev_get_plat(dev);
  430. struct ns16550 *const com_port = dev_get_priv(dev);
  431. struct reset_ctl_bulk reset_bulk;
  432. fdt_addr_t addr;
  433. int ret;
  434. /*
  435. * If we are on PCI bus, either directly attached to a PCI root port,
  436. * or via a PCI bridge, assign plat->base before probing hardware.
  437. */
  438. if (device_is_on_pci_bus(dev)) {
  439. addr = devfdt_get_addr_pci(dev);
  440. ret = ns16550_serial_assign_base(plat, addr);
  441. if (ret)
  442. return ret;
  443. }
  444. ret = reset_get_bulk(dev, &reset_bulk);
  445. if (!ret)
  446. reset_deassert_bulk(&reset_bulk);
  447. com_port->plat = dev_get_plat(dev);
  448. ns16550_init(com_port, -1);
  449. return 0;
  450. }
  451. #if CONFIG_IS_ENABLED(OF_CONTROL)
  452. enum {
  453. PORT_NS16550 = 0,
  454. PORT_JZ4780,
  455. };
  456. #endif
  457. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  458. int ns16550_serial_of_to_plat(struct udevice *dev)
  459. {
  460. struct ns16550_plat *plat = dev_get_plat(dev);
  461. const u32 port_type = dev_get_driver_data(dev);
  462. fdt_addr_t addr;
  463. struct clk clk;
  464. struct clk_bulk clks;
  465. int err;
  466. addr = dev_read_addr(dev);
  467. err = ns16550_serial_assign_base(plat, addr);
  468. if (err && !device_is_on_pci_bus(dev))
  469. return err;
  470. plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
  471. plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
  472. plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
  473. err = clk_get_by_index(dev, 0, &clk);
  474. if (!err) {
  475. err = clk_get_rate(&clk);
  476. if (!IS_ERR_VALUE(err))
  477. plat->clock = err;
  478. } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
  479. debug("ns16550 failed to get clock\n");
  480. return err;
  481. }
  482. if (!plat->clock)
  483. plat->clock = dev_read_u32_default(dev, "clock-frequency",
  484. CONFIG_SYS_NS16550_CLK);
  485. if (!plat->clock)
  486. plat->clock = CONFIG_SYS_NS16550_CLK;
  487. if (!plat->clock) {
  488. debug("ns16550 clock not defined\n");
  489. return -EINVAL;
  490. }
  491. err = clk_get_bulk(dev, &clks);
  492. if (err)
  493. debug("ns16550 clk_get_bulk fail.\n");
  494. else {
  495. err = clk_enable_bulk(&clks);
  496. if (err) {
  497. debug("ns16550 clk_enable_bulk fail.\n");
  498. return -EINVAL;
  499. }
  500. }
  501. plat->fcr = UART_FCR_DEFVAL;
  502. if (port_type == PORT_JZ4780)
  503. plat->fcr |= UART_FCR_UME;
  504. return 0;
  505. }
  506. #endif
  507. const struct dm_serial_ops ns16550_serial_ops = {
  508. .putc = ns16550_serial_putc,
  509. .pending = ns16550_serial_pending,
  510. .getc = ns16550_serial_getc,
  511. .setbrg = ns16550_serial_setbrg,
  512. .setconfig = ns16550_serial_setconfig,
  513. .getinfo = ns16550_serial_getinfo,
  514. };
  515. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  516. /*
  517. * Please consider existing compatible strings before adding a new
  518. * one to keep this table compact. Or you may add a generic "ns16550"
  519. * compatible string to your dts.
  520. */
  521. static const struct udevice_id ns16550_serial_ids[] = {
  522. { .compatible = "ns16550", .data = PORT_NS16550 },
  523. { .compatible = "ns16550a", .data = PORT_NS16550 },
  524. { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
  525. { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
  526. { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
  527. {}
  528. };
  529. #endif /* OF_CONTROL && !OF_PLATDATA */
  530. #if CONFIG_IS_ENABLED(SERIAL_PRESENT)
  531. /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
  532. #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
  533. U_BOOT_DRIVER(ns16550_serial) = {
  534. .name = "ns16550_serial",
  535. .id = UCLASS_SERIAL,
  536. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  537. .of_match = ns16550_serial_ids,
  538. .of_to_plat = ns16550_serial_of_to_plat,
  539. .plat_auto = sizeof(struct ns16550_plat),
  540. #endif
  541. .priv_auto = sizeof(struct ns16550),
  542. .probe = ns16550_serial_probe,
  543. .ops = &ns16550_serial_ops,
  544. #if !CONFIG_IS_ENABLED(OF_CONTROL)
  545. .flags = DM_FLAG_PRE_RELOC,
  546. #endif
  547. };
  548. DM_DRIVER_ALIAS(ns16550_serial, rockchip_rk3328_uart)
  549. DM_DRIVER_ALIAS(ns16550_serial, rockchip_rk3368_uart)
  550. DM_DRIVER_ALIAS(ns16550_serial, ti_da830_uart)
  551. #endif
  552. #endif /* SERIAL_PRESENT */
  553. #endif /* CONFIG_DM_SERIAL */