spl.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  4. */
  5. #include <common.h>
  6. #include <clock_legacy.h>
  7. #include <cpu_func.h>
  8. #include <debug_uart.h>
  9. #include <env.h>
  10. #include <hang.h>
  11. #include <image.h>
  12. #include <init.h>
  13. #include <log.h>
  14. #include <spl.h>
  15. #include <asm/cache.h>
  16. #include <asm/global_data.h>
  17. #include <asm/io.h>
  18. #include <fsl_ifc.h>
  19. #include <i2c.h>
  20. #include <fsl_csu.h>
  21. #include <asm/arch/fdt.h>
  22. #include <asm/arch/ppa.h>
  23. #include <asm/arch/soc.h>
  24. DECLARE_GLOBAL_DATA_PTR;
  25. u32 spl_boot_device(void)
  26. {
  27. #ifdef CONFIG_SPL_MMC_SUPPORT
  28. return BOOT_DEVICE_MMC1;
  29. #endif
  30. #ifdef CONFIG_SPL_NAND_SUPPORT
  31. return BOOT_DEVICE_NAND;
  32. #endif
  33. #ifdef CONFIG_QSPI_BOOT
  34. return BOOT_DEVICE_NOR;
  35. #endif
  36. return 0;
  37. }
  38. #ifdef CONFIG_SPL_BUILD
  39. void spl_board_init(void)
  40. {
  41. #if defined(CONFIG_NXP_ESBC) && defined(CONFIG_FSL_LSCH2)
  42. /*
  43. * In case of Secure Boot, the IBR configures the SMMU
  44. * to allow only Secure transactions.
  45. * SMMU must be reset in bypass mode.
  46. * Set the ClientPD bit and Clear the USFCFG Bit
  47. */
  48. u32 val;
  49. val = (in_le32(SMMU_SCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
  50. out_le32(SMMU_SCR0, val);
  51. val = (in_le32(SMMU_NSCR0) | SCR0_CLIENTPD_MASK) & ~(SCR0_USFCFG_MASK);
  52. out_le32(SMMU_NSCR0, val);
  53. #endif
  54. #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
  55. enable_layerscape_ns_access();
  56. #endif
  57. #ifdef CONFIG_SPL_FSL_LS_PPA
  58. ppa_init();
  59. #endif
  60. }
  61. void board_init_f(ulong dummy)
  62. {
  63. int ret;
  64. icache_enable();
  65. /* Clear global data */
  66. memset((void *)gd, 0, sizeof(gd_t));
  67. if (IS_ENABLED(CONFIG_DEBUG_UART))
  68. debug_uart_init();
  69. board_early_init_f();
  70. ret = spl_early_init();
  71. if (ret) {
  72. debug("spl_early_init() failed: %d\n", ret);
  73. hang();
  74. }
  75. timer_init();
  76. #ifdef CONFIG_ARCH_LS2080A
  77. env_init();
  78. #endif
  79. get_clocks();
  80. preloader_console_init();
  81. spl_set_bd();
  82. #ifdef CONFIG_SYS_I2C_LEGACY
  83. #ifdef CONFIG_SPL_I2C
  84. i2c_init_all();
  85. #endif
  86. #endif
  87. #ifdef CONFIG_VID
  88. init_func_vid();
  89. #endif
  90. dram_init();
  91. #ifdef CONFIG_SPL_FSL_LS_PPA
  92. #ifndef CONFIG_SYS_MEM_RESERVE_SECURE
  93. #error Need secure RAM for PPA
  94. #endif
  95. /*
  96. * Secure memory location is determined in dram_init_banksize().
  97. * gd->ram_size is deducted by the size of secure ram.
  98. */
  99. dram_init_banksize();
  100. /*
  101. * After dram_init_bank_size(), we know U-Boot only uses the first
  102. * memory bank regardless how big the memory is.
  103. */
  104. gd->ram_top = gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size;
  105. /*
  106. * If PPA is loaded, U-Boot will resume running at EL2.
  107. * Cache and MMU will be enabled. Need a place for TLB.
  108. * U-Boot will be relocated to the end of available memory
  109. * in first bank. At this point, we cannot know how much
  110. * memory U-Boot uses. Put TLB table lower by SPL_TLB_SETBACK
  111. * to avoid overlapping. As soon as the RAM version U-Boot sets
  112. * up new MMU, this space is no longer needed.
  113. */
  114. gd->ram_top -= SPL_TLB_SETBACK;
  115. gd->arch.tlb_size = PGTABLE_SIZE;
  116. gd->arch.tlb_addr = (gd->ram_top - gd->arch.tlb_size) & ~(0x10000 - 1);
  117. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  118. #endif /* CONFIG_SPL_FSL_LS_PPA */
  119. #if defined(CONFIG_QSPI_AHB_INIT) && defined(CONFIG_QSPI_BOOT)
  120. qspi_ahb_init();
  121. #endif
  122. }
  123. #ifdef CONFIG_SPL_OS_BOOT
  124. /*
  125. * Return
  126. * 0 if booting into OS is selected
  127. * 1 if booting into U-Boot is selected
  128. */
  129. int spl_start_uboot(void)
  130. {
  131. env_init();
  132. if (env_get_yesno("boot_os") != 0)
  133. return 0;
  134. return 1;
  135. }
  136. #endif /* CONFIG_SPL_OS_BOOT */
  137. #endif /* CONFIG_SPL_BUILD */