phy.h 7.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Andy Fleming <afleming@gmail.com>
  5. *
  6. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  7. */
  8. #ifndef _PHY_H
  9. #define _PHY_H
  10. #include <dm.h>
  11. #include <linux/list.h>
  12. #include <linux/mii.h>
  13. #include <linux/ethtool.h>
  14. #include <linux/mdio.h>
  15. #include <phy_interface.h>
  16. #define PHY_FIXED_ID 0xa5a55a5a
  17. #define PHY_MAX_ADDR 32
  18. #define PHY_FLAG_BROKEN_RESET (1 << 0) /* soft reset not supported */
  19. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  20. SUPPORTED_TP | \
  21. SUPPORTED_MII)
  22. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  23. SUPPORTED_10baseT_Full)
  24. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  25. SUPPORTED_100baseT_Full)
  26. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  27. SUPPORTED_1000baseT_Full)
  28. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  29. PHY_100BT_FEATURES | \
  30. PHY_DEFAULT_FEATURES)
  31. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  32. PHY_1000BT_FEATURES)
  33. #define PHY_10G_FEATURES (PHY_GBIT_FEATURES | \
  34. SUPPORTED_10000baseT_Full)
  35. #ifndef PHY_ANEG_TIMEOUT
  36. #define PHY_ANEG_TIMEOUT 4000
  37. #endif
  38. struct phy_device;
  39. #define MDIO_NAME_LEN 32
  40. struct mii_dev {
  41. struct list_head link;
  42. char name[MDIO_NAME_LEN];
  43. void *priv;
  44. int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
  45. int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
  46. u16 val);
  47. int (*reset)(struct mii_dev *bus);
  48. struct phy_device *phymap[PHY_MAX_ADDR];
  49. u32 phy_mask;
  50. };
  51. /* struct phy_driver: a structure which defines PHY behavior
  52. *
  53. * uid will contain a number which represents the PHY. During
  54. * startup, the driver will poll the PHY to find out what its
  55. * UID--as defined by registers 2 and 3--is. The 32-bit result
  56. * gotten from the PHY will be masked to
  57. * discard any bits which may change based on revision numbers
  58. * unimportant to functionality
  59. *
  60. */
  61. struct phy_driver {
  62. char *name;
  63. unsigned int uid;
  64. unsigned int mask;
  65. unsigned int mmds;
  66. u32 features;
  67. /* Called to do any driver startup necessities */
  68. /* Will be called during phy_connect */
  69. int (*probe)(struct phy_device *phydev);
  70. /* Called to configure the PHY, and modify the controller
  71. * based on the results. Should be called after phy_connect */
  72. int (*config)(struct phy_device *phydev);
  73. /* Called when starting up the controller */
  74. int (*startup)(struct phy_device *phydev);
  75. /* Called when bringing down the controller */
  76. int (*shutdown)(struct phy_device *phydev);
  77. int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
  78. int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
  79. u16 val);
  80. struct list_head list;
  81. };
  82. struct phy_device {
  83. /* Information about the PHY type */
  84. /* And management functions */
  85. struct mii_dev *bus;
  86. struct phy_driver *drv;
  87. void *priv;
  88. #ifdef CONFIG_DM_ETH
  89. struct udevice *dev;
  90. ofnode node;
  91. #else
  92. struct eth_device *dev;
  93. #endif
  94. /* forced speed & duplex (no autoneg)
  95. * partner speed & duplex & pause (autoneg)
  96. */
  97. int speed;
  98. int duplex;
  99. /* The most recently read link state */
  100. int link;
  101. int port;
  102. phy_interface_t interface;
  103. u32 advertising;
  104. u32 supported;
  105. u32 mmds;
  106. int autoneg;
  107. int addr;
  108. int pause;
  109. int asym_pause;
  110. u32 phy_id;
  111. u32 flags;
  112. };
  113. struct fixed_link {
  114. int phy_id;
  115. int duplex;
  116. int link_speed;
  117. int pause;
  118. int asym_pause;
  119. };
  120. static inline int phy_read(struct phy_device *phydev, int devad, int regnum)
  121. {
  122. struct mii_dev *bus = phydev->bus;
  123. return bus->read(bus, phydev->addr, devad, regnum);
  124. }
  125. static inline int phy_write(struct phy_device *phydev, int devad, int regnum,
  126. u16 val)
  127. {
  128. struct mii_dev *bus = phydev->bus;
  129. return bus->write(bus, phydev->addr, devad, regnum, val);
  130. }
  131. #ifdef CONFIG_PHYLIB_10G
  132. extern struct phy_driver gen10g_driver;
  133. /* For now, XGMII is the only 10G interface */
  134. static inline int is_10g_interface(phy_interface_t interface)
  135. {
  136. return interface == PHY_INTERFACE_MODE_XGMII;
  137. }
  138. #endif
  139. int phy_init(void);
  140. int phy_reset(struct phy_device *phydev);
  141. struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask,
  142. phy_interface_t interface);
  143. #ifdef CONFIG_DM_ETH
  144. void phy_connect_dev(struct phy_device *phydev, struct udevice *dev);
  145. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  146. struct udevice *dev,
  147. phy_interface_t interface);
  148. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  149. {
  150. if (ofnode_valid(phydev->node))
  151. return phydev->node;
  152. else
  153. return dev_ofnode(phydev->dev);
  154. }
  155. #else
  156. void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev);
  157. struct phy_device *phy_connect(struct mii_dev *bus, int addr,
  158. struct eth_device *dev,
  159. phy_interface_t interface);
  160. static inline ofnode phy_get_ofnode(struct phy_device *phydev)
  161. {
  162. return ofnode_null();
  163. }
  164. #endif
  165. int phy_startup(struct phy_device *phydev);
  166. int phy_config(struct phy_device *phydev);
  167. int phy_shutdown(struct phy_device *phydev);
  168. int phy_register(struct phy_driver *drv);
  169. int phy_set_supported(struct phy_device *phydev, u32 max_speed);
  170. int genphy_config_aneg(struct phy_device *phydev);
  171. int genphy_restart_aneg(struct phy_device *phydev);
  172. int genphy_update_link(struct phy_device *phydev);
  173. int genphy_parse_link(struct phy_device *phydev);
  174. int genphy_config(struct phy_device *phydev);
  175. int genphy_startup(struct phy_device *phydev);
  176. int genphy_shutdown(struct phy_device *phydev);
  177. int gen10g_config(struct phy_device *phydev);
  178. int gen10g_startup(struct phy_device *phydev);
  179. int gen10g_shutdown(struct phy_device *phydev);
  180. int gen10g_discover_mmds(struct phy_device *phydev);
  181. int phy_b53_init(void);
  182. int phy_mv88e61xx_init(void);
  183. int phy_aquantia_init(void);
  184. int phy_atheros_init(void);
  185. int phy_broadcom_init(void);
  186. int phy_cortina_init(void);
  187. int phy_davicom_init(void);
  188. int phy_et1011c_init(void);
  189. int phy_lxt_init(void);
  190. int phy_marvell_init(void);
  191. int phy_micrel_ksz8xxx_init(void);
  192. int phy_micrel_ksz90x1_init(void);
  193. int phy_meson_gxl_init(void);
  194. int phy_natsemi_init(void);
  195. int phy_realtek_init(void);
  196. int phy_smsc_init(void);
  197. int phy_teranetics_init(void);
  198. int phy_ti_init(void);
  199. int phy_vitesse_init(void);
  200. int phy_xilinx_init(void);
  201. int phy_mscc_init(void);
  202. int phy_fixed_init(void);
  203. int board_phy_config(struct phy_device *phydev);
  204. int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
  205. /**
  206. * phy_get_interface_by_name() - Look up a PHY interface name
  207. *
  208. * @str: PHY interface name, e.g. "mii"
  209. * @return PHY_INTERFACE_MODE_... value, or -1 if not found
  210. */
  211. int phy_get_interface_by_name(const char *str);
  212. /**
  213. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  214. * is RGMII (all variants)
  215. * @phydev: the phy_device struct
  216. */
  217. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  218. {
  219. return phydev->interface >= PHY_INTERFACE_MODE_RGMII &&
  220. phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID;
  221. }
  222. /**
  223. * phy_interface_is_sgmii - Convenience function for testing if a PHY interface
  224. * is SGMII (all variants)
  225. * @phydev: the phy_device struct
  226. */
  227. static inline bool phy_interface_is_sgmii(struct phy_device *phydev)
  228. {
  229. return phydev->interface >= PHY_INTERFACE_MODE_SGMII &&
  230. phydev->interface <= PHY_INTERFACE_MODE_QSGMII;
  231. }
  232. /* PHY UIDs for various PHYs that are referenced in external code */
  233. #define PHY_UID_CS4340 0x13e51002
  234. #define PHY_UID_CS4223 0x03e57003
  235. #define PHY_UID_TN2020 0x00a19410
  236. #define PHY_UID_IN112525_S03 0x02107440
  237. #endif