nand_boot_fsl_elbc.c 3.4 KB

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  1. /*
  2. * NAND boot for Freescale Enhanced Local Bus Controller, Flash Control Machine
  3. *
  4. * (C) Copyright 2006-2008
  5. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  6. *
  7. * Copyright (c) 2008 Freescale Semiconductor, Inc.
  8. * Author: Scott Wood <scottwood@freescale.com>
  9. *
  10. * SPDX-License-Identifier: GPL-2.0+
  11. */
  12. #include <common.h>
  13. #include <asm/io.h>
  14. #include <asm/fsl_lbc.h>
  15. #include <linux/mtd/nand.h>
  16. #define WINDOW_SIZE 8192
  17. static void nand_wait(void)
  18. {
  19. fsl_lbc_t *regs = LBC_BASE_ADDR;
  20. for (;;) {
  21. uint32_t status = in_be32(&regs->ltesr);
  22. if (status == 1)
  23. return;
  24. if (status & 1) {
  25. puts("read failed (ltesr)\n");
  26. for (;;);
  27. }
  28. }
  29. }
  30. static void nand_load(unsigned int offs, int uboot_size, uchar *dst)
  31. {
  32. fsl_lbc_t *regs = LBC_BASE_ADDR;
  33. uchar *buf = (uchar *)CONFIG_SYS_NAND_BASE;
  34. const int large = CONFIG_SYS_NAND_OR_PRELIM & OR_FCM_PGS;
  35. const int block_shift = large ? 17 : 14;
  36. const int block_size = 1 << block_shift;
  37. const int page_size = large ? 2048 : 512;
  38. const int bad_marker = large ? page_size + 0 : page_size + 5;
  39. int fmr = (15 << FMR_CWTO_SHIFT) | (2 << FMR_AL_SHIFT) | 2;
  40. int pos = 0;
  41. if (offs & (block_size - 1)) {
  42. puts("bad offset\n");
  43. for (;;);
  44. }
  45. if (large) {
  46. fmr |= FMR_ECCM;
  47. __raw_writel((NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
  48. (NAND_CMD_READSTART << FCR_CMD1_SHIFT),
  49. &regs->fcr);
  50. __raw_writel(
  51. (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  52. (FIR_OP_CA << FIR_OP1_SHIFT) |
  53. (FIR_OP_PA << FIR_OP2_SHIFT) |
  54. (FIR_OP_CW1 << FIR_OP3_SHIFT) |
  55. (FIR_OP_RBW << FIR_OP4_SHIFT),
  56. &regs->fir);
  57. } else {
  58. __raw_writel(NAND_CMD_READ0 << FCR_CMD0_SHIFT, &regs->fcr);
  59. __raw_writel(
  60. (FIR_OP_CW0 << FIR_OP0_SHIFT) |
  61. (FIR_OP_CA << FIR_OP1_SHIFT) |
  62. (FIR_OP_PA << FIR_OP2_SHIFT) |
  63. (FIR_OP_RBW << FIR_OP3_SHIFT),
  64. &regs->fir);
  65. }
  66. __raw_writel(0, &regs->fbcr);
  67. while (pos < uboot_size) {
  68. int i = 0;
  69. __raw_writel(offs >> block_shift, &regs->fbar);
  70. do {
  71. int j;
  72. unsigned int page_offs = (offs & (block_size - 1)) << 1;
  73. __raw_writel(~0, &regs->ltesr);
  74. __raw_writel(0, &regs->lteatr);
  75. __raw_writel(page_offs, &regs->fpar);
  76. __raw_writel(fmr, &regs->fmr);
  77. sync();
  78. __raw_writel(0, &regs->lsor);
  79. nand_wait();
  80. page_offs %= WINDOW_SIZE;
  81. /*
  82. * If either of the first two pages are marked bad,
  83. * continue to the next block.
  84. */
  85. if (i++ < 2 && buf[page_offs + bad_marker] != 0xff) {
  86. puts("skipping\n");
  87. offs = (offs + block_size) & ~(block_size - 1);
  88. pos &= ~(block_size - 1);
  89. break;
  90. }
  91. for (j = 0; j < page_size; j++)
  92. dst[pos + j] = buf[page_offs + j];
  93. pos += page_size;
  94. offs += page_size;
  95. } while ((offs & (block_size - 1)) && (pos < uboot_size));
  96. }
  97. }
  98. /*
  99. * The main entry for NAND booting. It's necessary that SDRAM is already
  100. * configured and available since this code loads the main U-Boot image
  101. * from NAND into SDRAM and starts it from there.
  102. */
  103. void nand_boot(void)
  104. {
  105. __attribute__((noreturn)) void (*uboot)(void);
  106. /*
  107. * Load U-Boot image from NAND into RAM
  108. */
  109. nand_load(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
  110. (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
  111. /*
  112. * Jump to U-Boot image
  113. */
  114. puts("transfering control\n");
  115. /*
  116. * Clean d-cache and invalidate i-cache, to
  117. * make sure that no stale data is executed.
  118. */
  119. flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
  120. uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
  121. uboot();
  122. }