spl.c 1.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <init.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/sys_proto.h>
  10. #include <linux/bitops.h>
  11. #include <linux/delay.h>
  12. #include "../common/stpmic1.h"
  13. /* board early initialisation in board_f: need to use global variable */
  14. static u32 opp_voltage_mv __section(".data");
  15. void board_vddcore_init(u32 voltage_mv)
  16. {
  17. if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
  18. opp_voltage_mv = voltage_mv;
  19. }
  20. int board_early_init_f(void)
  21. {
  22. if (IS_ENABLED(CONFIG_PMIC_STPMIC1) && CONFIG_IS_ENABLED(POWER))
  23. stpmic1_init(opp_voltage_mv);
  24. return 0;
  25. }
  26. #ifdef CONFIG_DEBUG_UART_BOARD_INIT
  27. void board_debug_uart_init(void)
  28. {
  29. #if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE)
  30. #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00)
  31. #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28)
  32. /* UART4 clock enable */
  33. setbits_le32(RCC_MP_APB1ENSETR, BIT(16));
  34. #define GPIOG_BASE 0x50008000
  35. /* GPIOG clock enable */
  36. writel(BIT(6), RCC_MP_AHB4ENSETR);
  37. /* GPIO configuration for ST boards: Uart4 TX = G11 */
  38. writel(0xffbfffff, GPIOG_BASE + 0x00);
  39. writel(0x00006000, GPIOG_BASE + 0x24);
  40. #else
  41. #error("CONFIG_DEBUG_UART_BASE: not supported value")
  42. #endif
  43. }
  44. #endif