omap3_beagle.h 13 KB

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  1. /*
  2. * (C) Copyright 2006-2008
  3. * Texas Instruments.
  4. * Richard Woodruff <r-woodruff2@ti.com>
  5. * Syed Mohammed Khasim <x0khasim@ti.com>
  6. *
  7. * Configuration settings for the TI OMAP3530 Beagle board.
  8. *
  9. * See file CREDITS for list of people who contributed to this
  10. * project.
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License as
  14. * published by the Free Software Foundation; either version 2 of
  15. * the License, or (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  25. * MA 02111-1307 USA
  26. */
  27. #ifndef __CONFIG_H
  28. #define __CONFIG_H
  29. /*
  30. * High Level Configuration Options
  31. */
  32. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  33. #define CONFIG_OMAP34XX 1 /* which is a 34XX */
  34. #define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
  35. #define CONFIG_SDRC /* The chip has SDRC controller */
  36. #include <asm/arch/cpu.h> /* get chip and board defs */
  37. #include <asm/arch/omap3.h>
  38. /*
  39. * Display CPU and Board information
  40. */
  41. #define CONFIG_DISPLAY_CPUINFO 1
  42. #define CONFIG_DISPLAY_BOARDINFO 1
  43. /* Clock Defines */
  44. #define V_OSCK 26000000 /* Clock output from T2 */
  45. #define V_SCLK (V_OSCK >> 1)
  46. #undef CONFIG_USE_IRQ /* no support for IRQs */
  47. #define CONFIG_MISC_INIT_R
  48. #define CONFIG_OF_LIBFDT 1
  49. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  50. #define CONFIG_SETUP_MEMORY_TAGS 1
  51. #define CONFIG_INITRD_TAG 1
  52. #define CONFIG_REVISION_TAG 1
  53. /*
  54. * Size of malloc() pool
  55. */
  56. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
  57. /* Sector */
  58. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  59. /*
  60. * Hardware drivers
  61. */
  62. /*
  63. * NS16550 Configuration
  64. */
  65. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  66. #define CONFIG_SYS_NS16550
  67. #define CONFIG_SYS_NS16550_SERIAL
  68. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  69. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  70. /*
  71. * select serial console configuration
  72. */
  73. #define CONFIG_CONS_INDEX 3
  74. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  75. #define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
  76. /* allow to overwrite serial and ethaddr */
  77. #define CONFIG_ENV_OVERWRITE
  78. #define CONFIG_BAUDRATE 115200
  79. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  80. 115200}
  81. #define CONFIG_GENERIC_MMC 1
  82. #define CONFIG_MMC 1
  83. #define CONFIG_OMAP_HSMMC 1
  84. #define CONFIG_DOS_PARTITION 1
  85. /* Status LED */
  86. #define CONFIG_STATUS_LED 1
  87. #define CONFIG_BOARD_SPECIFIC_LED 1
  88. #define STATUS_LED_BIT 0x01
  89. #define STATUS_LED_STATE STATUS_LED_ON
  90. #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
  91. #define STATUS_LED_BIT1 0x02
  92. #define STATUS_LED_STATE1 STATUS_LED_ON
  93. #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
  94. #define STATUS_LED_BOOT STATUS_LED_BIT
  95. #define STATUS_LED_GREEN STATUS_LED_BIT1
  96. /* Enable Multi Bus support for I2C */
  97. #define CONFIG_I2C_MULTI_BUS 1
  98. /* Probe all devices */
  99. #define CONFIG_SYS_I2C_NOPROBES {{0x0, 0x0}}
  100. /* USB */
  101. #define CONFIG_MUSB_UDC 1
  102. #define CONFIG_USB_OMAP3 1
  103. #define CONFIG_TWL4030_USB 1
  104. /* USB device configuration */
  105. #define CONFIG_USB_DEVICE 1
  106. #define CONFIG_USB_TTY 1
  107. #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
  108. /* USB EHCI */
  109. #define CONFIG_CMD_USB
  110. #define CONFIG_USB_EHCI
  111. #define CONFIG_USB_ULPI
  112. #define CONFIG_USB_ULPI_VIEWPORT_OMAP
  113. #define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
  114. #define CONFIG_USB_HOST_ETHER
  115. #define CONFIG_USB_ETHER_SMSC95XX
  116. #define CONFIG_USB_ETHER_ASIX
  117. /* commands to include */
  118. #include <config_cmd_default.h>
  119. #define CONFIG_CMD_CACHE
  120. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  121. #define CONFIG_CMD_FAT /* FAT support */
  122. #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
  123. #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
  124. #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
  125. #define MTDIDS_DEFAULT "nand0=nand"
  126. #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
  127. "1920k(u-boot),128k(u-boot-env),"\
  128. "4m(kernel),-(fs)"
  129. #define CONFIG_CMD_I2C /* I2C serial bus support */
  130. #define CONFIG_CMD_MMC /* MMC support */
  131. #define CONFIG_USB_STORAGE /* USB storage support */
  132. #define CONFIG_CMD_NAND /* NAND support */
  133. #define CONFIG_CMD_LED /* LED support */
  134. #define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
  135. #define CONFIG_CMD_NFS /* NFS support */
  136. #define CONFIG_CMD_PING
  137. #define CONFIG_CMD_DHCP
  138. #define CONFIG_CMD_SETEXPR /* Evaluate expressions */
  139. #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
  140. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  141. #undef CONFIG_CMD_IMI /* iminfo */
  142. #undef CONFIG_CMD_IMLS /* List all found images */
  143. #define CONFIG_SYS_NO_FLASH
  144. #define CONFIG_HARD_I2C 1
  145. #define CONFIG_SYS_I2C_SPEED 100000
  146. #define CONFIG_SYS_I2C_SLAVE 1
  147. #define CONFIG_SYS_I2C_BUS 0
  148. #define CONFIG_SYS_I2C_BUS_SELECT 1
  149. #define CONFIG_I2C_MULTI_BUS 1
  150. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  151. #define CONFIG_VIDEO_OMAP3 /* DSS Support */
  152. /*
  153. * TWL4030
  154. */
  155. #define CONFIG_TWL4030_POWER 1
  156. #define CONFIG_TWL4030_LED 1
  157. /*
  158. * Board NAND Info.
  159. */
  160. #define CONFIG_SYS_NAND_QUIET_TEST 1
  161. #define CONFIG_NAND_OMAP_GPMC
  162. #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
  163. /* to access nand */
  164. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  165. /* to access nand at */
  166. /* CS0 */
  167. #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
  168. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
  169. /* devices */
  170. #define CONFIG_JFFS2_NAND
  171. /* nand device jffs2 lives on */
  172. #define CONFIG_JFFS2_DEV "nand0"
  173. /* start of jffs2 partition */
  174. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  175. #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
  176. /* partition */
  177. /* Environment information */
  178. #define CONFIG_BOOTDELAY 2
  179. #define CONFIG_EXTRA_ENV_SETTINGS \
  180. "loadaddr=0x80200000\0" \
  181. "rdaddr=0x81000000\0" \
  182. "usbtty=cdc_acm\0" \
  183. "bootfile=uImage.beagle\0" \
  184. "console=ttyO2,115200n8\0" \
  185. "mpurate=auto\0" \
  186. "buddy=none "\
  187. "optargs=\0" \
  188. "camera=none\0" \
  189. "vram=12M\0" \
  190. "dvimode=640x480MR-16@60\0" \
  191. "defaultdisplay=dvi\0" \
  192. "mmcdev=0\0" \
  193. "mmcroot=/dev/mmcblk0p2 rw\0" \
  194. "mmcrootfstype=ext3 rootwait\0" \
  195. "nandroot=ubi0:rootfs ubi.mtd=4\0" \
  196. "nandrootfstype=ubifs\0" \
  197. "ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=0x81000000,64M\0" \
  198. "ramrootfstype=ext2\0" \
  199. "mmcargs=setenv bootargs console=${console} " \
  200. "${optargs} " \
  201. "mpurate=${mpurate} " \
  202. "buddy=${buddy} "\
  203. "camera=${camera} "\
  204. "vram=${vram} " \
  205. "omapfb.mode=dvi:${dvimode} " \
  206. "omapdss.def_disp=${defaultdisplay} " \
  207. "root=${mmcroot} " \
  208. "rootfstype=${mmcrootfstype}\0" \
  209. "nandargs=setenv bootargs console=${console} " \
  210. "${optargs} " \
  211. "mpurate=${mpurate} " \
  212. "buddy=${buddy} "\
  213. "camera=${camera} "\
  214. "vram=${vram} " \
  215. "omapfb.mode=dvi:${dvimode} " \
  216. "omapdss.def_disp=${defaultdisplay} " \
  217. "root=${nandroot} " \
  218. "rootfstype=${nandrootfstype}\0" \
  219. "bootenv=uEnv.txt\0" \
  220. "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
  221. "importbootenv=echo Importing environment from mmc ...; " \
  222. "env import -t $loadaddr $filesize\0" \
  223. "ramargs=setenv bootargs console=${console} " \
  224. "${optargs} " \
  225. "mpurate=${mpurate} " \
  226. "buddy=${buddy} "\
  227. "vram=${vram} " \
  228. "omapfb.mode=dvi:${dvimode} " \
  229. "omapdss.def_disp=${defaultdisplay} " \
  230. "root=${ramroot} " \
  231. "rootfstype=${ramrootfstype}\0" \
  232. "loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
  233. "loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  234. "loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} /boot/uImage\0" \
  235. "mmcboot=echo Booting from mmc ...; " \
  236. "run mmcargs; " \
  237. "bootm ${loadaddr}\0" \
  238. "nandboot=echo Booting from nand ...; " \
  239. "run nandargs; " \
  240. "nand read ${loadaddr} 280000 400000; " \
  241. "bootm ${loadaddr}\0" \
  242. "ramboot=echo Booting from ramdisk ...; " \
  243. "run ramargs; " \
  244. "bootm ${loadaddr}\0" \
  245. #define CONFIG_BOOTCOMMAND \
  246. "if mmc rescan ${mmcdev}; then " \
  247. "if userbutton; then " \
  248. "setenv bootenv user.txt;" \
  249. "fi;" \
  250. "echo SD/MMC found on device ${mmcdev};" \
  251. "if run loadbootenv; then " \
  252. "echo Loaded environment from ${bootenv};" \
  253. "run importbootenv;" \
  254. "fi;" \
  255. "if test -n $uenvcmd; then " \
  256. "echo Running uenvcmd ...;" \
  257. "run uenvcmd;" \
  258. "fi;" \
  259. "if run loaduimage; then " \
  260. "run mmcboot;" \
  261. "fi;" \
  262. "fi;" \
  263. "run nandboot;" \
  264. #define CONFIG_AUTO_COMPLETE 1
  265. /*
  266. * Miscellaneous configurable options
  267. */
  268. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  269. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  270. #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
  271. #define CONFIG_SYS_PROMPT "OMAP3 beagleboard.org # "
  272. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  273. /* Print Buffer Size */
  274. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  275. sizeof(CONFIG_SYS_PROMPT) + 16)
  276. #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
  277. /* Boot Argument Buffer Size */
  278. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  279. #define CONFIG_SYS_ALT_MEMTEST 1
  280. #define CONFIG_SYS_MEMTEST_START (0x82000000) /* memtest */
  281. /* defaults */
  282. #define CONFIG_SYS_MEMTEST_END (0x87FFFFFF) /* 128MB */
  283. #define CONFIG_SYS_MEMTEST_SCRATCH (0x81000000) /* dummy address */
  284. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
  285. /* load address */
  286. /*
  287. * OMAP3 has 12 GP timers, they can be driven by the system clock
  288. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  289. * This rate is divided by a local divisor.
  290. */
  291. #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
  292. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  293. #define CONFIG_SYS_HZ 1000
  294. /*-----------------------------------------------------------------------
  295. * Stack sizes
  296. *
  297. * The stack sizes are set up in start.S using the settings below
  298. */
  299. #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
  300. /*-----------------------------------------------------------------------
  301. * Physical Memory Map
  302. */
  303. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  304. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  305. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  306. /*-----------------------------------------------------------------------
  307. * FLASH and environment organization
  308. */
  309. /* **** PISMO SUPPORT *** */
  310. /* Configure the PISMO */
  311. #define PISMO1_NAND_SIZE GPMC_SIZE_128M
  312. #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
  313. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  314. #if defined(CONFIG_CMD_NAND)
  315. #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
  316. #endif
  317. /* Monitor at start of flash */
  318. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  319. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  320. #define CONFIG_ENV_IS_IN_NAND 1
  321. #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
  322. #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
  323. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  324. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  325. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  326. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  327. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  328. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  329. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  330. CONFIG_SYS_INIT_RAM_SIZE - \
  331. GENERATED_GBL_DATA_SIZE)
  332. #define CONFIG_OMAP3_SPI
  333. #define CONFIG_SYS_CACHELINE_SIZE 64
  334. /* Defines for SPL */
  335. #define CONFIG_SPL
  336. #define CONFIG_SPL_NAND_SIMPLE
  337. #define CONFIG_SPL_TEXT_BASE 0x40200800
  338. #define CONFIG_SPL_MAX_SIZE (45 * 1024)
  339. #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
  340. #define CONFIG_SPL_BSS_START_ADDR 0x80000000
  341. #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
  342. #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
  343. #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
  344. #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
  345. #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
  346. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  347. #define CONFIG_SPL_LIBDISK_SUPPORT
  348. #define CONFIG_SPL_I2C_SUPPORT
  349. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  350. #define CONFIG_SPL_MMC_SUPPORT
  351. #define CONFIG_SPL_FAT_SUPPORT
  352. #define CONFIG_SPL_SERIAL_SUPPORT
  353. #define CONFIG_SPL_NAND_SUPPORT
  354. #define CONFIG_SPL_POWER_SUPPORT
  355. #define CONFIG_SPL_OMAP3_ID_NAND
  356. #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
  357. /* NAND boot config */
  358. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  359. #define CONFIG_SYS_NAND_PAGE_COUNT 64
  360. #define CONFIG_SYS_NAND_PAGE_SIZE 2048
  361. #define CONFIG_SYS_NAND_OOBSIZE 64
  362. #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
  363. #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
  364. #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
  365. 10, 11, 12, 13}
  366. #define CONFIG_SYS_NAND_ECCSIZE 512
  367. #define CONFIG_SYS_NAND_ECCBYTES 3
  368. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  369. #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
  370. /*
  371. * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
  372. * 64 bytes before this address should be set aside for u-boot.img's
  373. * header. That is 0x800FFFC0--0x80100000 should not be used for any
  374. * other needs.
  375. */
  376. #define CONFIG_SYS_TEXT_BASE 0x80100000
  377. #define CONFIG_SYS_SPL_MALLOC_START 0x80208000
  378. #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
  379. #endif /* __CONFIG_H */