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- // SPDX-License-Identifier: GPL-2.0 OR MIT
- /*
- * Copyright (C) 2022 StarFive Technology Co., Ltd.
- */
- #include <dt-bindings/reset/starfive-jh7110.h>
- #include <dt-bindings/clock/starfive-jh7110-clkgen.h>
- / {
- cpus: cpus {
- u-boot,dm-spl;
- timebase-frequency = <4000000>;
- cpu0: cpu@0 {
- u-boot,dm-spl;
- status = "okay";
- cpu0intctrl: interrupt-controller {
- u-boot,dm-spl;
- };
- };
- cpu1: cpu@1 {
- u-boot,dm-spl;
- status = "okay";
- cpu1intctrl: interrupt-controller {
- u-boot,dm-spl;
- };
- };
- cpu2: cpu@2 {
- u-boot,dm-spl;
- status = "okay";
- cpu2intctrl: interrupt-controller {
- u-boot,dm-spl;
- };
- };
- cpu3: cpu@3 {
- u-boot,dm-spl;
- status = "okay";
- cpu3intctrl: interrupt-controller {
- u-boot,dm-spl;
- };
- };
- cpu4: cpu@4 {
- u-boot,dm-spl;
- status = "okay";
- cpu4intctrl: interrupt-controller {
- u-boot,dm-spl;
- };
- };
- };
- soc {
- u-boot,dm-spl;
- clint: clint@2000000 {
- u-boot,dm-spl;
- };
- dmc: dmc@100b0000 {
- compatible = "starfive,jh7110-dmc";
- reg = <0x0 0x15700000 0x0 0x10000 0x0 0x13000000 0x0 0x10000>;
- resets = <&rstgen RSTN_U0_DDR_AXI>,
- <&rstgen RSTN_U0_DDR_OSC>,
- <&rstgen RSTN_U0_DDR_APB>;
- reset-names = "axi", "osc", "apb";
- clock-frequency = <2133>;
- u-boot,dm-spl;
- };
- };
- };
- &cachectrl {
- reg = <0x0 0x2010000 0x0 0x4000>,
- <0x0 0x2030000 0x0 0x80000>,
- <0x0 0x8000000 0x0 0x2000000>;
- reg-names = "control", "prefetcher", "sideband";
- prefetch-dist-size = <0x4>;
- prefetch-hart-mask = <0x1e>;
- prefetch-enable;
- };
- &uart0 {
- clock-frequency = <24000000>;
- current-speed = <115200>;
- status = "okay";
- u-boot,dm-spl;
- };
- &sdio0 {
- u-boot,dm-spl;
- };
- &sdio1 {
- u-boot,dm-spl;
- };
- &qspi {
- status = "okay";
- u-boot,dm-spl;
- };
- &rstgen {
- status = "okay";
- u-boot,dm-spl;
- };
- &nor_flash {
- u-boot,dm-spl;
- };
- &clkgen {
- u-boot,dm-spl;
- };
- &osc {
- u-boot,dm-spl;
- };
- &gmac1_rmii_refin{
- u-boot,dm-spl;
- };
- &stg_apb {
- u-boot,dm-spl;
- };
- &gmac0_rmii_refin {
- u-boot,dm-spl;
- };
- &gpio {
- u-boot,dm-spl;
- };
- &gpioa {
- u-boot,dm-spl;
- };
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