test.dts 29 KB

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  1. /dts-v1/;
  2. #include <dt-bindings/gpio/gpio.h>
  3. #include <dt-bindings/gpio/sandbox-gpio.h>
  4. #include <dt-bindings/input/input.h>
  5. #include <dt-bindings/pinctrl/sandbox-pinmux.h>
  6. #include <dt-bindings/mux/mux.h>
  7. / {
  8. model = "sandbox";
  9. compatible = "sandbox";
  10. #address-cells = <1>;
  11. #size-cells = <1>;
  12. aliases {
  13. console = &uart0;
  14. eth0 = "/eth@10002000";
  15. eth2 = &swp_0;
  16. eth3 = &eth_3;
  17. eth4 = &dsa_eth0;
  18. eth5 = &eth_5;
  19. gpio1 = &gpio_a;
  20. gpio2 = &gpio_b;
  21. gpio3 = &gpio_c;
  22. i2c0 = "/i2c@0";
  23. mmc0 = "/mmc0";
  24. mmc1 = "/mmc1";
  25. pci0 = &pci0;
  26. pci1 = &pci1;
  27. pci2 = &pci2;
  28. remoteproc0 = &rproc_1;
  29. remoteproc1 = &rproc_2;
  30. rtc0 = &rtc_0;
  31. rtc1 = &rtc_1;
  32. spi0 = "/spi@0";
  33. testfdt6 = "/e-test";
  34. testbus3 = "/some-bus";
  35. testfdt0 = "/some-bus/c-test@0";
  36. testfdt12 = "/some-bus/c-test@1";
  37. testfdt3 = "/b-test";
  38. testfdt5 = "/some-bus/c-test@5";
  39. testfdt8 = "/a-test";
  40. testfdtm1 = &testfdtm1;
  41. fdt-dummy0 = "/translation-test@8000/dev@0,0";
  42. fdt-dummy1 = "/translation-test@8000/dev@1,100";
  43. fdt-dummy2 = "/translation-test@8000/dev@2,200";
  44. fdt-dummy3 = "/translation-test@8000/noxlatebus@3,300/dev@42";
  45. fdt-dummy4 = "/translation-test@8000/xlatebus@4,400/devs/dev@19";
  46. usb0 = &usb_0;
  47. usb1 = &usb_1;
  48. usb2 = &usb_2;
  49. axi0 = &axi;
  50. osd0 = "/osd";
  51. };
  52. config {
  53. environment {
  54. from_fdt = "yes";
  55. fdt_env_path = "";
  56. };
  57. };
  58. audio: audio-codec {
  59. compatible = "sandbox,audio-codec";
  60. #sound-dai-cells = <1>;
  61. };
  62. buttons {
  63. compatible = "gpio-keys";
  64. btn1 {
  65. gpios = <&gpio_a 3 0>;
  66. label = "button1";
  67. };
  68. btn2 {
  69. gpios = <&gpio_a 4 0>;
  70. label = "button2";
  71. };
  72. };
  73. buttons2 {
  74. compatible = "adc-keys";
  75. io-channels = <&adc 3>;
  76. keyup-threshold-microvolt = <3000000>;
  77. button-up {
  78. label = "button3";
  79. linux,code = <KEY_F3>;
  80. press-threshold-microvolt = <1500000>;
  81. };
  82. button-down {
  83. label = "button4";
  84. linux,code = <KEY_F4>;
  85. press-threshold-microvolt = <1000000>;
  86. };
  87. button-enter {
  88. label = "button5";
  89. linux,code = <KEY_F5>;
  90. press-threshold-microvolt = <500000>;
  91. };
  92. };
  93. cros_ec: cros-ec {
  94. reg = <0 0>;
  95. compatible = "google,cros-ec-sandbox";
  96. /*
  97. * This describes the flash memory within the EC. Note
  98. * that the STM32L flash erases to 0, not 0xff.
  99. */
  100. flash {
  101. image-pos = <0x08000000>;
  102. size = <0x20000>;
  103. erase-value = <0>;
  104. /* Information for sandbox */
  105. ro {
  106. image-pos = <0>;
  107. size = <0xf000>;
  108. };
  109. wp-ro {
  110. image-pos = <0xf000>;
  111. size = <0x1000>;
  112. used = <0x884>;
  113. compress = "lz4";
  114. uncomp-size = <0xcf8>;
  115. hash {
  116. algo = "sha256";
  117. value = [00 01 02 03 04 05 06 07
  118. 08 09 0a 0b 0c 0d 0e 0f
  119. 10 11 12 13 14 15 16 17
  120. 18 19 1a 1b 1c 1d 1e 1f];
  121. };
  122. };
  123. rw {
  124. image-pos = <0x10000>;
  125. size = <0x10000>;
  126. };
  127. };
  128. };
  129. dsi_host: dsi_host {
  130. compatible = "sandbox,dsi-host";
  131. };
  132. a-test {
  133. reg = <0 1>;
  134. compatible = "denx,u-boot-fdt-test";
  135. ping-expect = <0>;
  136. ping-add = <0>;
  137. u-boot,dm-pre-reloc;
  138. test-gpios = <&gpio_a 1>, <&gpio_a 4>,
  139. <&gpio_b 5 GPIO_ACTIVE_HIGH 3 2 1>,
  140. <0>, <&gpio_a 12>;
  141. test2-gpios = <&gpio_a 1>, <&gpio_a 4>,
  142. <&gpio_b 6 GPIO_ACTIVE_LOW 3 2 1>,
  143. <&gpio_b 7 GPIO_IN 3 2 1>,
  144. <&gpio_b 8 GPIO_OUT 3 2 1>,
  145. <&gpio_b 9 (GPIO_OUT|GPIO_OUT_ACTIVE) 3 2 1>;
  146. test3-gpios =
  147. <&gpio_c 0 (GPIO_OUT|GPIO_OPEN_DRAIN)>,
  148. <&gpio_c 1 (GPIO_OUT|GPIO_OPEN_SOURCE)>,
  149. <&gpio_c 2 GPIO_OUT>,
  150. <&gpio_c 3 (GPIO_IN|GPIO_PULL_UP)>,
  151. <&gpio_c 4 (GPIO_IN|GPIO_PULL_DOWN)>,
  152. <&gpio_c 5 GPIO_IN>,
  153. <&gpio_c 6 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_DRAIN)>,
  154. <&gpio_c 7 (GPIO_ACTIVE_LOW|GPIO_OUT|GPIO_OPEN_SOURCE)>;
  155. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  156. test5-gpios = <&gpio_a 19>;
  157. int-value = <1234>;
  158. uint-value = <(-1234)>;
  159. int64-value = /bits/ 64 <0x1111222233334444>;
  160. int-array = <5678 9123 4567>;
  161. str-value = "test string";
  162. interrupts-extended = <&irq 3 0>;
  163. acpi,name = "GHIJ";
  164. phandle-value = <&gpio_c 10>, <0xFFFFFFFF 20>, <&gpio_a 30>;
  165. mux-controls = <&muxcontroller0 0>, <&muxcontroller0 1>,
  166. <&muxcontroller0 2>, <&muxcontroller0 3>,
  167. <&muxcontroller1>;
  168. mux-control-names = "mux0", "mux1", "mux2", "mux3", "mux4";
  169. mux-syscon = <&syscon3>;
  170. display-timings {
  171. timing0: 240x320 {
  172. clock-frequency = <6500000>;
  173. hactive = <240>;
  174. vactive = <320>;
  175. hfront-porch = <6>;
  176. hback-porch = <7>;
  177. hsync-len = <1>;
  178. vback-porch = <5>;
  179. vfront-porch = <8>;
  180. vsync-len = <2>;
  181. hsync-active = <1>;
  182. vsync-active = <0>;
  183. de-active = <1>;
  184. pixelclk-active = <1>;
  185. interlaced;
  186. doublescan;
  187. doubleclk;
  188. };
  189. timing1: 480x800 {
  190. clock-frequency = <9000000>;
  191. hactive = <480>;
  192. vactive = <800>;
  193. hfront-porch = <10>;
  194. hback-porch = <59>;
  195. hsync-len = <12>;
  196. vback-porch = <15>;
  197. vfront-porch = <17>;
  198. vsync-len = <16>;
  199. hsync-active = <0>;
  200. vsync-active = <1>;
  201. de-active = <0>;
  202. pixelclk-active = <0>;
  203. };
  204. timing2: 800x480 {
  205. clock-frequency = <33500000>;
  206. hactive = <800>;
  207. vactive = <480>;
  208. hback-porch = <89>;
  209. hfront-porch = <164>;
  210. vback-porch = <23>;
  211. vfront-porch = <10>;
  212. hsync-len = <11>;
  213. vsync-len = <13>;
  214. };
  215. };
  216. };
  217. junk {
  218. reg = <1 1>;
  219. compatible = "not,compatible";
  220. };
  221. no-compatible {
  222. reg = <2 1>;
  223. };
  224. backlight: backlight {
  225. compatible = "pwm-backlight";
  226. enable-gpios = <&gpio_a 1>;
  227. power-supply = <&ldo_1>;
  228. pwms = <&pwm 0 1000>;
  229. default-brightness-level = <5>;
  230. brightness-levels = <0 16 32 64 128 170 202 234 255>;
  231. };
  232. bind-test {
  233. compatible = "simple-bus";
  234. bind-test-child1 {
  235. compatible = "sandbox,phy";
  236. #phy-cells = <1>;
  237. };
  238. bind-test-child2 {
  239. compatible = "simple-bus";
  240. };
  241. };
  242. b-test {
  243. reg = <3 1>;
  244. compatible = "denx,u-boot-fdt-test";
  245. ping-expect = <3>;
  246. ping-add = <3>;
  247. mux-controls = <&muxcontroller0 0>;
  248. mux-control-names = "mux0";
  249. };
  250. phy_provider0: gen_phy@0 {
  251. compatible = "sandbox,phy";
  252. #phy-cells = <1>;
  253. };
  254. phy_provider1: gen_phy@1 {
  255. compatible = "sandbox,phy";
  256. #phy-cells = <0>;
  257. broken;
  258. };
  259. phy_provider2: gen_phy@2 {
  260. compatible = "sandbox,phy";
  261. #phy-cells = <0>;
  262. };
  263. gen_phy_user: gen_phy_user {
  264. compatible = "simple-bus";
  265. phys = <&phy_provider0 0>, <&phy_provider0 1>, <&phy_provider1>;
  266. phy-names = "phy1", "phy2", "phy3";
  267. };
  268. gen_phy_user1: gen_phy_user1 {
  269. compatible = "simple-bus";
  270. phys = <&phy_provider0 0>, <&phy_provider2>;
  271. phy-names = "phy1", "phy2";
  272. };
  273. some-bus {
  274. #address-cells = <1>;
  275. #size-cells = <0>;
  276. compatible = "denx,u-boot-test-bus";
  277. reg = <3 1>;
  278. ping-expect = <4>;
  279. ping-add = <4>;
  280. c-test@5 {
  281. compatible = "denx,u-boot-fdt-test";
  282. reg = <5>;
  283. ping-expect = <5>;
  284. ping-add = <5>;
  285. };
  286. c-test@0 {
  287. compatible = "denx,u-boot-fdt-test";
  288. reg = <0>;
  289. ping-expect = <6>;
  290. ping-add = <6>;
  291. };
  292. c-test@1 {
  293. compatible = "denx,u-boot-fdt-test";
  294. reg = <1>;
  295. ping-expect = <7>;
  296. ping-add = <7>;
  297. };
  298. };
  299. d-test {
  300. reg = <3 1>;
  301. ping-expect = <6>;
  302. ping-add = <6>;
  303. compatible = "google,another-fdt-test";
  304. };
  305. e-test {
  306. reg = <3 1>;
  307. ping-expect = <6>;
  308. ping-add = <6>;
  309. compatible = "google,another-fdt-test";
  310. };
  311. f-test {
  312. compatible = "denx,u-boot-fdt-test";
  313. };
  314. g-test {
  315. compatible = "denx,u-boot-fdt-test";
  316. };
  317. h-test {
  318. compatible = "denx,u-boot-fdt-test1";
  319. };
  320. i-test {
  321. compatible = "mediatek,u-boot-fdt-test";
  322. #address-cells = <1>;
  323. #size-cells = <0>;
  324. subnode@0 {
  325. reg = <0>;
  326. };
  327. subnode@1 {
  328. reg = <1>;
  329. };
  330. subnode@2 {
  331. reg = <2>;
  332. };
  333. };
  334. devres-test {
  335. compatible = "denx,u-boot-devres-test";
  336. };
  337. another-test {
  338. reg = <0 2>;
  339. compatible = "denx,u-boot-fdt-test";
  340. test4-gpios = <&gpio_a 14>, <&gpio_b 4 1 3 2 1>;
  341. test5-gpios = <&gpio_a 19>;
  342. };
  343. mmio-bus@0 {
  344. #address-cells = <1>;
  345. #size-cells = <1>;
  346. compatible = "denx,u-boot-test-bus";
  347. dma-ranges = <0x10000000 0x00000000 0x00040000>;
  348. subnode@0 {
  349. compatible = "denx,u-boot-fdt-test";
  350. };
  351. };
  352. mmio-bus@1 {
  353. #address-cells = <1>;
  354. #size-cells = <1>;
  355. compatible = "denx,u-boot-test-bus";
  356. subnode@0 {
  357. compatible = "denx,u-boot-fdt-test";
  358. };
  359. };
  360. acpi_test1: acpi-test {
  361. compatible = "denx,u-boot-acpi-test";
  362. acpi-ssdt-test-data = "ab";
  363. acpi-dsdt-test-data = "hi";
  364. child {
  365. compatible = "denx,u-boot-acpi-test";
  366. };
  367. };
  368. acpi_test2: acpi-test2 {
  369. compatible = "denx,u-boot-acpi-test";
  370. acpi-ssdt-test-data = "cd";
  371. acpi-dsdt-test-data = "jk";
  372. };
  373. clocks {
  374. clk_fixed: clk-fixed {
  375. compatible = "fixed-clock";
  376. #clock-cells = <0>;
  377. clock-frequency = <1234>;
  378. };
  379. clk_fixed_factor: clk-fixed-factor {
  380. compatible = "fixed-factor-clock";
  381. #clock-cells = <0>;
  382. clock-div = <3>;
  383. clock-mult = <2>;
  384. clocks = <&clk_fixed>;
  385. };
  386. osc {
  387. compatible = "fixed-clock";
  388. #clock-cells = <0>;
  389. clock-frequency = <20000000>;
  390. };
  391. };
  392. clk_sandbox: clk-sbox {
  393. compatible = "sandbox,clk";
  394. #clock-cells = <1>;
  395. assigned-clocks = <&clk_sandbox 3>;
  396. assigned-clock-rates = <321>;
  397. };
  398. clk-test {
  399. compatible = "sandbox,clk-test";
  400. clocks = <&clk_fixed>,
  401. <&clk_sandbox 1>,
  402. <&clk_sandbox 0>,
  403. <&clk_sandbox 3>,
  404. <&clk_sandbox 2>;
  405. clock-names = "fixed", "i2c", "spi", "uart2", "uart1";
  406. };
  407. ccf: clk-ccf {
  408. compatible = "sandbox,clk-ccf";
  409. };
  410. eth@10002000 {
  411. compatible = "sandbox,eth";
  412. reg = <0x10002000 0x1000>;
  413. fake-host-hwaddr = [00 00 66 44 22 00];
  414. };
  415. eth_5: eth@10003000 {
  416. compatible = "sandbox,eth";
  417. reg = <0x10003000 0x1000>;
  418. fake-host-hwaddr = [00 00 66 44 22 11];
  419. };
  420. eth_3: sbe5 {
  421. compatible = "sandbox,eth";
  422. reg = <0x10005000 0x1000>;
  423. fake-host-hwaddr = [00 00 66 44 22 33];
  424. };
  425. eth@10004000 {
  426. compatible = "sandbox,eth";
  427. reg = <0x10004000 0x1000>;
  428. fake-host-hwaddr = [00 00 66 44 22 22];
  429. };
  430. dsa_eth0: dsa-test-eth {
  431. compatible = "sandbox,eth";
  432. reg = <0x10006000 0x1000>;
  433. fake-host-hwaddr = [00 00 66 44 22 66];
  434. };
  435. dsa-test {
  436. compatible = "sandbox,dsa";
  437. ports {
  438. #address-cells = <1>;
  439. #size-cells = <0>;
  440. swp_0: port@0 {
  441. reg = <0>;
  442. label = "lan0";
  443. phy-mode = "rgmii-rxid";
  444. fixed-link {
  445. speed = <100>;
  446. full-duplex;
  447. };
  448. };
  449. swp_1: port@1 {
  450. reg = <1>;
  451. label = "lan1";
  452. phy-mode = "rgmii-txid";
  453. fixed-link = <0 1 100 0 0>;
  454. };
  455. port@2 {
  456. reg = <2>;
  457. ethernet = <&dsa_eth0>;
  458. fixed-link {
  459. speed = <1000>;
  460. full-duplex;
  461. };
  462. };
  463. };
  464. };
  465. firmware {
  466. sandbox_firmware: sandbox-firmware {
  467. compatible = "sandbox,firmware";
  468. };
  469. sandbox-scmi-agent@0 {
  470. compatible = "sandbox,scmi-agent";
  471. #address-cells = <1>;
  472. #size-cells = <0>;
  473. clk_scmi0: protocol@14 {
  474. reg = <0x14>;
  475. #clock-cells = <1>;
  476. };
  477. reset_scmi0: protocol@16 {
  478. reg = <0x16>;
  479. #reset-cells = <1>;
  480. };
  481. protocol@17 {
  482. reg = <0x17>;
  483. regulators {
  484. #address-cells = <1>;
  485. #size-cells = <0>;
  486. regul0_scmi0: reg@0 {
  487. reg = <0>;
  488. regulator-name = "sandbox-voltd0";
  489. regulator-min-microvolt = <1100000>;
  490. regulator-max-microvolt = <3300000>;
  491. };
  492. regul1_scmi0: reg@1 {
  493. reg = <0x1>;
  494. regulator-name = "sandbox-voltd1";
  495. regulator-min-microvolt = <1800000>;
  496. };
  497. };
  498. };
  499. };
  500. sandbox-scmi-agent@1 {
  501. compatible = "sandbox,scmi-agent";
  502. #address-cells = <1>;
  503. #size-cells = <0>;
  504. clk_scmi1: protocol@14 {
  505. reg = <0x14>;
  506. #clock-cells = <1>;
  507. };
  508. protocol@10 {
  509. reg = <0x10>;
  510. };
  511. };
  512. };
  513. pinctrl-gpio {
  514. compatible = "sandbox,pinctrl-gpio";
  515. gpio_a: base-gpios {
  516. compatible = "sandbox,gpio";
  517. gpio-controller;
  518. #gpio-cells = <1>;
  519. gpio-bank-name = "a";
  520. sandbox,gpio-count = <20>;
  521. hog_input_active_low {
  522. gpio-hog;
  523. input;
  524. gpios = <10 GPIO_ACTIVE_LOW>;
  525. };
  526. hog_input_active_high {
  527. gpio-hog;
  528. input;
  529. gpios = <11 GPIO_ACTIVE_HIGH>;
  530. };
  531. hog_output_low {
  532. gpio-hog;
  533. output-low;
  534. gpios = <12 GPIO_ACTIVE_HIGH>;
  535. };
  536. hog_output_high {
  537. gpio-hog;
  538. output-high;
  539. gpios = <13 GPIO_ACTIVE_HIGH>;
  540. };
  541. };
  542. gpio_b: extra-gpios {
  543. compatible = "sandbox,gpio";
  544. gpio-controller;
  545. #gpio-cells = <5>;
  546. gpio-bank-name = "b";
  547. sandbox,gpio-count = <10>;
  548. };
  549. gpio_c: pinmux-gpios {
  550. compatible = "sandbox,gpio";
  551. gpio-controller;
  552. #gpio-cells = <2>;
  553. gpio-bank-name = "c";
  554. sandbox,gpio-count = <10>;
  555. };
  556. };
  557. i2c@0 {
  558. #address-cells = <1>;
  559. #size-cells = <0>;
  560. reg = <0 1>;
  561. compatible = "sandbox,i2c";
  562. clock-frequency = <100000>;
  563. pinctrl-names = "default";
  564. pinctrl-0 = <&pinmux_i2c0_pins>;
  565. eeprom@2c {
  566. reg = <0x2c>;
  567. compatible = "i2c-eeprom";
  568. sandbox,emul = <&emul_eeprom>;
  569. partitions {
  570. compatible = "fixed-partitions";
  571. #address-cells = <1>;
  572. #size-cells = <1>;
  573. bootcount_i2c: bootcount@10 {
  574. reg = <10 2>;
  575. };
  576. };
  577. };
  578. rtc_0: rtc@43 {
  579. reg = <0x43>;
  580. compatible = "sandbox-rtc";
  581. sandbox,emul = <&emul0>;
  582. };
  583. rtc_1: rtc@61 {
  584. reg = <0x61>;
  585. compatible = "sandbox-rtc";
  586. sandbox,emul = <&emul1>;
  587. };
  588. i2c_emul: emul {
  589. reg = <0xff>;
  590. compatible = "sandbox,i2c-emul-parent";
  591. emul_eeprom: emul-eeprom {
  592. compatible = "sandbox,i2c-eeprom";
  593. sandbox,filename = "i2c.bin";
  594. sandbox,size = <256>;
  595. };
  596. emul0: emul0 {
  597. compatible = "sandbox,i2c-rtc-emul";
  598. };
  599. emul1: emull {
  600. compatible = "sandbox,i2c-rtc-emul";
  601. };
  602. };
  603. sandbox_pmic: sandbox_pmic {
  604. reg = <0x40>;
  605. sandbox,emul = <&emul_pmic0>;
  606. };
  607. mc34708: pmic@41 {
  608. reg = <0x41>;
  609. sandbox,emul = <&emul_pmic1>;
  610. };
  611. };
  612. bootcount@0 {
  613. compatible = "u-boot,bootcount-rtc";
  614. rtc = <&rtc_1>;
  615. offset = <0x13>;
  616. };
  617. bootcount {
  618. compatible = "u-boot,bootcount-i2c-eeprom";
  619. i2c-eeprom = <&bootcount_i2c>;
  620. };
  621. adc: adc@0 {
  622. compatible = "sandbox,adc";
  623. #io-channel-cells = <1>;
  624. vdd-supply = <&buck2>;
  625. vss-microvolts = <0>;
  626. };
  627. irq: irq {
  628. compatible = "sandbox,irq";
  629. interrupt-controller;
  630. #interrupt-cells = <2>;
  631. };
  632. lcd {
  633. u-boot,dm-pre-reloc;
  634. compatible = "sandbox,lcd-sdl";
  635. pinctrl-names = "default";
  636. pinctrl-0 = <&pinmux_lcd_pins>;
  637. xres = <1366>;
  638. yres = <768>;
  639. };
  640. leds {
  641. compatible = "gpio-leds";
  642. iracibble {
  643. gpios = <&gpio_a 1 0>;
  644. label = "sandbox:red";
  645. };
  646. martinet {
  647. gpios = <&gpio_a 2 0>;
  648. label = "sandbox:green";
  649. };
  650. default_on {
  651. gpios = <&gpio_a 5 0>;
  652. label = "sandbox:default_on";
  653. default-state = "on";
  654. };
  655. default_off {
  656. gpios = <&gpio_a 6 0>;
  657. /* label intentionally omitted */
  658. default-state = "off";
  659. };
  660. };
  661. mbox: mbox {
  662. compatible = "sandbox,mbox";
  663. #mbox-cells = <1>;
  664. };
  665. mbox-test {
  666. compatible = "sandbox,mbox-test";
  667. mboxes = <&mbox 100>, <&mbox 1>;
  668. mbox-names = "other", "test";
  669. };
  670. cpus {
  671. timebase-frequency = <2000000>;
  672. cpu-test1 {
  673. timebase-frequency = <3000000>;
  674. compatible = "sandbox,cpu_sandbox";
  675. u-boot,dm-pre-reloc;
  676. };
  677. cpu-test2 {
  678. compatible = "sandbox,cpu_sandbox";
  679. u-boot,dm-pre-reloc;
  680. };
  681. cpu-test3 {
  682. compatible = "sandbox,cpu_sandbox";
  683. u-boot,dm-pre-reloc;
  684. };
  685. };
  686. chipid: chipid {
  687. compatible = "sandbox,soc";
  688. };
  689. i2s: i2s {
  690. compatible = "sandbox,i2s";
  691. #sound-dai-cells = <1>;
  692. sandbox,silent; /* Don't emit sounds while testing */
  693. };
  694. nop-test_0 {
  695. compatible = "sandbox,nop_sandbox1";
  696. nop-test_1 {
  697. compatible = "sandbox,nop_sandbox2";
  698. bind = "True";
  699. };
  700. nop-test_2 {
  701. compatible = "sandbox,nop_sandbox2";
  702. bind = "False";
  703. };
  704. };
  705. misc-test {
  706. compatible = "sandbox,misc_sandbox";
  707. };
  708. mmc2 {
  709. compatible = "sandbox,mmc";
  710. };
  711. mmc1 {
  712. compatible = "sandbox,mmc";
  713. };
  714. mmc0 {
  715. compatible = "sandbox,mmc";
  716. };
  717. pch {
  718. compatible = "sandbox,pch";
  719. };
  720. pci0: pci@0 {
  721. compatible = "sandbox,pci";
  722. device_type = "pci";
  723. bus-range = <0x00 0xff>;
  724. #address-cells = <3>;
  725. #size-cells = <2>;
  726. ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000000
  727. 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
  728. pci@0,0 {
  729. compatible = "pci-generic";
  730. reg = <0x0000 0 0 0 0>;
  731. sandbox,emul = <&swap_case_emul0_0>;
  732. };
  733. pci@1,0 {
  734. compatible = "pci-generic";
  735. /* reg 0 is at 0x14, using FDT_PCI_SPACE_MEM32 */
  736. reg = <0x02000814 0 0 0 0
  737. 0x01000810 0 0 0 0>;
  738. sandbox,emul = <&swap_case_emul0_1>;
  739. };
  740. p2sb-pci@2,0 {
  741. compatible = "sandbox,p2sb";
  742. reg = <0x02001010 0 0 0 0>;
  743. sandbox,emul = <&p2sb_emul>;
  744. adder {
  745. intel,p2sb-port-id = <3>;
  746. compatible = "sandbox,adder";
  747. };
  748. };
  749. pci@1e,0 {
  750. compatible = "sandbox,pmc";
  751. reg = <0xf000 0 0 0 0>;
  752. sandbox,emul = <&pmc_emul1e>;
  753. acpi-base = <0x400>;
  754. gpe0-dwx-mask = <0xf>;
  755. gpe0-dwx-shift-base = <4>;
  756. gpe0-dw = <6 7 9>;
  757. gpe0-sts = <0x20>;
  758. gpe0-en = <0x30>;
  759. };
  760. pci@1f,0 {
  761. compatible = "pci-generic";
  762. /* reg 0 is at 0x10, using FDT_PCI_SPACE_IO */
  763. reg = <0x0100f810 0 0 0 0>;
  764. sandbox,emul = <&swap_case_emul0_1f>;
  765. };
  766. };
  767. pci-emul0 {
  768. compatible = "sandbox,pci-emul-parent";
  769. swap_case_emul0_0: emul0@0,0 {
  770. compatible = "sandbox,swap-case";
  771. };
  772. swap_case_emul0_1: emul0@1,0 {
  773. compatible = "sandbox,swap-case";
  774. use-ea;
  775. };
  776. swap_case_emul0_1f: emul0@1f,0 {
  777. compatible = "sandbox,swap-case";
  778. };
  779. p2sb_emul: emul@2,0 {
  780. compatible = "sandbox,p2sb-emul";
  781. };
  782. pmc_emul1e: emul@1e,0 {
  783. compatible = "sandbox,pmc-emul";
  784. };
  785. };
  786. pci1: pci@1 {
  787. compatible = "sandbox,pci";
  788. device_type = "pci";
  789. bus-range = <0x00 0xff>;
  790. #address-cells = <3>;
  791. #size-cells = <2>;
  792. ranges = <0x02000000 0 0x30000000 0x30000000 0 0x2000 // MEM0
  793. 0x02000000 0 0x31000000 0x31000000 0 0x2000 // MEM1
  794. 0x01000000 0 0x40000000 0x40000000 0 0x2000>;
  795. sandbox,dev-info = <0x08 0x00 0x1234 0x5678
  796. 0x0c 0x00 0x1234 0x5678
  797. 0x10 0x00 0x1234 0x5678>;
  798. pci@10,0 {
  799. reg = <0x8000 0 0 0 0>;
  800. };
  801. };
  802. pci2: pci@2 {
  803. compatible = "sandbox,pci";
  804. device_type = "pci";
  805. bus-range = <0x00 0xff>;
  806. #address-cells = <3>;
  807. #size-cells = <2>;
  808. ranges = <0x02000000 0 0x50000000 0x50000000 0 0x2000
  809. 0x01000000 0 0x60000000 0x60000000 0 0x2000>;
  810. sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
  811. pci@1f,0 {
  812. compatible = "pci-generic";
  813. reg = <0xf800 0 0 0 0>;
  814. sandbox,emul = <&swap_case_emul2_1f>;
  815. };
  816. };
  817. pci-emul2 {
  818. compatible = "sandbox,pci-emul-parent";
  819. swap_case_emul2_1f: emul2@1f,0 {
  820. compatible = "sandbox,swap-case";
  821. };
  822. };
  823. pci_ep: pci_ep {
  824. compatible = "sandbox,pci_ep";
  825. };
  826. probing {
  827. compatible = "simple-bus";
  828. test1 {
  829. compatible = "denx,u-boot-probe-test";
  830. };
  831. test2 {
  832. compatible = "denx,u-boot-probe-test";
  833. };
  834. test3 {
  835. compatible = "denx,u-boot-probe-test";
  836. };
  837. test4 {
  838. compatible = "denx,u-boot-probe-test";
  839. first-syscon = <&syscon0>;
  840. second-sys-ctrl = <&another_system_controller>;
  841. third-syscon = <&syscon2>;
  842. };
  843. };
  844. pwrdom: power-domain {
  845. compatible = "sandbox,power-domain";
  846. #power-domain-cells = <1>;
  847. };
  848. power-domain-test {
  849. compatible = "sandbox,power-domain-test";
  850. power-domains = <&pwrdom 2>;
  851. };
  852. pwm: pwm {
  853. compatible = "sandbox,pwm";
  854. #pwm-cells = <2>;
  855. pinctrl-names = "default";
  856. pinctrl-0 = <&pinmux_pwm_pins>;
  857. };
  858. pwm2 {
  859. compatible = "sandbox,pwm";
  860. #pwm-cells = <2>;
  861. };
  862. ram {
  863. compatible = "sandbox,ram";
  864. };
  865. reset@0 {
  866. compatible = "sandbox,warm-reset";
  867. };
  868. reset@1 {
  869. compatible = "sandbox,reset";
  870. };
  871. resetc: reset-ctl {
  872. compatible = "sandbox,reset-ctl";
  873. #reset-cells = <1>;
  874. };
  875. reset-ctl-test {
  876. compatible = "sandbox,reset-ctl-test";
  877. resets = <&resetc 100>, <&resetc 2>, <&resetc 20>, <&resetc 40>;
  878. reset-names = "other", "test", "test2", "test3";
  879. };
  880. rng {
  881. compatible = "sandbox,sandbox-rng";
  882. };
  883. rproc_1: rproc@1 {
  884. compatible = "sandbox,test-processor";
  885. remoteproc-name = "remoteproc-test-dev1";
  886. };
  887. rproc_2: rproc@2 {
  888. compatible = "sandbox,test-processor";
  889. internal-memory-mapped;
  890. remoteproc-name = "remoteproc-test-dev2";
  891. };
  892. panel {
  893. compatible = "simple-panel";
  894. backlight = <&backlight 0 100>;
  895. };
  896. smem@0 {
  897. compatible = "sandbox,smem";
  898. };
  899. sound {
  900. compatible = "sandbox,sound";
  901. cpu {
  902. sound-dai = <&i2s 0>;
  903. };
  904. codec {
  905. sound-dai = <&audio 0>;
  906. };
  907. };
  908. spi@0 {
  909. #address-cells = <1>;
  910. #size-cells = <0>;
  911. reg = <0 1>;
  912. compatible = "sandbox,spi";
  913. cs-gpios = <0>, <0>, <&gpio_a 0>;
  914. pinctrl-names = "default";
  915. pinctrl-0 = <&pinmux_spi0_pins>;
  916. spi.bin@0 {
  917. reg = <0>;
  918. compatible = "spansion,m25p16", "jedec,spi-nor";
  919. spi-max-frequency = <40000000>;
  920. sandbox,filename = "spi.bin";
  921. };
  922. spi.bin@1 {
  923. reg = <1>;
  924. compatible = "spansion,m25p16", "jedec,spi-nor";
  925. spi-max-frequency = <50000000>;
  926. sandbox,filename = "spi.bin";
  927. spi-cpol;
  928. spi-cpha;
  929. };
  930. };
  931. syscon0: syscon@0 {
  932. compatible = "sandbox,syscon0";
  933. reg = <0x10 16>;
  934. };
  935. another_system_controller: syscon@1 {
  936. compatible = "sandbox,syscon1";
  937. reg = <0x20 5
  938. 0x28 6
  939. 0x30 7
  940. 0x38 8>;
  941. };
  942. syscon2: syscon@2 {
  943. compatible = "simple-mfd", "syscon";
  944. reg = <0x40 5
  945. 0x48 6
  946. 0x50 7
  947. 0x58 8>;
  948. };
  949. syscon3: syscon@3 {
  950. compatible = "simple-mfd", "syscon";
  951. reg = <0x000100 0x10>;
  952. muxcontroller0: a-mux-controller {
  953. compatible = "mmio-mux";
  954. #mux-control-cells = <1>;
  955. mux-reg-masks = <0x0 0x30>, /* 0: reg 0x0, bits 5:4 */
  956. <0xc 0x1E>, /* 1: reg 0xc, bits 4:1 */
  957. <0x4 0xFF>; /* 2: reg 0x4, bits 7:0 */
  958. idle-states = <MUX_IDLE_AS_IS>, <0x02>, <0x73>;
  959. u-boot,mux-autoprobe;
  960. };
  961. };
  962. muxcontroller1: emul-mux-controller {
  963. compatible = "mux-emul";
  964. #mux-control-cells = <0>;
  965. u-boot,mux-autoprobe;
  966. idle-state = <0xabcd>;
  967. };
  968. testfdtm0 {
  969. compatible = "denx,u-boot-fdtm-test";
  970. };
  971. testfdtm1: testfdtm1 {
  972. compatible = "denx,u-boot-fdtm-test";
  973. };
  974. testfdtm2 {
  975. compatible = "denx,u-boot-fdtm-test";
  976. };
  977. timer@0 {
  978. compatible = "sandbox,timer";
  979. clock-frequency = <1000000>;
  980. };
  981. timer@1 {
  982. compatible = "sandbox,timer";
  983. sandbox,timebase-frequency-fallback;
  984. };
  985. tpm2 {
  986. compatible = "sandbox,tpm2";
  987. };
  988. uart0: serial {
  989. compatible = "sandbox,serial";
  990. u-boot,dm-pre-reloc;
  991. pinctrl-names = "default";
  992. pinctrl-0 = <&pinmux_uart0_pins>;
  993. };
  994. usb_0: usb@0 {
  995. compatible = "sandbox,usb";
  996. status = "disabled";
  997. hub {
  998. compatible = "sandbox,usb-hub";
  999. #address-cells = <1>;
  1000. #size-cells = <0>;
  1001. flash-stick {
  1002. reg = <0>;
  1003. compatible = "sandbox,usb-flash";
  1004. };
  1005. };
  1006. };
  1007. usb_1: usb@1 {
  1008. compatible = "sandbox,usb";
  1009. hub {
  1010. compatible = "usb-hub";
  1011. usb,device-class = <9>;
  1012. #address-cells = <1>;
  1013. #size-cells = <0>;
  1014. hub-emul {
  1015. compatible = "sandbox,usb-hub";
  1016. #address-cells = <1>;
  1017. #size-cells = <0>;
  1018. flash-stick@0 {
  1019. reg = <0>;
  1020. compatible = "sandbox,usb-flash";
  1021. sandbox,filepath = "testflash.bin";
  1022. };
  1023. flash-stick@1 {
  1024. reg = <1>;
  1025. compatible = "sandbox,usb-flash";
  1026. sandbox,filepath = "testflash1.bin";
  1027. };
  1028. flash-stick@2 {
  1029. reg = <2>;
  1030. compatible = "sandbox,usb-flash";
  1031. sandbox,filepath = "testflash2.bin";
  1032. };
  1033. keyb@3 {
  1034. reg = <3>;
  1035. compatible = "sandbox,usb-keyb";
  1036. };
  1037. };
  1038. usbstor@1 {
  1039. reg = <1>;
  1040. };
  1041. usbstor@3 {
  1042. reg = <3>;
  1043. };
  1044. };
  1045. };
  1046. usb_2: usb@2 {
  1047. compatible = "sandbox,usb";
  1048. status = "disabled";
  1049. };
  1050. spmi: spmi@0 {
  1051. compatible = "sandbox,spmi";
  1052. #address-cells = <0x1>;
  1053. #size-cells = <0x1>;
  1054. ranges;
  1055. pm8916@0 {
  1056. compatible = "qcom,spmi-pmic";
  1057. reg = <0x0 0x1>;
  1058. #address-cells = <0x1>;
  1059. #size-cells = <0x1>;
  1060. ranges;
  1061. spmi_gpios: gpios@c000 {
  1062. compatible = "qcom,pm8916-gpio";
  1063. reg = <0xc000 0x400>;
  1064. gpio-controller;
  1065. gpio-count = <4>;
  1066. #gpio-cells = <2>;
  1067. gpio-bank-name="spmi";
  1068. };
  1069. };
  1070. };
  1071. wdt0: wdt@0 {
  1072. compatible = "sandbox,wdt";
  1073. };
  1074. axi: axi@0 {
  1075. compatible = "sandbox,axi";
  1076. #address-cells = <0x1>;
  1077. #size-cells = <0x1>;
  1078. store@0 {
  1079. compatible = "sandbox,sandbox_store";
  1080. reg = <0x0 0x400>;
  1081. };
  1082. };
  1083. chosen {
  1084. #address-cells = <1>;
  1085. #size-cells = <1>;
  1086. setting = "sunrise ohoka";
  1087. other-node = "/some-bus/c-test@5";
  1088. int-values = <0x1937 72993>;
  1089. u-boot,acpi-ssdt-order = <&acpi_test2 &acpi_test1>;
  1090. chosen-test {
  1091. compatible = "denx,u-boot-fdt-test";
  1092. reg = <9 1>;
  1093. };
  1094. };
  1095. translation-test@8000 {
  1096. compatible = "simple-bus";
  1097. reg = <0x8000 0x4000>;
  1098. #address-cells = <0x2>;
  1099. #size-cells = <0x1>;
  1100. ranges = <0 0x0 0x8000 0x1000
  1101. 1 0x100 0x9000 0x1000
  1102. 2 0x200 0xA000 0x1000
  1103. 3 0x300 0xB000 0x1000
  1104. 4 0x400 0xC000 0x1000
  1105. >;
  1106. dma-ranges = <0 0x000 0x10000000 0x1000
  1107. 1 0x100 0x20000000 0x1000
  1108. >;
  1109. dev@0,0 {
  1110. compatible = "denx,u-boot-fdt-dummy";
  1111. reg = <0 0x0 0x1000>;
  1112. reg-names = "sandbox-dummy-0";
  1113. };
  1114. dev@1,100 {
  1115. compatible = "denx,u-boot-fdt-dummy";
  1116. reg = <1 0x100 0x1000>;
  1117. };
  1118. dev@2,200 {
  1119. compatible = "denx,u-boot-fdt-dummy";
  1120. reg = <2 0x200 0x1000>;
  1121. };
  1122. noxlatebus@3,300 {
  1123. compatible = "simple-bus";
  1124. reg = <3 0x300 0x1000>;
  1125. #address-cells = <0x1>;
  1126. #size-cells = <0x0>;
  1127. dev@42 {
  1128. compatible = "denx,u-boot-fdt-dummy";
  1129. reg = <0x42>;
  1130. };
  1131. };
  1132. xlatebus@4,400 {
  1133. compatible = "sandbox,zero-size-cells-bus";
  1134. reg = <4 0x400 0x1000>;
  1135. #address-cells = <1>;
  1136. #size-cells = <1>;
  1137. ranges = <0 4 0x400 0x1000>;
  1138. devs {
  1139. #address-cells = <1>;
  1140. #size-cells = <0>;
  1141. dev@19 {
  1142. compatible = "denx,u-boot-fdt-dummy";
  1143. reg = <0x19>;
  1144. };
  1145. };
  1146. };
  1147. };
  1148. osd {
  1149. compatible = "sandbox,sandbox_osd";
  1150. };
  1151. sandbox_tee {
  1152. compatible = "sandbox,tee";
  1153. };
  1154. sandbox_virtio1 {
  1155. compatible = "sandbox,virtio1";
  1156. };
  1157. sandbox_virtio2 {
  1158. compatible = "sandbox,virtio2";
  1159. };
  1160. sandbox_scmi {
  1161. compatible = "sandbox,scmi-devices";
  1162. clocks = <&clk_scmi0 7>, <&clk_scmi0 3>, <&clk_scmi1 1>;
  1163. resets = <&reset_scmi0 3>;
  1164. regul0-supply = <&regul0_scmi0>;
  1165. regul1-supply = <&regul1_scmi0>;
  1166. };
  1167. pinctrl {
  1168. compatible = "sandbox,pinctrl";
  1169. pinctrl-names = "default", "alternate";
  1170. pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_i2s>;
  1171. pinctrl-1 = <&pinctrl_spi>, <&pinctrl_i2c>;
  1172. pinctrl_gpios: gpios {
  1173. gpio0 {
  1174. pins = "P5";
  1175. function = "GPIO";
  1176. bias-pull-up;
  1177. input-disable;
  1178. };
  1179. gpio1 {
  1180. pins = "P6";
  1181. function = "GPIO";
  1182. output-high;
  1183. drive-open-drain;
  1184. };
  1185. gpio2 {
  1186. pinmux = <SANDBOX_PINMUX(7, SANDBOX_PINMUX_GPIO)>;
  1187. bias-pull-down;
  1188. input-enable;
  1189. };
  1190. gpio3 {
  1191. pinmux = <SANDBOX_PINMUX(8, SANDBOX_PINMUX_GPIO)>;
  1192. bias-disable;
  1193. };
  1194. };
  1195. pinctrl_i2c: i2c {
  1196. groups {
  1197. groups = "I2C_UART";
  1198. function = "I2C";
  1199. };
  1200. pins {
  1201. pins = "P0", "P1";
  1202. drive-open-drain;
  1203. };
  1204. };
  1205. pinctrl_i2s: i2s {
  1206. groups = "SPI_I2S";
  1207. function = "I2S";
  1208. };
  1209. pinctrl_spi: spi {
  1210. groups = "SPI_I2S";
  1211. function = "SPI";
  1212. cs {
  1213. pinmux = <SANDBOX_PINMUX(5, SANDBOX_PINMUX_CS)>,
  1214. <SANDBOX_PINMUX(6, SANDBOX_PINMUX_CS)>;
  1215. };
  1216. };
  1217. };
  1218. pinctrl-single-no-width {
  1219. compatible = "pinctrl-single";
  1220. reg = <0x0000 0x238>;
  1221. #pinctrl-cells = <1>;
  1222. pinctrl-single,function-mask = <0x7f>;
  1223. };
  1224. pinctrl-single-pins {
  1225. compatible = "pinctrl-single";
  1226. reg = <0x0000 0x238>;
  1227. #pinctrl-cells = <1>;
  1228. pinctrl-single,register-width = <32>;
  1229. pinctrl-single,function-mask = <0x7f>;
  1230. pinmux_pwm_pins: pinmux_pwm_pins {
  1231. pinctrl-single,pins = < 0x48 0x06 >;
  1232. };
  1233. pinmux_spi0_pins: pinmux_spi0_pins {
  1234. pinctrl-single,pins = <
  1235. 0x190 0x0c
  1236. 0x194 0x0c
  1237. 0x198 0x23
  1238. 0x19c 0x0c
  1239. >;
  1240. };
  1241. pinmux_uart0_pins: pinmux_uart0_pins {
  1242. pinctrl-single,pins = <
  1243. 0x70 0x30
  1244. 0x74 0x00
  1245. >;
  1246. };
  1247. };
  1248. pinctrl-single-bits {
  1249. compatible = "pinctrl-single";
  1250. reg = <0x0000 0x50>;
  1251. #pinctrl-cells = <2>;
  1252. pinctrl-single,bit-per-mux;
  1253. pinctrl-single,register-width = <32>;
  1254. pinctrl-single,function-mask = <0xf>;
  1255. pinmux_i2c0_pins: pinmux_i2c0_pins {
  1256. pinctrl-single,bits = <
  1257. 0x10 0x00002200 0x0000ff00
  1258. >;
  1259. };
  1260. pinmux_lcd_pins: pinmux_lcd_pins {
  1261. pinctrl-single,bits = <
  1262. 0x40 0x22222200 0xffffff00
  1263. 0x44 0x22222222 0xffffffff
  1264. 0x48 0x00000022 0x000000ff
  1265. 0x48 0x02000000 0x0f000000
  1266. 0x4c 0x02000022 0x0f0000ff
  1267. >;
  1268. };
  1269. };
  1270. hwspinlock@0 {
  1271. compatible = "sandbox,hwspinlock";
  1272. };
  1273. dma: dma {
  1274. compatible = "sandbox,dma";
  1275. #dma-cells = <1>;
  1276. dmas = <&dma 0>, <&dma 1>, <&dma 2>;
  1277. dma-names = "m2m", "tx0", "rx0";
  1278. };
  1279. /*
  1280. * keep mdio-mux ahead of mdio so that the mux is removed first at the
  1281. * end of the test. If parent mdio is removed first, clean-up of the
  1282. * mux will trigger a 2nd probe of parent-mdio, leaving parent-mdio
  1283. * active at the end of the test. That it turn doesn't allow the mdio
  1284. * class to be destroyed, triggering an error.
  1285. */
  1286. mdio-mux-test {
  1287. compatible = "sandbox,mdio-mux";
  1288. #address-cells = <1>;
  1289. #size-cells = <0>;
  1290. mdio-parent-bus = <&mdio>;
  1291. mdio-ch-test@0 {
  1292. reg = <0>;
  1293. };
  1294. mdio-ch-test@1 {
  1295. reg = <1>;
  1296. };
  1297. };
  1298. mdio: mdio-test {
  1299. compatible = "sandbox,mdio";
  1300. };
  1301. pm-bus-test {
  1302. compatible = "simple-pm-bus";
  1303. clocks = <&clk_sandbox 4>;
  1304. power-domains = <&pwrdom 1>;
  1305. };
  1306. resetc2: syscon-reset {
  1307. compatible = "syscon-reset";
  1308. #reset-cells = <1>;
  1309. regmap = <&syscon0>;
  1310. offset = <1>;
  1311. mask = <0x27FFFFFF>;
  1312. assert-high = <0>;
  1313. };
  1314. syscon-reset-test {
  1315. compatible = "sandbox,misc_sandbox";
  1316. resets = <&resetc2 15>, <&resetc2 30>, <&resetc2 60>;
  1317. reset-names = "valid", "no_mask", "out_of_range";
  1318. };
  1319. sysinfo {
  1320. compatible = "sandbox,sysinfo-sandbox";
  1321. };
  1322. sysinfo-gpio {
  1323. compatible = "gpio-sysinfo";
  1324. gpios = <&gpio_a 15>, <&gpio_a 16>, <&gpio_a 17>;
  1325. revisions = <19>, <5>;
  1326. names = "rev_a", "foo";
  1327. };
  1328. some_regmapped-bus {
  1329. #address-cells = <0x1>;
  1330. #size-cells = <0x1>;
  1331. ranges = <0x0 0x0 0x10>;
  1332. compatible = "simple-bus";
  1333. regmap-test_0 {
  1334. reg = <0 0x10>;
  1335. compatible = "sandbox,regmap_test";
  1336. };
  1337. };
  1338. };
  1339. #include "sandbox_pmic.dtsi"
  1340. #include "cros-ec-keyboard.dtsi"