at91sam9_wdt.c 2.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * [origin: Linux kernel drivers/watchdog/at91sam9_wdt.c]
  4. *
  5. * Watchdog driver for AT91SAM9x processors.
  6. *
  7. * Copyright (C) 2008 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  8. * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
  9. */
  10. /*
  11. * The Watchdog Timer Mode Register can be only written to once. If the
  12. * timeout need to be set from U-Boot, be sure that the bootstrap doesn't
  13. * write to this register. Inform Linux to it too
  14. */
  15. #include <log.h>
  16. #include <asm/io.h>
  17. #include <asm/arch/at91_wdt.h>
  18. #include <common.h>
  19. #include <div64.h>
  20. #include <dm.h>
  21. #include <errno.h>
  22. #include <wdt.h>
  23. DECLARE_GLOBAL_DATA_PTR;
  24. /*
  25. * AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
  26. * use this to convert a watchdog
  27. * value from seconds.
  28. */
  29. #define WDT_SEC2TICKS(s) (((s) << 8) - 1)
  30. /*
  31. * Set the watchdog time interval in 1/256Hz (write-once)
  32. * Counter is 12 bit.
  33. */
  34. static int at91_wdt_start(struct udevice *dev, u64 timeout_ms, ulong flags)
  35. {
  36. struct at91_wdt_priv *priv = dev_get_priv(dev);
  37. u64 timeout;
  38. u32 ticks;
  39. /* Calculate timeout in seconds and the resulting ticks */
  40. timeout = timeout_ms;
  41. do_div(timeout, 1000);
  42. timeout = min_t(u64, timeout, WDT_MAX_TIMEOUT);
  43. ticks = WDT_SEC2TICKS(timeout);
  44. /* Check if disabled */
  45. if (readl(priv->regs + AT91_WDT_MR) & AT91_WDT_MR_WDDIS) {
  46. printf("sorry, watchdog is disabled\n");
  47. return -1;
  48. }
  49. /*
  50. * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
  51. *
  52. * Since WDV is a 12-bit counter, the maximum period is
  53. * 4096 / 256 = 16 seconds.
  54. */
  55. priv->regval = AT91_WDT_MR_WDRSTEN /* causes watchdog reset */
  56. | AT91_WDT_MR_WDDBGHLT /* disabled in debug mode */
  57. | AT91_WDT_MR_WDD(0xfff) /* restart at any time */
  58. | AT91_WDT_MR_WDV(ticks); /* timer value */
  59. writel(priv->regval, priv->regs + AT91_WDT_MR);
  60. return 0;
  61. }
  62. static int at91_wdt_stop(struct udevice *dev)
  63. {
  64. struct at91_wdt_priv *priv = dev_get_priv(dev);
  65. /* Disable Watchdog Timer */
  66. priv->regval |= AT91_WDT_MR_WDDIS;
  67. writel(priv->regval, priv->regs + AT91_WDT_MR);
  68. return 0;
  69. }
  70. static int at91_wdt_reset(struct udevice *dev)
  71. {
  72. struct at91_wdt_priv *priv = dev_get_priv(dev);
  73. writel(AT91_WDT_CR_WDRSTT | AT91_WDT_CR_KEY, priv->regs + AT91_WDT_CR);
  74. return 0;
  75. }
  76. static const struct wdt_ops at91_wdt_ops = {
  77. .start = at91_wdt_start,
  78. .stop = at91_wdt_stop,
  79. .reset = at91_wdt_reset,
  80. };
  81. static const struct udevice_id at91_wdt_ids[] = {
  82. { .compatible = "atmel,at91sam9260-wdt" },
  83. {}
  84. };
  85. static int at91_wdt_probe(struct udevice *dev)
  86. {
  87. struct at91_wdt_priv *priv = dev_get_priv(dev);
  88. priv->regs = dev_remap_addr(dev);
  89. if (!priv->regs)
  90. return -EINVAL;
  91. debug("%s: Probing wdt%u\n", __func__, dev_seq(dev));
  92. return 0;
  93. }
  94. U_BOOT_DRIVER(atmel_at91sam9260_wdt) = {
  95. .name = "atmel_at91sam9260_wdt",
  96. .id = UCLASS_WDT,
  97. .of_match = at91_wdt_ids,
  98. .priv_auto = sizeof(struct at91_wdt_priv),
  99. .ops = &at91_wdt_ops,
  100. .probe = at91_wdt_probe,
  101. };