pic32_flash.c 9.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015
  4. * Cristian Birsan <cristian.birsan@microchip.com>
  5. * Purna Chandra Mandal <purna.mandal@microchip.com>
  6. */
  7. #include <common.h>
  8. #include <cpu_func.h>
  9. #include <dm.h>
  10. #include <fdt_support.h>
  11. #include <flash.h>
  12. #include <init.h>
  13. #include <irq_func.h>
  14. #include <linux/bitops.h>
  15. #include <mach/pic32.h>
  16. #include <wait_bit.h>
  17. DECLARE_GLOBAL_DATA_PTR;
  18. /* NVM Controller registers */
  19. struct pic32_reg_nvm {
  20. struct pic32_reg_atomic ctrl;
  21. struct pic32_reg_atomic key;
  22. struct pic32_reg_atomic addr;
  23. struct pic32_reg_atomic data;
  24. };
  25. /* NVM operations */
  26. #define NVMOP_NOP 0
  27. #define NVMOP_WORD_WRITE 1
  28. #define NVMOP_PAGE_ERASE 4
  29. /* NVM control bits */
  30. #define NVM_WR BIT(15)
  31. #define NVM_WREN BIT(14)
  32. #define NVM_WRERR BIT(13)
  33. #define NVM_LVDERR BIT(12)
  34. /* NVM programming unlock register */
  35. #define LOCK_KEY 0x0
  36. #define UNLOCK_KEY1 0xaa996655
  37. #define UNLOCK_KEY2 0x556699aa
  38. /*
  39. * PIC32 flash banks consist of number of pages, each page
  40. * into number of rows and rows into number of words.
  41. * Here we will maintain page information instead of sector.
  42. */
  43. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  44. static struct pic32_reg_nvm *nvm_regs_p;
  45. static inline void flash_initiate_operation(u32 nvmop)
  46. {
  47. /* set operation */
  48. writel(nvmop, &nvm_regs_p->ctrl.raw);
  49. /* enable flash write */
  50. writel(NVM_WREN, &nvm_regs_p->ctrl.set);
  51. /* unlock sequence */
  52. writel(LOCK_KEY, &nvm_regs_p->key.raw);
  53. writel(UNLOCK_KEY1, &nvm_regs_p->key.raw);
  54. writel(UNLOCK_KEY2, &nvm_regs_p->key.raw);
  55. /* initiate operation */
  56. writel(NVM_WR, &nvm_regs_p->ctrl.set);
  57. }
  58. static int flash_wait_till_busy(const char *func, ulong timeout)
  59. {
  60. int ret = wait_for_bit_le32(&nvm_regs_p->ctrl.raw,
  61. NVM_WR, false, timeout, false);
  62. return ret ? ERR_TIMEOUT : ERR_OK;
  63. }
  64. static inline int flash_complete_operation(void)
  65. {
  66. u32 tmp;
  67. tmp = readl(&nvm_regs_p->ctrl.raw);
  68. if (tmp & NVM_WRERR) {
  69. printf("Error in Block Erase - Lock Bit may be set!\n");
  70. flash_initiate_operation(NVMOP_NOP);
  71. return ERR_PROTECTED;
  72. }
  73. if (tmp & NVM_LVDERR) {
  74. printf("Error in Block Erase - low-vol detected!\n");
  75. flash_initiate_operation(NVMOP_NOP);
  76. return ERR_NOT_ERASED;
  77. }
  78. /* disable flash write or erase operation */
  79. writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
  80. return ERR_OK;
  81. }
  82. /*
  83. * Erase flash sectors, returns:
  84. * ERR_OK - OK
  85. * ERR_INVAL - invalid sector arguments
  86. * ERR_TIMEOUT - write timeout
  87. * ERR_NOT_ERASED - Flash not erased
  88. * ERR_UNKNOWN_FLASH_VENDOR - incorrect flash
  89. */
  90. int flash_erase(flash_info_t *info, int s_first, int s_last)
  91. {
  92. ulong sect_start, sect_end, flags;
  93. int prot, sect;
  94. int rc;
  95. if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_MCHP) {
  96. printf("Can't erase unknown flash type %08lx - aborted\n",
  97. info->flash_id);
  98. return ERR_UNKNOWN_FLASH_VENDOR;
  99. }
  100. if ((s_first < 0) || (s_first > s_last)) {
  101. printf("- no sectors to erase\n");
  102. return ERR_INVAL;
  103. }
  104. prot = 0;
  105. for (sect = s_first; sect <= s_last; ++sect) {
  106. if (info->protect[sect])
  107. prot++;
  108. }
  109. if (prot)
  110. printf("- Warning: %d protected sectors will not be erased!\n",
  111. prot);
  112. else
  113. printf("\n");
  114. /* erase on unprotected sectors */
  115. for (sect = s_first; sect <= s_last; sect++) {
  116. if (info->protect[sect])
  117. continue;
  118. /* disable interrupts */
  119. flags = disable_interrupts();
  120. /* write destination page address (physical) */
  121. sect_start = CPHYSADDR(info->start[sect]);
  122. writel(sect_start, &nvm_regs_p->addr.raw);
  123. /* page erase */
  124. flash_initiate_operation(NVMOP_PAGE_ERASE);
  125. /* wait */
  126. rc = flash_wait_till_busy(__func__,
  127. CONFIG_SYS_FLASH_ERASE_TOUT);
  128. /* re-enable interrupts if necessary */
  129. if (flags)
  130. enable_interrupts();
  131. if (rc != ERR_OK)
  132. return rc;
  133. rc = flash_complete_operation();
  134. if (rc != ERR_OK)
  135. return rc;
  136. /*
  137. * flash content is updated but cache might contain stale
  138. * data, so invalidate dcache.
  139. */
  140. sect_end = info->start[sect] + info->size / info->sector_count;
  141. invalidate_dcache_range(info->start[sect], sect_end);
  142. }
  143. printf(" done\n");
  144. return ERR_OK;
  145. }
  146. int page_erase(flash_info_t *info, int sect)
  147. {
  148. return 0;
  149. }
  150. /* Write a word to flash */
  151. static int write_word(flash_info_t *info, ulong dest, ulong word)
  152. {
  153. ulong flags;
  154. int rc;
  155. /* read flash to check if it is sufficiently erased */
  156. if ((readl((void __iomem *)dest) & word) != word) {
  157. printf("Error, Flash not erased!\n");
  158. return ERR_NOT_ERASED;
  159. }
  160. /* disable interrupts */
  161. flags = disable_interrupts();
  162. /* update destination page address (physical) */
  163. writel(CPHYSADDR(dest), &nvm_regs_p->addr.raw);
  164. writel(word, &nvm_regs_p->data.raw);
  165. /* word write */
  166. flash_initiate_operation(NVMOP_WORD_WRITE);
  167. /* wait for operation to complete */
  168. rc = flash_wait_till_busy(__func__, CONFIG_SYS_FLASH_WRITE_TOUT);
  169. /* re-enable interrupts if necessary */
  170. if (flags)
  171. enable_interrupts();
  172. if (rc != ERR_OK)
  173. return rc;
  174. return flash_complete_operation();
  175. }
  176. /*
  177. * Copy memory to flash, returns:
  178. * ERR_OK - OK
  179. * ERR_TIMEOUT - write timeout
  180. * ERR_NOT_ERASED - Flash not erased
  181. */
  182. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  183. {
  184. ulong dst, tmp_le, len = cnt;
  185. int i, l, rc;
  186. uchar *cp;
  187. /* get lower word aligned address */
  188. dst = (addr & ~3);
  189. /* handle unaligned start bytes */
  190. l = addr - dst;
  191. if (l != 0) {
  192. tmp_le = 0;
  193. for (i = 0, cp = (uchar *)dst; i < l; ++i, ++cp)
  194. tmp_le |= *cp << (i * 8);
  195. for (; (i < 4) && (cnt > 0); ++i, ++src, --cnt, ++cp)
  196. tmp_le |= *src << (i * 8);
  197. for (; (cnt == 0) && (i < 4); ++i, ++cp)
  198. tmp_le |= *cp << (i * 8);
  199. rc = write_word(info, dst, tmp_le);
  200. if (rc)
  201. goto out;
  202. dst += 4;
  203. }
  204. /* handle word aligned part */
  205. while (cnt >= 4) {
  206. tmp_le = src[0] | src[1] << 8 | src[2] << 16 | src[3] << 24;
  207. rc = write_word(info, dst, tmp_le);
  208. if (rc)
  209. goto out;
  210. src += 4;
  211. dst += 4;
  212. cnt -= 4;
  213. }
  214. if (cnt == 0) {
  215. rc = ERR_OK;
  216. goto out;
  217. }
  218. /* handle unaligned tail bytes */
  219. tmp_le = 0;
  220. for (i = 0, cp = (uchar *)dst; (i < 4) && (cnt > 0); ++i, ++cp) {
  221. tmp_le |= *src++ << (i * 8);
  222. --cnt;
  223. }
  224. for (; i < 4; ++i, ++cp)
  225. tmp_le |= *cp << (i * 8);
  226. rc = write_word(info, dst, tmp_le);
  227. out:
  228. /*
  229. * flash content updated by nvm controller but CPU cache might
  230. * have stale data, so invalidate dcache.
  231. */
  232. invalidate_dcache_range(addr, addr + len);
  233. printf(" done\n");
  234. return rc;
  235. }
  236. void flash_print_info(flash_info_t *info)
  237. {
  238. int i;
  239. if (info->flash_id == FLASH_UNKNOWN) {
  240. printf("missing or unknown FLASH type\n");
  241. return;
  242. }
  243. switch (info->flash_id & FLASH_VENDMASK) {
  244. case FLASH_MAN_MCHP:
  245. printf("Microchip Technology ");
  246. break;
  247. default:
  248. printf("Unknown Vendor ");
  249. break;
  250. }
  251. switch (info->flash_id & FLASH_TYPEMASK) {
  252. case FLASH_MCHP100T:
  253. printf("Internal (8 Mbit, 64 x 16k)\n");
  254. break;
  255. default:
  256. printf("Unknown Chip Type\n");
  257. break;
  258. }
  259. printf(" Size: %ld MB in %d Sectors\n",
  260. info->size >> 20, info->sector_count);
  261. printf(" Sector Start Addresses:");
  262. for (i = 0; i < info->sector_count; ++i) {
  263. if ((i % 5) == 0)
  264. printf("\n ");
  265. printf(" %08lX%s", info->start[i],
  266. info->protect[i] ? " (RO)" : " ");
  267. }
  268. printf("\n");
  269. }
  270. unsigned long flash_init(void)
  271. {
  272. unsigned long size = 0;
  273. struct udevice *dev;
  274. int bank;
  275. /* probe every MTD device */
  276. for (uclass_first_device(UCLASS_MTD, &dev); dev;
  277. uclass_next_device(&dev)) {
  278. /* nop */
  279. }
  280. /* calc total flash size */
  281. for (bank = 0; bank < CONFIG_SYS_MAX_FLASH_BANKS; ++bank)
  282. size += flash_info[bank].size;
  283. return size;
  284. }
  285. static void pic32_flash_bank_init(flash_info_t *info,
  286. ulong base, ulong size)
  287. {
  288. ulong sect_size;
  289. int sect;
  290. /* device & manufacturer code */
  291. info->flash_id = FLASH_MAN_MCHP | FLASH_MCHP100T;
  292. info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  293. info->size = size;
  294. /* update sector (i.e page) info */
  295. sect_size = info->size / info->sector_count;
  296. for (sect = 0; sect < info->sector_count; sect++) {
  297. info->start[sect] = base;
  298. /* protect each sector by default */
  299. info->protect[sect] = 1;
  300. base += sect_size;
  301. }
  302. }
  303. static int pic32_flash_probe(struct udevice *dev)
  304. {
  305. void *blob = (void *)gd->fdt_blob;
  306. int node = dev_of_offset(dev);
  307. const char *list, *end;
  308. const fdt32_t *cell;
  309. unsigned long addr, size;
  310. int parent, addrc, sizec;
  311. flash_info_t *info;
  312. int len, idx;
  313. /*
  314. * decode regs. there are multiple reg tuples, and they need to
  315. * match with reg-names.
  316. */
  317. parent = fdt_parent_offset(blob, node);
  318. fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
  319. list = fdt_getprop(blob, node, "reg-names", &len);
  320. if (!list)
  321. return -ENOENT;
  322. end = list + len;
  323. cell = fdt_getprop(blob, node, "reg", &len);
  324. if (!cell)
  325. return -ENOENT;
  326. for (idx = 0, info = &flash_info[0]; list < end;) {
  327. addr = fdt_translate_address((void *)blob, node, cell + idx);
  328. size = fdt_addr_to_cpu(cell[idx + addrc]);
  329. len = strlen(list);
  330. if (!strncmp(list, "nvm", len)) {
  331. /* NVM controller */
  332. nvm_regs_p = ioremap(addr, size);
  333. } else if (!strncmp(list, "bank", 4)) {
  334. /* Flash bank: use kseg0 cached address */
  335. pic32_flash_bank_init(info, CKSEG0ADDR(addr), size);
  336. info++;
  337. }
  338. idx += addrc + sizec;
  339. list += len + 1;
  340. }
  341. /* disable flash write/erase operations */
  342. writel(NVM_WREN, &nvm_regs_p->ctrl.clr);
  343. #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
  344. /* monitor protection ON by default */
  345. flash_protect(FLAG_PROTECT_SET,
  346. CONFIG_SYS_MONITOR_BASE,
  347. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  348. &flash_info[0]);
  349. #endif
  350. #ifdef CONFIG_ENV_IS_IN_FLASH
  351. /* ENV protection ON by default */
  352. flash_protect(FLAG_PROTECT_SET,
  353. CONFIG_ENV_ADDR,
  354. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  355. &flash_info[0]);
  356. #endif
  357. return 0;
  358. }
  359. static const struct udevice_id pic32_flash_ids[] = {
  360. { .compatible = "microchip,pic32mzda-flash" },
  361. {}
  362. };
  363. U_BOOT_DRIVER(pic32_flash) = {
  364. .name = "pic32_flash",
  365. .id = UCLASS_MTD,
  366. .of_match = pic32_flash_ids,
  367. .probe = pic32_flash_probe,
  368. };