devkit8000.c 4.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2004-2008
  4. * Texas Instruments, <www.ti.com>
  5. *
  6. * Author :
  7. * Sunil Kumar <sunilsaini05@gmail.com>
  8. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  9. *
  10. * (C) Copyright 2009
  11. * Frederik Kriewitz <frederik@kriewitz.eu>
  12. *
  13. * Derived from Beagle Board and 3430 SDP code by
  14. * Richard Woodruff <r-woodruff2@ti.com>
  15. * Syed Mohammed Khasim <khasim@ti.com>
  16. *
  17. */
  18. #include <common.h>
  19. #include <dm.h>
  20. #include <env.h>
  21. #include <init.h>
  22. #include <malloc.h>
  23. #include <ns16550.h>
  24. #include <twl4030.h>
  25. #include <asm/io.h>
  26. #include <asm/arch/mmc_host_def.h>
  27. #include <asm/arch/mux.h>
  28. #include <asm/arch/sys_proto.h>
  29. #include <asm/arch/mem.h>
  30. #include <asm/mach-types.h>
  31. #include "devkit8000.h"
  32. #include <asm/gpio.h>
  33. #ifdef CONFIG_DRIVER_DM9000
  34. #include <net.h>
  35. #include <netdev.h>
  36. #endif
  37. DECLARE_GLOBAL_DATA_PTR;
  38. static u32 gpmc_net_config[GPMC_MAX_REG] = {
  39. NET_GPMC_CONFIG1,
  40. NET_GPMC_CONFIG2,
  41. NET_GPMC_CONFIG3,
  42. NET_GPMC_CONFIG4,
  43. NET_GPMC_CONFIG5,
  44. NET_GPMC_CONFIG6,
  45. 0
  46. };
  47. static const struct ns16550_plat devkit8000_serial = {
  48. .base = OMAP34XX_UART3,
  49. .reg_shift = 2,
  50. .clock = V_NS16550_CLK,
  51. .fcr = UART_FCR_DEFVAL,
  52. };
  53. U_BOOT_DEVICE(devkit8000_uart) = {
  54. "ns16550_serial",
  55. &devkit8000_serial
  56. };
  57. /*
  58. * Routine: board_init
  59. * Description: Early hardware init.
  60. */
  61. int board_init(void)
  62. {
  63. gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
  64. /* board id for Linux */
  65. gd->bd->bi_arch_number = MACH_TYPE_DEVKIT8000;
  66. /* boot param addr */
  67. gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
  68. return 0;
  69. }
  70. /* Configure GPMC registers for DM9000 */
  71. static void gpmc_dm9000_config(void)
  72. {
  73. enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
  74. CONFIG_DM9000_BASE, GPMC_SIZE_16M);
  75. }
  76. /*
  77. * Routine: misc_init_r
  78. * Description: Configure board specific parts
  79. */
  80. int misc_init_r(void)
  81. {
  82. struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
  83. #ifdef CONFIG_DRIVER_DM9000
  84. uchar enetaddr[6];
  85. u32 die_id_0;
  86. #endif
  87. twl4030_power_init();
  88. #ifdef CONFIG_TWL4030_LED
  89. twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
  90. #endif
  91. #ifdef CONFIG_DRIVER_DM9000
  92. /* Configure GPMC registers for DM9000 */
  93. enable_gpmc_cs_config(gpmc_net_config, &gpmc_cfg->cs[6],
  94. CONFIG_DM9000_BASE, GPMC_SIZE_16M);
  95. /* Use OMAP DIE_ID as MAC address */
  96. if (!eth_env_get_enetaddr("ethaddr", enetaddr)) {
  97. printf("ethaddr not set, using Die ID\n");
  98. die_id_0 = readl(&id_base->die_id_0);
  99. enetaddr[0] = 0x02; /* locally administered */
  100. enetaddr[1] = readl(&id_base->die_id_1) & 0xff;
  101. enetaddr[2] = (die_id_0 & 0xff000000) >> 24;
  102. enetaddr[3] = (die_id_0 & 0x00ff0000) >> 16;
  103. enetaddr[4] = (die_id_0 & 0x0000ff00) >> 8;
  104. enetaddr[5] = (die_id_0 & 0x000000ff);
  105. eth_env_set_enetaddr("ethaddr", enetaddr);
  106. }
  107. #endif
  108. omap_die_id_display();
  109. return 0;
  110. }
  111. /*
  112. * Routine: set_muxconf_regs
  113. * Description: Setting up the configuration Mux registers specific to the
  114. * hardware. Many pins need to be moved from protect to primary
  115. * mode.
  116. */
  117. void set_muxconf_regs(void)
  118. {
  119. MUX_DEVKIT8000();
  120. }
  121. #if defined(CONFIG_MMC)
  122. int board_mmc_init(struct bd_info *bis)
  123. {
  124. return omap_mmc_init(0, 0, 0, -1, -1);
  125. }
  126. #endif
  127. #if defined(CONFIG_MMC)
  128. void board_mmc_power_init(void)
  129. {
  130. twl4030_power_mmc_init(0);
  131. }
  132. #endif
  133. #if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
  134. /*
  135. * Routine: board_eth_init
  136. * Description: Setting up the Ethernet hardware.
  137. */
  138. int board_eth_init(struct bd_info *bis)
  139. {
  140. return dm9000_initialize(bis);
  141. }
  142. #endif
  143. #ifdef CONFIG_SPL_OS_BOOT
  144. /*
  145. * Do board specific preparation before SPL
  146. * Linux boot
  147. */
  148. void spl_board_prepare_for_linux(void)
  149. {
  150. gpmc_dm9000_config();
  151. }
  152. /*
  153. * devkit8000 specific implementation of spl_start_uboot()
  154. *
  155. * RETURN
  156. * 0 if the button is not pressed
  157. * 1 if the button is pressed
  158. */
  159. int spl_start_uboot(void)
  160. {
  161. int val = 0;
  162. if (!gpio_request(SPL_OS_BOOT_KEY, "U-Boot key")) {
  163. gpio_direction_input(SPL_OS_BOOT_KEY);
  164. val = gpio_get_value(SPL_OS_BOOT_KEY);
  165. gpio_free(SPL_OS_BOOT_KEY);
  166. }
  167. return !val;
  168. }
  169. #endif
  170. /*
  171. * Routine: get_board_mem_timings
  172. * Description: If we use SPL then there is no x-loader nor config header
  173. * so we have to setup the DDR timings ourself on the first bank. This
  174. * provides the timing values back to the function that configures
  175. * the memory. We have either one or two banks of 128MB DDR.
  176. */
  177. void get_board_mem_timings(struct board_sdrc_timings *timings)
  178. {
  179. /* General SDRC config */
  180. timings->mcfg = MICRON_V_MCFG_165(128 << 20);
  181. timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
  182. /* AC timings */
  183. timings->ctrla = MICRON_V_ACTIMA_165;
  184. timings->ctrlb = MICRON_V_ACTIMB_165;
  185. timings->mr = MICRON_V_MR_165;
  186. }