rx51.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012
  4. * Ивайло Димитров <freemangordon@abv.bg>
  5. *
  6. * (C) Copyright 2011-2012
  7. * Pali Rohár <pali@kernel.org>
  8. *
  9. * (C) Copyright 2010
  10. * Alistair Buxton <a.j.buxton@gmail.com>
  11. *
  12. * Derived from Beagle Board and 3430 SDP code:
  13. * (C) Copyright 2004-2008
  14. * Texas Instruments, <www.ti.com>
  15. *
  16. * Author :
  17. * Sunil Kumar <sunilsaini05@gmail.com>
  18. * Shashi Ranjan <shashiranjanmca05@gmail.com>
  19. *
  20. * Richard Woodruff <r-woodruff2@ti.com>
  21. * Syed Mohammed Khasim <khasim@ti.com>
  22. */
  23. #include <common.h>
  24. #include <dm.h>
  25. #include <env.h>
  26. #include <init.h>
  27. #include <watchdog.h>
  28. #include <malloc.h>
  29. #include <twl4030.h>
  30. #include <i2c.h>
  31. #include <video_fb.h>
  32. #include <asm/io.h>
  33. #include <asm/setup.h>
  34. #include <asm/bitops.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/omap_i2c.h>
  37. #include <asm/arch/mux.h>
  38. #include <asm/arch/sys_proto.h>
  39. #include <asm/arch/mmc_host_def.h>
  40. #include "rx51.h"
  41. #include "tag_omap.h"
  42. DECLARE_GLOBAL_DATA_PTR;
  43. GraphicDevice gdev;
  44. const omap3_sysinfo sysinfo = {
  45. DDR_STACKED,
  46. "Nokia RX-51",
  47. "OneNAND"
  48. };
  49. /* This structure contains default omap tags needed for booting Maemo 5 */
  50. static struct tag_omap omap[] = {
  51. OMAP_TAG_UART_CONFIG(0x04),
  52. OMAP_TAG_SERIAL_CONSOLE_CONFIG(0x03, 0x01C200),
  53. OMAP_TAG_LCD_CONFIG("acx565akm", "internal", 90, 0x18),
  54. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_focus", 0x44, 0x1, 0x2, 0x0),
  55. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_launch", 0x45, 0x1, 0x2, 0x0),
  56. OMAP_TAG_GPIO_SWITCH_CONFIG("cam_shutter", 0x6e, 0x1, 0x0, 0x0),
  57. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_apeslpx", 0x46, 0x2, 0x2, 0x0),
  58. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_bsi", 0x9d, 0x2, 0x2, 0x0),
  59. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_en", 0x4a, 0x2, 0x2, 0x0),
  60. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst", 0x4b, 0x6, 0x2, 0x0),
  61. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_rst_rq", 0x49, 0x6, 0x2, 0x0),
  62. OMAP_TAG_GPIO_SWITCH_CONFIG("cmt_wddis", 0x0d, 0x2, 0x2, 0x0),
  63. OMAP_TAG_GPIO_SWITCH_CONFIG("headphone", 0xb1, 0x1, 0x1, 0x0),
  64. OMAP_TAG_GPIO_SWITCH_CONFIG("kb_lock", 0x71, 0x1, 0x0, 0x0),
  65. OMAP_TAG_GPIO_SWITCH_CONFIG("proximity", 0x59, 0x0, 0x0, 0x0),
  66. OMAP_TAG_GPIO_SWITCH_CONFIG("sleep_ind", 0xa2, 0x2, 0x2, 0x0),
  67. OMAP_TAG_GPIO_SWITCH_CONFIG("slide", GPIO_SLIDE, 0x0, 0x0, 0x0),
  68. OMAP_TAG_WLAN_CX3110X_CONFIG(0x25, 0xff, 87, 42, -1),
  69. OMAP_TAG_PARTITION_CONFIG("bootloader", 128 * 1024, 0x00000000, 0x00000003),
  70. OMAP_TAG_PARTITION_CONFIG("config", 384 * 1024, 0x00020000, 0x00000000),
  71. OMAP_TAG_PARTITION_CONFIG("log", 256 * 1024, 0x00080000, 0x00000000),
  72. OMAP_TAG_PARTITION_CONFIG("kernel", 2 * 1024*1024, 0x000c0000, 0x00000000),
  73. OMAP_TAG_PARTITION_CONFIG("initfs", 2 * 1024*1024, 0x002c0000, 0x00000000),
  74. OMAP_TAG_PARTITION_CONFIG("rootfs", 257280 * 1024, 0x004c0000, 0x00000000),
  75. OMAP_TAG_BOOT_REASON_CONFIG("pwr_key"),
  76. OMAP_TAG_VERSION_STR_CONFIG("product", "RX-51"),
  77. OMAP_TAG_VERSION_STR_CONFIG("hw-build", "2101"),
  78. OMAP_TAG_VERSION_STR_CONFIG("nolo", "1.4.14"),
  79. OMAP_TAG_VERSION_STR_CONFIG("boot-mode", "normal"),
  80. { }
  81. };
  82. static char *boot_reason_ptr;
  83. static char *hw_build_ptr;
  84. static char *nolo_version_ptr;
  85. static char *boot_mode_ptr;
  86. static int serial_was_console_enabled;
  87. /*
  88. * Routine: init_omap_tags
  89. * Description: Initialize pointers to values in tag_omap
  90. */
  91. static void init_omap_tags(void)
  92. {
  93. char *component;
  94. char *version;
  95. int i = 0;
  96. while (omap[i].hdr.tag) {
  97. switch (omap[i].hdr.tag) {
  98. case OMAP_TAG_BOOT_REASON:
  99. boot_reason_ptr = omap[i].u.boot_reason.reason_str;
  100. break;
  101. case OMAP_TAG_VERSION_STR:
  102. component = omap[i].u.version.component;
  103. version = omap[i].u.version.version;
  104. if (strcmp(component, "hw-build") == 0)
  105. hw_build_ptr = version;
  106. else if (strcmp(component, "nolo") == 0)
  107. nolo_version_ptr = version;
  108. else if (strcmp(component, "boot-mode") == 0)
  109. boot_mode_ptr = version;
  110. break;
  111. default:
  112. break;
  113. }
  114. i++;
  115. }
  116. }
  117. static void reuse_omap_atags(struct tag_omap *t)
  118. {
  119. char *component;
  120. char *version;
  121. while (t->hdr.tag) {
  122. switch (t->hdr.tag) {
  123. case OMAP_TAG_BOOT_REASON:
  124. memset(boot_reason_ptr, 0, 12);
  125. strcpy(boot_reason_ptr, t->u.boot_reason.reason_str);
  126. break;
  127. case OMAP_TAG_VERSION_STR:
  128. component = t->u.version.component;
  129. version = t->u.version.version;
  130. if (strcmp(component, "hw-build") == 0) {
  131. memset(hw_build_ptr, 0, 12);
  132. strcpy(hw_build_ptr, version);
  133. } else if (strcmp(component, "nolo") == 0) {
  134. memset(nolo_version_ptr, 0, 12);
  135. strcpy(nolo_version_ptr, version);
  136. } else if (strcmp(component, "boot-mode") == 0) {
  137. memset(boot_mode_ptr, 0, 12);
  138. strcpy(boot_mode_ptr, version);
  139. }
  140. break;
  141. case OMAP_TAG_UART:
  142. if (t->u.uart.enabled_uarts)
  143. serial_was_console_enabled = 1;
  144. break;
  145. case OMAP_TAG_SERIAL_CONSOLE:
  146. serial_was_console_enabled = 1;
  147. break;
  148. default:
  149. break;
  150. }
  151. t = tag_omap_next(t);
  152. }
  153. }
  154. /*
  155. * Routine: reuse_atags
  156. * Description: Reuse atags from previous bootloader.
  157. * Reuse only only HW build, boot reason, boot mode and nolo
  158. */
  159. static void reuse_atags(void)
  160. {
  161. struct tag *t = (struct tag *)gd->bd->bi_boot_params;
  162. /* First tag must be ATAG_CORE */
  163. if (t->hdr.tag != ATAG_CORE)
  164. return;
  165. if (!boot_reason_ptr || !hw_build_ptr)
  166. return;
  167. /* Last tag must be ATAG_NONE */
  168. while (t->hdr.tag != ATAG_NONE) {
  169. switch (t->hdr.tag) {
  170. case ATAG_REVISION:
  171. memset(hw_build_ptr, 0, 12);
  172. sprintf(hw_build_ptr, "%x", t->u.revision.rev);
  173. break;
  174. case ATAG_BOARD:
  175. reuse_omap_atags((struct tag_omap *)&t->u);
  176. break;
  177. default:
  178. break;
  179. }
  180. t = tag_next(t);
  181. }
  182. }
  183. /*
  184. * Routine: board_init
  185. * Description: Early hardware init.
  186. */
  187. int board_init(void)
  188. {
  189. #if defined(CONFIG_CMD_ONENAND)
  190. const u32 gpmc_regs_onenandrx51[GPMC_MAX_REG] = {
  191. ONENAND_GPMC_CONFIG1_RX51,
  192. ONENAND_GPMC_CONFIG2_RX51,
  193. ONENAND_GPMC_CONFIG3_RX51,
  194. ONENAND_GPMC_CONFIG4_RX51,
  195. ONENAND_GPMC_CONFIG5_RX51,
  196. ONENAND_GPMC_CONFIG6_RX51,
  197. 0
  198. };
  199. #endif
  200. /* in SRAM or SDRAM, finish GPMC */
  201. gpmc_init();
  202. #if defined(CONFIG_CMD_ONENAND)
  203. enable_gpmc_cs_config(gpmc_regs_onenandrx51, &gpmc_cfg->cs[0],
  204. CONFIG_SYS_ONENAND_BASE, GPMC_SIZE_256M);
  205. #endif
  206. /* Enable the clks & power */
  207. per_clocks_enable();
  208. /* boot param addr */
  209. gd->bd->bi_boot_params = OMAP34XX_SDRC_CS0 + 0x100;
  210. return 0;
  211. }
  212. /*
  213. * Routine: get_board_revision
  214. * Description: Return board revision.
  215. */
  216. u32 get_board_rev(void)
  217. {
  218. return simple_strtol(hw_build_ptr, NULL, 16);
  219. }
  220. /*
  221. * Routine: setup_board_tags
  222. * Description: Append board specific boot tags.
  223. */
  224. void setup_board_tags(struct tag **in_params)
  225. {
  226. int setup_console_atag;
  227. char *setup_boot_reason_atag;
  228. char *setup_boot_mode_atag;
  229. char *str;
  230. int i;
  231. int size;
  232. int total_size;
  233. struct tag *params;
  234. struct tag_omap *t;
  235. params = (struct tag *)gd->bd->bi_boot_params;
  236. params->u.core.flags = 0x0;
  237. params->u.core.pagesize = 0x1000;
  238. params->u.core.rootdev = 0x0;
  239. /* append omap atag only if env setup_omap_atag is set to 1 */
  240. str = env_get("setup_omap_atag");
  241. if (!str || str[0] != '1')
  242. return;
  243. str = env_get("setup_console_atag");
  244. if (str && str[0]) {
  245. if (str[0] == '1')
  246. setup_console_atag = 1;
  247. else
  248. setup_console_atag = 0;
  249. } else {
  250. if (serial_was_console_enabled)
  251. setup_console_atag = 1;
  252. else
  253. setup_console_atag = 0;
  254. }
  255. setup_boot_reason_atag = env_get("setup_boot_reason_atag");
  256. setup_boot_mode_atag = env_get("setup_boot_mode_atag");
  257. params = *in_params;
  258. t = (struct tag_omap *)&params->u;
  259. total_size = sizeof(struct tag_header);
  260. for (i = 0; omap[i].hdr.tag; i++) {
  261. /* skip serial console tag */
  262. if (!setup_console_atag &&
  263. omap[i].hdr.tag == OMAP_TAG_SERIAL_CONSOLE)
  264. continue;
  265. size = omap[i].hdr.size + sizeof(struct tag_omap_header);
  266. memcpy(t, &omap[i], size);
  267. /* set uart tag to 0 - disable serial console */
  268. if (!setup_console_atag && omap[i].hdr.tag == OMAP_TAG_UART)
  269. t->u.uart.enabled_uarts = 0;
  270. /* change boot reason */
  271. if (setup_boot_reason_atag &&
  272. omap[i].hdr.tag == OMAP_TAG_BOOT_REASON) {
  273. memset(t->u.boot_reason.reason_str, 0, 12);
  274. strcpy(t->u.boot_reason.reason_str,
  275. setup_boot_reason_atag);
  276. }
  277. /* change boot mode */
  278. if (setup_boot_mode_atag &&
  279. omap[i].hdr.tag == OMAP_TAG_VERSION_STR &&
  280. strcmp(omap[i].u.version.component, "boot-mode") == 0) {
  281. memset(t->u.version.version, 0, 12);
  282. strcpy(t->u.version.version, setup_boot_mode_atag);
  283. }
  284. total_size += size;
  285. t = tag_omap_next(t);
  286. }
  287. params->hdr.tag = ATAG_BOARD;
  288. params->hdr.size = total_size >> 2;
  289. params = tag_next(params);
  290. *in_params = params;
  291. }
  292. /*
  293. * Routine: video_hw_init
  294. * Description: Set up the GraphicDevice depending on sys_boot.
  295. */
  296. void *video_hw_init(void)
  297. {
  298. /* fill in Graphic Device */
  299. gdev.frameAdrs = 0x8f9c0000;
  300. gdev.winSizeX = 800;
  301. gdev.winSizeY = 480;
  302. gdev.gdfBytesPP = 2;
  303. gdev.gdfIndex = GDF_16BIT_565RGB;
  304. memset((void *)gdev.frameAdrs, 0, 0xbb800);
  305. return (void *) &gdev;
  306. }
  307. /*
  308. * Routine: twl4030_regulator_set_mode
  309. * Description: Set twl4030 regulator mode over i2c powerbus.
  310. */
  311. static void twl4030_regulator_set_mode(u8 id, u8 mode)
  312. {
  313. u16 msg = MSG_SINGULAR(DEV_GRP_P1, id, mode);
  314. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  315. TWL4030_PM_MASTER_PB_WORD_MSB, msg >> 8);
  316. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER,
  317. TWL4030_PM_MASTER_PB_WORD_LSB, msg & 0xff);
  318. }
  319. static void omap3_emu_romcode_call(u32 service_id, u32 *parameters)
  320. {
  321. u32 i, num_params = *parameters;
  322. u32 *sram_scratch_space = (u32 *)OMAP3_PUBLIC_SRAM_SCRATCH_AREA;
  323. /*
  324. * copy the parameters to an un-cached area to avoid coherency
  325. * issues
  326. */
  327. for (i = 0; i < num_params; i++) {
  328. __raw_writel(*parameters, sram_scratch_space);
  329. parameters++;
  330. sram_scratch_space++;
  331. }
  332. /* Now make the PPA call */
  333. do_omap3_emu_romcode_call(service_id, OMAP3_PUBLIC_SRAM_SCRATCH_AREA);
  334. }
  335. void omap3_set_aux_cr_secure(u32 acr)
  336. {
  337. struct emu_hal_params_rx51 emu_romcode_params = { 0, };
  338. emu_romcode_params.num_params = 2;
  339. emu_romcode_params.param1 = acr;
  340. omap3_emu_romcode_call(OMAP3_EMU_HAL_API_WRITE_ACR,
  341. (u32 *)&emu_romcode_params);
  342. }
  343. /*
  344. * Routine: omap3_update_aux_cr_secure_rx51
  345. * Description: Modify the contents Auxiliary Control Register.
  346. * Parameters:
  347. * set_bits - bits to set in ACR
  348. * clr_bits - bits to clear in ACR
  349. */
  350. static void omap3_update_aux_cr_secure_rx51(u32 set_bits, u32 clear_bits)
  351. {
  352. u32 acr;
  353. /* Read ACR */
  354. asm volatile ("mrc p15, 0, %0, c1, c0, 1" : "=r" (acr));
  355. acr &= ~clear_bits;
  356. acr |= set_bits;
  357. omap3_set_aux_cr_secure(acr);
  358. }
  359. /*
  360. * Routine: misc_init_r
  361. * Description: Configure board specific parts.
  362. */
  363. int misc_init_r(void)
  364. {
  365. struct udevice *dev;
  366. char buf[12];
  367. u8 state;
  368. /* disable lp5523 led */
  369. if (i2c_get_chip_for_busnum(1, 0x32, 1, &dev) == 0)
  370. dm_i2c_reg_write(dev, 0x00, 0x00);
  371. /* initialize twl4030 power managment */
  372. twl4030_power_init();
  373. /* set VSIM to 1.8V */
  374. twl4030_pmrecv_vsel_cfg(TWL4030_PM_RECEIVER_VSIM_DEDICATED,
  375. TWL4030_PM_RECEIVER_VSIM_VSEL_18,
  376. TWL4030_PM_RECEIVER_VSIM_DEV_GRP,
  377. TWL4030_PM_RECEIVER_DEV_GRP_P1);
  378. /* store I2C access state */
  379. twl4030_i2c_read_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  380. &state);
  381. /* enable I2C access to powerbus (needed for twl4030 regulator) */
  382. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  383. 0x02);
  384. /* set VAUX3, VSIM and VMMC1 state to active - enable eMMC memory */
  385. twl4030_regulator_set_mode(RES_VAUX3, RES_STATE_ACTIVE);
  386. twl4030_regulator_set_mode(RES_VSIM, RES_STATE_ACTIVE);
  387. twl4030_regulator_set_mode(RES_VMMC1, RES_STATE_ACTIVE);
  388. /* restore I2C access state */
  389. twl4030_i2c_write_u8(TWL4030_CHIP_PM_MASTER, TWL4030_PM_MASTER_PB_CFG,
  390. state);
  391. /* set env variable attkernaddr for relocated kernel */
  392. sprintf(buf, "%#x", KERNEL_ADDRESS);
  393. env_set("attkernaddr", buf);
  394. /* initialize omap tags */
  395. init_omap_tags();
  396. /* reuse atags from previous bootloader */
  397. reuse_atags();
  398. omap_die_id_display();
  399. print_cpuinfo();
  400. /*
  401. * Cortex-A8(r1p0..r1p2) errata 430973 workaround
  402. * Set IBE bit in Auxiliary Control Register
  403. *
  404. * Call this routine only on real secure device
  405. * Qemu does not implement secure PPA and crash
  406. */
  407. if (get_device_type() == HS_DEVICE)
  408. omap3_update_aux_cr_secure_rx51(1 << 6, 0);
  409. return 0;
  410. }
  411. /*
  412. * Routine: set_muxconf_regs
  413. * Description: Setting up the configuration Mux registers specific to the
  414. * hardware. Many pins need to be moved from protect to primary
  415. * mode.
  416. */
  417. void set_muxconf_regs(void)
  418. {
  419. MUX_RX51();
  420. }
  421. static unsigned long int twl_wd_time; /* last time of watchdog reset */
  422. static unsigned long int twl_i2c_lock;
  423. /*
  424. * Routine: hw_watchdog_reset
  425. * Description: Reset timeout of twl4030 watchdog.
  426. */
  427. void hw_watchdog_reset(void)
  428. {
  429. u8 timeout = 0;
  430. /* do not reset watchdog too often - max every 4s */
  431. if (get_timer(twl_wd_time) < 4 * CONFIG_SYS_HZ)
  432. return;
  433. /* localy lock twl4030 i2c bus */
  434. if (test_and_set_bit(0, &twl_i2c_lock))
  435. return;
  436. /* read actual watchdog timeout */
  437. twl4030_i2c_read_u8(TWL4030_CHIP_PM_RECEIVER,
  438. TWL4030_PM_RECEIVER_WATCHDOG_CFG, &timeout);
  439. /* timeout 0 means watchdog is disabled */
  440. /* reset watchdog timeout to 31s (maximum) */
  441. if (timeout != 0)
  442. twl4030_i2c_write_u8(TWL4030_CHIP_PM_RECEIVER,
  443. TWL4030_PM_RECEIVER_WATCHDOG_CFG, 31);
  444. /* store last watchdog reset time */
  445. twl_wd_time = get_timer(0);
  446. /* localy unlock twl4030 i2c bus */
  447. test_and_clear_bit(0, &twl_i2c_lock);
  448. }
  449. /*
  450. * TWL4030 keypad handler for cfb_console
  451. */
  452. static const char keymap[] = {
  453. /* normal */
  454. 'q', 'o', 'p', ',', '\b', 0, 'a', 's',
  455. 'w', 'd', 'f', 'g', 'h', 'j', 'k', 'l',
  456. 'e', '.', 0, '\r', 0, 'z', 'x', 'c',
  457. 'r', 'v', 'b', 'n', 'm', ' ', ' ', 0,
  458. 't', 0, 0, 0, 0, 0, 0, 0,
  459. 'y', 0, 0, 0, 0, 0, 0, 0,
  460. 'u', 0, 0, 0, 0, 0, 0, 0,
  461. 'i', 5, 6, 0, 0, 0, 0, 0,
  462. /* fn */
  463. '1', '9', '0', '=', '\b', 0, '*', '+',
  464. '2', '#', '-', '_', '(', ')', '&', '!',
  465. '3', '?', '^', '\r', 0, 156, '$', 238,
  466. '4', '/', '\\', '"', '\'', '@', 0, '<',
  467. '5', '|', '>', 0, 0, 0, 0, 0,
  468. '6', 0, 0, 0, 0, 0, 0, 0,
  469. '7', 0, 0, 0, 0, 0, 0, 0,
  470. '8', 16, 17, 0, 0, 0, 0, 0,
  471. };
  472. static u8 keys[8];
  473. static u8 old_keys[8] = {0, 0, 0, 0, 0, 0, 0, 0};
  474. #define KEYBUF_SIZE 32
  475. static u8 keybuf[KEYBUF_SIZE];
  476. static u8 keybuf_head;
  477. static u8 keybuf_tail;
  478. /*
  479. * Routine: rx51_kp_init
  480. * Description: Initialize HW keyboard.
  481. */
  482. int rx51_kp_init(void)
  483. {
  484. int ret = 0;
  485. u8 ctrl;
  486. ret = twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  487. TWL4030_KEYPAD_KEYP_CTRL_REG, &ctrl);
  488. if (ret)
  489. return ret;
  490. /* turn on keyboard and use hardware scanning */
  491. ctrl |= TWL4030_KEYPAD_CTRL_KBD_ON;
  492. ctrl |= TWL4030_KEYPAD_CTRL_SOFT_NRST;
  493. ctrl |= TWL4030_KEYPAD_CTRL_SOFTMODEN;
  494. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  495. TWL4030_KEYPAD_KEYP_CTRL_REG, ctrl);
  496. /* enable key event status */
  497. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  498. TWL4030_KEYPAD_KEYP_IMR1, 0xfe);
  499. /* enable interrupt generation on rising and falling */
  500. /* this is a workaround for qemu twl4030 emulation */
  501. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  502. TWL4030_KEYPAD_KEYP_EDR, 0x57);
  503. /* enable ISR clear on read */
  504. ret |= twl4030_i2c_write_u8(TWL4030_CHIP_KEYPAD,
  505. TWL4030_KEYPAD_KEYP_SIH_CTRL, 0x05);
  506. return 0;
  507. }
  508. static void rx51_kp_fill(u8 k, u8 mods)
  509. {
  510. /* check if some cursor key without meta fn key was pressed */
  511. if (!(mods & 2) && (k == 18 || k == 31 || k == 33 || k == 34)) {
  512. keybuf[keybuf_tail++] = '\e';
  513. keybuf_tail %= KEYBUF_SIZE;
  514. keybuf[keybuf_tail++] = '[';
  515. keybuf_tail %= KEYBUF_SIZE;
  516. if (k == 18) /* up */
  517. keybuf[keybuf_tail++] = 'A';
  518. else if (k == 31) /* left */
  519. keybuf[keybuf_tail++] = 'D';
  520. else if (k == 33) /* down */
  521. keybuf[keybuf_tail++] = 'B';
  522. else if (k == 34) /* right */
  523. keybuf[keybuf_tail++] = 'C';
  524. keybuf_tail %= KEYBUF_SIZE;
  525. return;
  526. }
  527. if (mods & 2) { /* fn meta key was pressed */
  528. k = keymap[k+64];
  529. } else {
  530. k = keymap[k];
  531. if (mods & 1) { /* ctrl key was pressed */
  532. if (k >= 'a' && k <= 'z')
  533. k -= 'a' - 1;
  534. }
  535. if (mods & 4) { /* shift key was pressed */
  536. if (k >= 'a' && k <= 'z')
  537. k += 'A' - 'a';
  538. else if (k == '.')
  539. k = ':';
  540. else if (k == ',')
  541. k = ';';
  542. }
  543. }
  544. keybuf[keybuf_tail++] = k;
  545. keybuf_tail %= KEYBUF_SIZE;
  546. }
  547. /*
  548. * Routine: rx51_kp_tstc
  549. * Description: Test if key was pressed (from buffer).
  550. */
  551. int rx51_kp_tstc(struct stdio_dev *sdev)
  552. {
  553. u8 c, r, dk, i;
  554. u8 intr;
  555. u8 mods;
  556. /* localy lock twl4030 i2c bus */
  557. if (test_and_set_bit(0, &twl_i2c_lock))
  558. return 0;
  559. /* twl4030 remembers up to 2 events */
  560. for (i = 0; i < 2; i++) {
  561. /* check interrupt register for events */
  562. twl4030_i2c_read_u8(TWL4030_CHIP_KEYPAD,
  563. TWL4030_KEYPAD_KEYP_ISR1 + (2 * i), &intr);
  564. /* no event */
  565. if (!(intr&1))
  566. continue;
  567. /* read the key state */
  568. twl4030_i2c_read(TWL4030_CHIP_KEYPAD,
  569. TWL4030_KEYPAD_FULL_CODE_7_0, keys, 8);
  570. /* cut out modifier keys from the keystate */
  571. mods = keys[4] >> 4;
  572. keys[4] &= 0x0f;
  573. for (c = 0; c < 8; c++) {
  574. /* get newly pressed keys only */
  575. dk = ((keys[c] ^ old_keys[c])&keys[c]);
  576. old_keys[c] = keys[c];
  577. /* fill the keybuf */
  578. for (r = 0; r < 8; r++) {
  579. if (dk&1)
  580. rx51_kp_fill((c*8)+r, mods);
  581. dk = dk >> 1;
  582. }
  583. }
  584. }
  585. /* localy unlock twl4030 i2c bus */
  586. test_and_clear_bit(0, &twl_i2c_lock);
  587. return (KEYBUF_SIZE + keybuf_tail - keybuf_head)%KEYBUF_SIZE;
  588. }
  589. /*
  590. * Routine: rx51_kp_getc
  591. * Description: Get last pressed key (from buffer).
  592. */
  593. int rx51_kp_getc(struct stdio_dev *sdev)
  594. {
  595. keybuf_head %= KEYBUF_SIZE;
  596. while (!rx51_kp_tstc(sdev))
  597. WATCHDOG_RESET();
  598. return keybuf[keybuf_head++];
  599. }
  600. /*
  601. * Routine: board_mmc_init
  602. * Description: Initialize mmc devices.
  603. */
  604. int board_mmc_init(struct bd_info *bis)
  605. {
  606. omap_mmc_init(0, 0, 0, -1, -1);
  607. omap_mmc_init(1, 0, 0, -1, -1);
  608. return 0;
  609. }
  610. void board_mmc_power_init(void)
  611. {
  612. twl4030_power_mmc_init(0);
  613. twl4030_power_mmc_init(1);
  614. }
  615. static const struct omap_i2c_plat rx51_i2c[] = {
  616. { I2C_BASE1, 2200000, OMAP_I2C_REV_V1 },
  617. { I2C_BASE2, 100000, OMAP_I2C_REV_V1 },
  618. { I2C_BASE3, 400000, OMAP_I2C_REV_V1 },
  619. };
  620. U_BOOT_DEVICES(rx51_i2c) = {
  621. { "i2c_omap", &rx51_i2c[0] },
  622. { "i2c_omap", &rx51_i2c[1] },
  623. { "i2c_omap", &rx51_i2c[2] },
  624. };