gpio.h 1.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2012 Vikram Narayananan
  4. * <vikram186@gmail.com>
  5. * (C) Copyright 2012,2015 Stephen Warren
  6. */
  7. #ifndef _BCM2835_GPIO_H_
  8. #define _BCM2835_GPIO_H_
  9. #define BCM2835_GPIO_COUNT 54
  10. #define BCM2835_GPIO_FSEL_MASK 0x7
  11. #define BCM2835_GPIO_INPUT 0x0
  12. #define BCM2835_GPIO_OUTPUT 0x1
  13. #define BCM2835_GPIO_ALT0 0x4
  14. #define BCM2835_GPIO_ALT1 0x5
  15. #define BCM2835_GPIO_ALT2 0x6
  16. #define BCM2835_GPIO_ALT3 0x7
  17. #define BCM2835_GPIO_ALT4 0x3
  18. #define BCM2835_GPIO_ALT5 0x2
  19. #define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1)
  20. #define BCM2835_GPIO_COMMON_SHIFT(gpio) (gpio & 0x1f)
  21. #define BCM2835_GPIO_FSEL_BANK(gpio) (gpio / 10)
  22. #define BCM2835_GPIO_FSEL_SHIFT(gpio) ((gpio % 10) * 3)
  23. struct bcm2835_gpio_regs {
  24. u32 gpfsel[6];
  25. u32 reserved1;
  26. u32 gpset[2];
  27. u32 reserved2;
  28. u32 gpclr[2];
  29. u32 reserved3;
  30. u32 gplev[2];
  31. u32 reserved4;
  32. u32 gpeds[2];
  33. u32 reserved5;
  34. u32 gpren[2];
  35. u32 reserved6;
  36. u32 gpfen[2];
  37. u32 reserved7;
  38. u32 gphen[2];
  39. u32 reserved8;
  40. u32 gplen[2];
  41. u32 reserved9;
  42. u32 gparen[2];
  43. u32 reserved10;
  44. u32 gppud;
  45. u32 gppudclk[2];
  46. };
  47. /**
  48. * struct bcm2835_gpio_plat - GPIO platform description
  49. *
  50. * @base: Base address of GPIO controller
  51. */
  52. struct bcm2835_gpio_plat {
  53. unsigned long base;
  54. };
  55. #endif /* _BCM2835_GPIO_H_ */