starfive-jh7110-vout.h 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 OR MIT */
  2. /*
  3. * Copyright 2022 StarFive, Inc <xingyu.wu@starfivetech.com>
  4. */
  5. #ifndef __DT_BINDINGS_CLOCK_STARFIVE_JH7110_VOUT_H__
  6. #define __DT_BINDINGS_CLOCK_STARFIVE_JH7110_VOUT_H__
  7. /* regisger */
  8. #define JH7110_APB 0
  9. #define JH7110_DC8200_PIX0 1
  10. #define JH7110_DSI_SYS 2
  11. #define JH7110_TX_ESC 3
  12. #define JH7110_U0_DC8200_CLK_AXI 4
  13. #define JH7110_U0_DC8200_CLK_CORE 5
  14. #define JH7110_U0_DC8200_CLK_AHB 6
  15. #define JH7110_U0_DC8200_CLK_PIX0 7
  16. #define JH7110_U0_DC8200_CLK_PIX1 8
  17. #define JH7110_DOM_VOUT_TOP_LCD_CLK 9
  18. #define JH7110_U0_CDNS_DSITX_CLK_APB 10
  19. #define JH7110_U0_CDNS_DSITX_CLK_SYS 11
  20. #define JH7110_U0_CDNS_DSITX_CLK_DPI 12
  21. #define JH7110_U0_CDNS_DSITX_CLK_TXESC 13
  22. #define JH7110_U0_MIPITX_DPHY_CLK_TXESC 14
  23. #define JH7110_U0_HDMI_TX_CLK_MCLK 15
  24. #define JH7110_U0_HDMI_TX_CLK_BCLK 16
  25. #define JH7110_U0_HDMI_TX_CLK_SYS 17
  26. #define JH7110_CLK_VOUT_REG_END 18
  27. /* other */
  28. #define JH7110_DISP_ROOT 18
  29. #define JH7110_DISP_AXI 19
  30. #define JH7110_DISP_AHB 20
  31. #define JH7110_HDMI_PHY_REF 21
  32. #define JH7110_HDMITX0_MCLK 22
  33. #define JH7110_HDMITX0_SCK 23
  34. #define JH7110_MIPI_DPHY_REF 24
  35. #define JH7110_U0_PCLK_MUX_BIST_PCLK 25
  36. #define JH7110_DISP_APB 26
  37. #define JH7110_U0_PCLK_MUX_FUNC_PCLK 27
  38. #define JH7110_U0_DOM_VOUT_CRG_PCLK 28
  39. #define JH7110_U0_DOM_VOUT_SYSCON_PCLK 29
  40. #define JH7110_U0_SAIF_AMBA_DOM_VOUT_AHB_DEC_CLK_AHB 30
  41. #define JH7110_U0_AHB2APB_CLK_AHB 31
  42. #define JH7110_U0_P2P_ASYNC_CLK_APBS 32
  43. #define JH7110_U0_CDNS_DSITX_CLK_RXESC 33
  44. #define JH7110_U0_CDNS_DSITX_CLK_TXBYTEHS 34
  45. #define JH7110_U0_MIPITX_DPHY_CLK_SYS 35
  46. #define JH7110_U0_MIPITX_DPHY_CLK_DPHY_REF 36
  47. #define JH7110_U0_MIPITX_APBIF_PCLK 37
  48. #define JH7110_HDMI_TX_CLK_REF 38
  49. #define JH7110_U0_DC8200_CLK_PIX0_OUT 39
  50. #define JH7110_U0_DC8200_CLK_PIX1_OUT 40
  51. #define JH7110_CLK_VOUT_END 41
  52. /* external clocks */
  53. #define JH7110_HDMITX0_PIXELCLK (JH7110_CLK_VOUT_END + 0)
  54. #define JH7110_MIPITX_DPHY_RXESC (JH7110_CLK_VOUT_END + 1)
  55. #define JH7110_MIPITX_DPHY_TXBYTEHS (JH7110_CLK_VOUT_END + 2)
  56. #endif /* __DT_BINDINGS_CLOCK_STARFIVE_JH7110_H__ */