walnut.h 12 KB

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  1. /*
  2. * (C) Copyright 2000-2005
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * board/config.h - configuration options, board specific
  25. */
  26. #ifndef __CONFIG_H
  27. #define __CONFIG_H
  28. /*
  29. * High Level Configuration Options
  30. * (easy to change)
  31. */
  32. #define CONFIG_405GP 1 /* This is a PPC405 CPU */
  33. #define CONFIG_4xx 1 /* ...member of PPC4xx family */
  34. #define CONFIG_WALNUT 1 /* ...on a WALNUT board */
  35. /* ...and on a SYCAMORE board */
  36. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  37. #define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
  38. #define CONFIG_PREBOOT "echo;" \
  39. "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
  40. "echo"
  41. #undef CONFIG_BOOTARGS
  42. #define CONFIG_EXTRA_ENV_SETTINGS \
  43. "netdev=eth0\0" \
  44. "hostname=walnut\0" \
  45. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  46. "nfsroot=$(serverip):$(rootpath)\0" \
  47. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  48. "addip=setenv bootargs $(bootargs) " \
  49. "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
  50. ":$(hostname):$(netdev):off panic=1\0" \
  51. "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
  52. "flash_nfs=run nfsargs addip addtty;" \
  53. "bootm $(kernel_addr)\0" \
  54. "flash_self=run ramargs addip addtty;" \
  55. "bootm $(kernel_addr) $(ramdisk_addr)\0" \
  56. "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
  57. "bootm\0" \
  58. "rootpath=/opt/eldk/ppc_4xx\0" \
  59. "bootfile=/tftpboot/walnut/uImage\0" \
  60. "kernel_addr=fff80000\0" \
  61. "ramdisk_addr=fff80000\0" \
  62. "load=tftp 100000 /tftpboot/walnut/u-boot.bin\0" \
  63. "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
  64. "cp.b 100000 fffc0000 40000;" \
  65. "setenv filesize;saveenv\0" \
  66. "upd=run load;run update\0" \
  67. ""
  68. #define CONFIG_BOOTCOMMAND "run net_nfs"
  69. #if 0
  70. #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
  71. #else
  72. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  73. #endif
  74. #define CONFIG_BAUDRATE 115200
  75. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  76. #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  77. #define CONFIG_MII 1 /* MII PHY management */
  78. #define CONFIG_PHY_ADDR 1 /* PHY address */
  79. #define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */
  80. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
  81. CFG_CMD_ASKENV | \
  82. CFG_CMD_DATE | \
  83. CFG_CMD_DHCP | \
  84. CFG_CMD_DIAG | \
  85. CFG_CMD_ELF | \
  86. CFG_CMD_I2C | \
  87. CFG_CMD_IRQ | \
  88. CFG_CMD_MII | \
  89. CFG_CMD_NET | \
  90. CFG_CMD_NFS | \
  91. CFG_CMD_PCI | \
  92. CFG_CMD_PING | \
  93. CFG_CMD_REGINFO | \
  94. CFG_CMD_SDRAM | \
  95. CFG_CMD_SNTP )
  96. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  97. #include <cmd_confdefs.h>
  98. #undef CONFIG_WATCHDOG /* watchdog disabled */
  99. #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
  100. /*
  101. * Miscellaneous configurable options
  102. */
  103. #define CFG_LONGHELP /* undef to save memory */
  104. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  105. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  106. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  107. #else
  108. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  109. #endif
  110. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  111. #define CFG_MAXARGS 16 /* max number of command args */
  112. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  113. #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
  114. #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
  115. /*
  116. * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
  117. * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
  118. * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
  119. * The Linux BASE_BAUD define should match this configuration.
  120. * baseBaud = cpuClock/(uartDivisor*16)
  121. * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
  122. * set Linux BASE_BAUD to 403200.
  123. */
  124. #undef CONFIG_SERIAL_SOFTWARE_FIFO
  125. #undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
  126. #undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
  127. #define CFG_BASE_BAUD 691200
  128. /* The following table includes the supported baudrates */
  129. #define CFG_BAUDRATE_TABLE \
  130. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  131. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  132. #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  133. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  134. #define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
  135. #define CONFIG_LOOPW 1 /* enable loopw command */
  136. #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
  137. #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
  138. #define CFG_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */
  139. /*-----------------------------------------------------------------------
  140. * I2C stuff
  141. *-----------------------------------------------------------------------
  142. */
  143. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  144. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  145. #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
  146. #define CFG_I2C_SLAVE 0x7F
  147. /*-----------------------------------------------------------------------
  148. * PCI stuff
  149. *-----------------------------------------------------------------------
  150. */
  151. #define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
  152. #define PCI_HOST_FORCE 1 /* configure as pci host */
  153. #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
  154. #define CONFIG_PCI /* include pci support */
  155. #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
  156. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  157. /* resource configuration */
  158. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  159. #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
  160. #define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  161. #define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
  162. #define CFG_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
  163. #define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
  164. #define CFG_PCI_PTM2LA 0x00000000 /* disabled */
  165. #define CFG_PCI_PTM2MS 0x00000000 /* disabled */
  166. #define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
  167. /*-----------------------------------------------------------------------
  168. * Start addresses for the final memory configuration
  169. * (Set up by the startup code)
  170. * Please note that CFG_SDRAM_BASE _must_ start at 0
  171. */
  172. #define CFG_SDRAM_BASE 0x00000000
  173. #define CFG_FLASH_BASE 0xFFF80000
  174. #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
  175. #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
  176. #define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
  177. /*
  178. * Define here the location of the environment variables (FLASH or NVRAM).
  179. * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
  180. * supported for backward compatibility.
  181. */
  182. #if 1
  183. #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  184. #else
  185. #define CFG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
  186. #endif
  187. /*
  188. * For booting Linux, the board info and command line data
  189. * have to be in the first 8 MB of memory, since this is
  190. * the maximum mapped by the Linux kernel during initialization.
  191. */
  192. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  193. /*-----------------------------------------------------------------------
  194. * FLASH organization
  195. */
  196. #define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
  197. #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
  198. #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
  199. #define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
  200. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  201. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  202. #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  203. #define CFG_FLASH_ADDR0 0x5555
  204. #define CFG_FLASH_ADDR1 0x2aaa
  205. #define CFG_FLASH_WORD_SIZE unsigned char
  206. #ifdef CFG_ENV_IS_IN_FLASH
  207. #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
  208. #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
  209. #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
  210. /* Address and size of Redundant Environment Sector */
  211. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
  212. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  213. #endif /* CFG_ENV_IS_IN_FLASH */
  214. /*-----------------------------------------------------------------------
  215. * NVRAM organization
  216. */
  217. #define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
  218. #define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
  219. #ifdef CFG_ENV_IS_IN_NVRAM
  220. #define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
  221. #define CFG_ENV_ADDR \
  222. (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env */
  223. #endif
  224. /*-----------------------------------------------------------------------
  225. * Cache Configuration
  226. */
  227. #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */
  228. /* have only 8kB, 16kB is save here */
  229. #define CFG_CACHELINE_SIZE 32 /* ... */
  230. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  231. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  232. #endif
  233. /*-----------------------------------------------------------------------
  234. * External Bus Controller (EBC) Setup
  235. */
  236. /* Memory Bank 0 (Flash Bank 0) initialization */
  237. #define CFG_EBC_PB0AP 0x9B015480
  238. #define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
  239. #define CFG_EBC_PB1AP 0x02815480
  240. #define CFG_EBC_PB1CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */
  241. #define CFG_EBC_PB2AP 0x04815A80
  242. #define CFG_EBC_PB2CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */
  243. #define CFG_EBC_PB3AP 0x01815280
  244. #define CFG_EBC_PB3CR 0xF0218000 /* BAS=0xF02,BS=1MB,BU=R/W,BW=8bit */
  245. #define CFG_EBC_PB7AP 0x01815280
  246. #define CFG_EBC_PB7CR 0xF0318000 /* BAS=0xF03,BS=1MB,BU=R/W,BW=8bit */
  247. /*-----------------------------------------------------------------------
  248. * External peripheral base address
  249. *-----------------------------------------------------------------------
  250. */
  251. #define CFG_KEY_REG_BASE_ADDR 0xF0100000
  252. #define CFG_IR_REG_BASE_ADDR 0xF0200000
  253. #define CFG_FPGA_REG_BASE_ADDR 0xF0300000
  254. /*-----------------------------------------------------------------------
  255. * Definitions for initial stack pointer and data area
  256. */
  257. #define CFG_INIT_DCACHE_CS 4 /* use cs # 4 for data cache memory */
  258. #define CFG_INIT_RAM_ADDR 0x40000000 /* inside of SDRAM */
  259. #define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
  260. #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
  261. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  262. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  263. /*-----------------------------------------------------------------------
  264. * Definitions for Serial Presence Detect EEPROM address
  265. * (to get SDRAM settings)
  266. */
  267. #define SPD_EEPROM_ADDRESS 0x50
  268. /*
  269. * Internal Definitions
  270. *
  271. * Boot Flags
  272. */
  273. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  274. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  275. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  276. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  277. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  278. #endif
  279. #endif /* __CONFIG_H */