ebony.h 11 KB

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  1. /*
  2. * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20. * MA 02111-1307 USA
  21. */
  22. /************************************************************************
  23. * board/config_EBONY.h - configuration for IBM 440GP Ref (Ebony)
  24. ***********************************************************************/
  25. #ifndef __CONFIG_H
  26. #define __CONFIG_H
  27. /*-----------------------------------------------------------------------
  28. * High Level Configuration Options
  29. *----------------------------------------------------------------------*/
  30. #define CONFIG_EBONY 1 /* Board is ebony */
  31. #define CONFIG_4xx 1 /* ... PPC4xx family */
  32. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  33. #undef CFG_DRAM_TEST /* Disable-takes long time! */
  34. #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
  35. /*
  36. * Define here the location of the environment variables (FLASH or NVRAM).
  37. * Note: DENX encourages to use redundant environment in FLASH. NVRAM is only
  38. * supported for backward compatibility.
  39. */
  40. #if 1
  41. #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  42. #else
  43. #define CFG_ENV_IS_IN_NVRAM 1 /* use NVRAM for environment vars */
  44. #endif
  45. /*-----------------------------------------------------------------------
  46. * Base addresses -- Note these are effective addresses where the
  47. * actual resources get mapped (not physical addresses)
  48. *----------------------------------------------------------------------*/
  49. #define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
  50. #define CFG_FLASH_BASE 0xff800000 /* start of FLASH */
  51. #define CFG_MONITOR_BASE 0xfffc0000 /* start of monitor */
  52. #define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
  53. #define CFG_PERIPHERAL_BASE 0xe0000000 /* internal peripherals */
  54. #define CFG_ISRAM_BASE 0xc0000000 /* internal SRAM */
  55. #define CFG_PCI_BASE 0xd0000000 /* internal PCI regs */
  56. #define CFG_NVRAM_BASE_ADDR (CFG_PERIPHERAL_BASE + 0x08000000)
  57. #define CFG_FPGA_BASE (CFG_PERIPHERAL_BASE + 0x08300000)
  58. /*-----------------------------------------------------------------------
  59. * Initial RAM & stack pointer (placed in internal SRAM)
  60. *----------------------------------------------------------------------*/
  61. #define CFG_INIT_RAM_ADDR CFG_ISRAM_BASE /* Initial RAM address */
  62. #define CFG_INIT_RAM_END 0x2000 /* End of used area in RAM */
  63. #define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
  64. #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
  65. #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
  66. #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
  67. #define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
  68. /*-----------------------------------------------------------------------
  69. * Serial Port
  70. *----------------------------------------------------------------------*/
  71. #undef CONFIG_SERIAL_SOFTWARE_FIFO
  72. #define CFG_EXT_SERIAL_CLOCK (1843200 * 6) /* Ext clk @ 11.059 MHz */
  73. #define CONFIG_BAUDRATE 115200
  74. #define CFG_BAUDRATE_TABLE \
  75. {300, 600, 1200, 2400, 4800, 9600, 19200, 38400}
  76. /*-----------------------------------------------------------------------
  77. * NVRAM/RTC
  78. *
  79. * NOTE: Upper 8 bytes of NVRAM is where the RTC registers are located.
  80. * The DS1743 code assumes this condition (i.e. -- it assumes the base
  81. * address for the RTC registers is:
  82. *
  83. * CFG_NVRAM_BASE_ADDR + CFG_NVRAM_SIZE
  84. *
  85. *----------------------------------------------------------------------*/
  86. #define CFG_NVRAM_SIZE (0x2000 - 8) /* NVRAM size(8k)- RTC regs */
  87. #define CONFIG_RTC_DS174x 1 /* DS1743 RTC */
  88. #ifdef CFG_ENV_IS_IN_NVRAM
  89. #define CFG_ENV_SIZE 0x1000 /* Size of Environment vars */
  90. #define CFG_ENV_ADDR \
  91. (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE)
  92. #endif /* CFG_ENV_IS_IN_NVRAM */
  93. /*-----------------------------------------------------------------------
  94. * FLASH related
  95. *----------------------------------------------------------------------*/
  96. #define CFG_MAX_FLASH_BANKS 3 /* number of banks */
  97. #define CFG_MAX_FLASH_SECT 32 /* sectors per device */
  98. #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  99. #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  100. #define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  101. #define CFG_FLASH_ADDR0 0x5555
  102. #define CFG_FLASH_ADDR1 0x2aaa
  103. #define CFG_FLASH_WORD_SIZE unsigned char
  104. #ifdef CFG_ENV_IS_IN_FLASH
  105. #define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
  106. #define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
  107. #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
  108. /* Address and size of Redundant Environment Sector */
  109. #define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
  110. #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
  111. #endif /* CFG_ENV_IS_IN_FLASH */
  112. /*-----------------------------------------------------------------------
  113. * DDR SDRAM
  114. *----------------------------------------------------------------------*/
  115. #define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
  116. #define SPD_EEPROM_ADDRESS {0x53,0x52} /* SPD i2c spd addresses */
  117. /*-----------------------------------------------------------------------
  118. * I2C
  119. *----------------------------------------------------------------------*/
  120. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  121. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  122. #define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
  123. #define CFG_I2C_SLAVE 0x7F
  124. #define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
  125. #define CONFIG_PREBOOT "echo;" \
  126. "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
  127. "echo"
  128. #undef CONFIG_BOOTARGS
  129. #define CONFIG_EXTRA_ENV_SETTINGS \
  130. "netdev=eth0\0" \
  131. "hostname=ebony\0" \
  132. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  133. "nfsroot=$(serverip):$(rootpath)\0" \
  134. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  135. "addip=setenv bootargs $(bootargs) " \
  136. "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \
  137. ":$(hostname):$(netdev):off panic=1\0" \
  138. "addtty=setenv bootargs $(bootargs) console=ttyS0,$(baudrate)\0"\
  139. "flash_nfs=run nfsargs addip addtty;" \
  140. "bootm $(kernel_addr)\0" \
  141. "flash_self=run ramargs addip addtty;" \
  142. "bootm $(kernel_addr) $(ramdisk_addr)\0" \
  143. "net_nfs=tftp 200000 $(bootfile);run nfsargs addip addtty;" \
  144. "bootm\0" \
  145. "rootpath=/opt/eldk/ppc_4xx\0" \
  146. "bootfile=/tftpboot/ebony/uImage\0" \
  147. "kernel_addr=ff800000\0" \
  148. "ramdisk_addr=ff810000\0" \
  149. "load=tftp 100000 /tftpboot/ebony/u-boot.bin\0" \
  150. "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
  151. "cp.b 100000 fffc0000 40000;" \
  152. "setenv filesize;saveenv\0" \
  153. "upd=run load;run update\0" \
  154. ""
  155. #define CONFIG_BOOTCOMMAND "run flash_self"
  156. #if 0
  157. #define CONFIG_BOOTDELAY -1 /* autoboot disabled */
  158. #else
  159. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  160. #endif
  161. #define CONFIG_BAUDRATE 115200
  162. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  163. #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  164. #define CONFIG_MII 1 /* MII PHY management */
  165. #define CONFIG_PHY_ADDR 8 /* PHY address */
  166. #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
  167. CFG_CMD_ASKENV | \
  168. CFG_CMD_DATE | \
  169. CFG_CMD_DHCP | \
  170. CFG_CMD_DIAG | \
  171. CFG_CMD_ELF | \
  172. CFG_CMD_I2C | \
  173. CFG_CMD_IRQ | \
  174. CFG_CMD_MII | \
  175. CFG_CMD_NET | \
  176. CFG_CMD_NFS | \
  177. CFG_CMD_PCI | \
  178. CFG_CMD_PING | \
  179. CFG_CMD_REGINFO | \
  180. CFG_CMD_SDRAM | \
  181. CFG_CMD_SNTP )
  182. /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
  183. #include <cmd_confdefs.h>
  184. #undef CONFIG_WATCHDOG /* watchdog disabled */
  185. /*
  186. * Miscellaneous configurable options
  187. */
  188. #define CFG_LONGHELP /* undef to save memory */
  189. #define CFG_PROMPT "=> " /* Monitor Command Prompt */
  190. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  191. #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
  192. #else
  193. #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
  194. #endif
  195. #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
  196. #define CFG_MAXARGS 16 /* max number of command args */
  197. #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
  198. #define CFG_MEMTEST_START 0x0400000 /* memtest works on */
  199. #define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
  200. #define CFG_LOAD_ADDR 0x100000 /* default load address */
  201. #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  202. #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
  203. #define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
  204. #define CONFIG_LOOPW 1 /* enable loopw command */
  205. #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
  206. #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
  207. #define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  208. /*-----------------------------------------------------------------------
  209. * PCI stuff
  210. *-----------------------------------------------------------------------
  211. */
  212. /* General PCI */
  213. #define CONFIG_PCI /* include pci support */
  214. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  215. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  216. #define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
  217. /* Board-specific PCI */
  218. #define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
  219. #define CFG_PCI_TARGET_INIT /* let board init pci target */
  220. #define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
  221. #define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  222. /*
  223. * For booting Linux, the board info and command line data
  224. * have to be in the first 8 MB of memory, since this is
  225. * the maximum mapped by the Linux kernel during initialization.
  226. */
  227. #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  228. /*-----------------------------------------------------------------------
  229. * Cache Configuration
  230. */
  231. #define CFG_DCACHE_SIZE 8192 /* For IBM 405 CPUs */
  232. #define CFG_CACHELINE_SIZE 32 /* ... */
  233. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  234. #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  235. #endif
  236. /*
  237. * Internal Definitions
  238. *
  239. * Boot Flags
  240. */
  241. #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
  242. #define BOOTFLAG_WARM 0x02 /* Software reboot */
  243. #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
  244. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  245. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  246. #endif
  247. #endif /* __CONFIG_H */