fsl_diu_fb.c 10.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2007, 2010-2011 Freescale Semiconductor, Inc.
  4. * Authors: York Sun <yorksun@freescale.com>
  5. * Timur Tabi <timur@freescale.com>
  6. *
  7. * FSL DIU Framebuffer driver
  8. */
  9. #include <common.h>
  10. #include <malloc.h>
  11. #include <asm/io.h>
  12. #include "videomodes.h"
  13. #include <video_fb.h>
  14. #include <fsl_diu_fb.h>
  15. #include <linux/list.h>
  16. #include <linux/fb.h>
  17. /* This setting is used for the ifm pdm360ng with PRIMEVIEW PM070WL3 */
  18. static struct fb_videomode fsl_diu_mode_800_480 = {
  19. .name = "800x480-60",
  20. .refresh = 60,
  21. .xres = 800,
  22. .yres = 480,
  23. .pixclock = 31250,
  24. .left_margin = 86,
  25. .right_margin = 42,
  26. .upper_margin = 33,
  27. .lower_margin = 10,
  28. .hsync_len = 128,
  29. .vsync_len = 2,
  30. .sync = 0,
  31. .vmode = FB_VMODE_NONINTERLACED
  32. };
  33. /* For the SHARP LQ084S3LG01, used on the P1022DS board */
  34. static struct fb_videomode fsl_diu_mode_800_600 = {
  35. .name = "800x600-60",
  36. .refresh = 60,
  37. .xres = 800,
  38. .yres = 600,
  39. .pixclock = 25000,
  40. .left_margin = 88,
  41. .right_margin = 40,
  42. .upper_margin = 23,
  43. .lower_margin = 1,
  44. .hsync_len = 128,
  45. .vsync_len = 4,
  46. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  47. .vmode = FB_VMODE_NONINTERLACED
  48. };
  49. /*
  50. * These parameters give default parameters
  51. * for video output 1024x768,
  52. * FIXME - change timing to proper amounts
  53. * hsync 31.5kHz, vsync 60Hz
  54. */
  55. static struct fb_videomode fsl_diu_mode_1024_768 = {
  56. .name = "1024x768-60",
  57. .refresh = 60,
  58. .xres = 1024,
  59. .yres = 768,
  60. .pixclock = 15385,
  61. .left_margin = 160,
  62. .right_margin = 24,
  63. .upper_margin = 29,
  64. .lower_margin = 3,
  65. .hsync_len = 136,
  66. .vsync_len = 6,
  67. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  68. .vmode = FB_VMODE_NONINTERLACED
  69. };
  70. static struct fb_videomode fsl_diu_mode_1280_1024 = {
  71. .name = "1280x1024-60",
  72. .refresh = 60,
  73. .xres = 1280,
  74. .yres = 1024,
  75. .pixclock = 9375,
  76. .left_margin = 38,
  77. .right_margin = 128,
  78. .upper_margin = 2,
  79. .lower_margin = 7,
  80. .hsync_len = 216,
  81. .vsync_len = 37,
  82. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  83. .vmode = FB_VMODE_NONINTERLACED
  84. };
  85. static struct fb_videomode fsl_diu_mode_1280_720 = {
  86. .name = "1280x720-60",
  87. .refresh = 60,
  88. .xres = 1280,
  89. .yres = 720,
  90. .pixclock = 13426,
  91. .left_margin = 192,
  92. .right_margin = 64,
  93. .upper_margin = 22,
  94. .lower_margin = 1,
  95. .hsync_len = 136,
  96. .vsync_len = 3,
  97. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  98. .vmode = FB_VMODE_NONINTERLACED
  99. };
  100. static struct fb_videomode fsl_diu_mode_1920_1080 = {
  101. .name = "1920x1080-60",
  102. .refresh = 60,
  103. .xres = 1920,
  104. .yres = 1080,
  105. .pixclock = 5787,
  106. .left_margin = 328,
  107. .right_margin = 120,
  108. .upper_margin = 34,
  109. .lower_margin = 1,
  110. .hsync_len = 208,
  111. .vsync_len = 3,
  112. .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  113. .vmode = FB_VMODE_NONINTERLACED
  114. };
  115. /*
  116. * These are the fields of area descriptor(in DDR memory) for every plane
  117. */
  118. struct diu_ad {
  119. /* Word 0(32-bit) in DDR memory */
  120. __le32 pix_fmt; /* hard coding pixel format */
  121. /* Word 1(32-bit) in DDR memory */
  122. __le32 addr;
  123. /* Word 2(32-bit) in DDR memory */
  124. __le32 src_size_g_alpha;
  125. /* Word 3(32-bit) in DDR memory */
  126. __le32 aoi_size;
  127. /* Word 4(32-bit) in DDR memory */
  128. __le32 offset_xyi;
  129. /* Word 5(32-bit) in DDR memory */
  130. __le32 offset_xyd;
  131. /* Word 6(32-bit) in DDR memory */
  132. __le32 ckmax_r:8;
  133. __le32 ckmax_g:8;
  134. __le32 ckmax_b:8;
  135. __le32 res9:8;
  136. /* Word 7(32-bit) in DDR memory */
  137. __le32 ckmin_r:8;
  138. __le32 ckmin_g:8;
  139. __le32 ckmin_b:8;
  140. __le32 res10:8;
  141. /* Word 8(32-bit) in DDR memory */
  142. __le32 next_ad;
  143. /* Word 9(32-bit) in DDR memory, just for 64-bit aligned */
  144. __le32 res[3];
  145. } __attribute__ ((packed));
  146. /*
  147. * DIU register map
  148. */
  149. struct diu {
  150. __be32 desc[3];
  151. __be32 gamma;
  152. __be32 pallete;
  153. __be32 cursor;
  154. __be32 curs_pos;
  155. __be32 diu_mode;
  156. __be32 bgnd;
  157. __be32 bgnd_wb;
  158. __be32 disp_size;
  159. __be32 wb_size;
  160. __be32 wb_mem_addr;
  161. __be32 hsyn_para;
  162. __be32 vsyn_para;
  163. __be32 syn_pol;
  164. __be32 thresholds;
  165. __be32 int_status;
  166. __be32 int_mask;
  167. __be32 colorbar[8];
  168. __be32 filling;
  169. __be32 plut;
  170. } __attribute__ ((packed));
  171. struct diu_addr {
  172. void *vaddr; /* Virtual address */
  173. u32 paddr; /* 32-bit physical address */
  174. unsigned int offset; /* Alignment offset */
  175. };
  176. static struct fb_info info;
  177. /*
  178. * Align to 64-bit(8-byte), 32-byte, etc.
  179. */
  180. static int allocate_buf(struct diu_addr *buf, u32 size, u32 bytes_align)
  181. {
  182. u32 offset, ssize;
  183. u32 mask;
  184. ssize = size + bytes_align;
  185. buf->vaddr = malloc(ssize);
  186. if (!buf->vaddr)
  187. return -1;
  188. memset(buf->vaddr, 0, ssize);
  189. mask = bytes_align - 1;
  190. offset = (u32)buf->vaddr & mask;
  191. if (offset) {
  192. buf->offset = bytes_align - offset;
  193. buf->vaddr += offset;
  194. } else
  195. buf->offset = 0;
  196. buf->paddr = virt_to_phys(buf->vaddr);
  197. return 0;
  198. }
  199. /*
  200. * Allocate a framebuffer and an Area Descriptor that points to it. Both
  201. * are created in the same memory block. The Area Descriptor is updated to
  202. * point to the framebuffer memory. Memory is aligned as needed.
  203. */
  204. static struct diu_ad *allocate_fb(unsigned int xres, unsigned int yres,
  205. unsigned int depth, char **fb)
  206. {
  207. unsigned long size = xres * yres * depth;
  208. struct diu_addr addr;
  209. struct diu_ad *ad;
  210. size_t ad_size = roundup(sizeof(struct diu_ad), 32);
  211. /*
  212. * Allocate a memory block that holds the Area Descriptor and the
  213. * frame buffer right behind it. To keep the code simple, everything
  214. * is aligned on a 32-byte address.
  215. */
  216. if (allocate_buf(&addr, ad_size + size, 32) < 0)
  217. return NULL;
  218. ad = addr.vaddr;
  219. ad->addr = cpu_to_le32(addr.paddr + ad_size);
  220. ad->aoi_size = cpu_to_le32((yres << 16) | xres);
  221. ad->src_size_g_alpha = cpu_to_le32((yres << 12) | xres);
  222. ad->offset_xyi = 0;
  223. ad->offset_xyd = 0;
  224. if (fb)
  225. *fb = addr.vaddr + ad_size;
  226. return ad;
  227. }
  228. int fsl_diu_init(u16 xres, u16 yres, u32 pixel_format, int gamma_fix)
  229. {
  230. struct fb_videomode *fsl_diu_mode_db;
  231. struct diu_ad *ad;
  232. struct diu *hw = (struct diu *)CONFIG_SYS_DIU_ADDR;
  233. u8 *gamma_table_base;
  234. unsigned int i, j;
  235. struct diu_addr gamma;
  236. struct diu_addr cursor;
  237. /* Convert the X,Y resolution pair into a single number */
  238. #define RESOLUTION(x, y) (((u32)(x) << 16) | (y))
  239. switch (RESOLUTION(xres, yres)) {
  240. case RESOLUTION(800, 480):
  241. fsl_diu_mode_db = &fsl_diu_mode_800_480;
  242. break;
  243. case RESOLUTION(800, 600):
  244. fsl_diu_mode_db = &fsl_diu_mode_800_600;
  245. break;
  246. case RESOLUTION(1024, 768):
  247. fsl_diu_mode_db = &fsl_diu_mode_1024_768;
  248. break;
  249. case RESOLUTION(1280, 1024):
  250. fsl_diu_mode_db = &fsl_diu_mode_1280_1024;
  251. break;
  252. case RESOLUTION(1280, 720):
  253. fsl_diu_mode_db = &fsl_diu_mode_1280_720;
  254. break;
  255. case RESOLUTION(1920, 1080):
  256. fsl_diu_mode_db = &fsl_diu_mode_1920_1080;
  257. break;
  258. default:
  259. printf("DIU: Unsupported resolution %ux%u\n", xres, yres);
  260. return -1;
  261. }
  262. /* read mode info */
  263. info.var.xres = fsl_diu_mode_db->xres;
  264. info.var.yres = fsl_diu_mode_db->yres;
  265. info.var.bits_per_pixel = 32;
  266. info.var.pixclock = fsl_diu_mode_db->pixclock;
  267. info.var.left_margin = fsl_diu_mode_db->left_margin;
  268. info.var.right_margin = fsl_diu_mode_db->right_margin;
  269. info.var.upper_margin = fsl_diu_mode_db->upper_margin;
  270. info.var.lower_margin = fsl_diu_mode_db->lower_margin;
  271. info.var.hsync_len = fsl_diu_mode_db->hsync_len;
  272. info.var.vsync_len = fsl_diu_mode_db->vsync_len;
  273. info.var.sync = fsl_diu_mode_db->sync;
  274. info.var.vmode = fsl_diu_mode_db->vmode;
  275. info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8;
  276. /* Memory allocation for framebuffer */
  277. info.screen_size =
  278. info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8);
  279. ad = allocate_fb(info.var.xres, info.var.yres,
  280. info.var.bits_per_pixel / 8, &info.screen_base);
  281. if (!ad) {
  282. printf("DIU: Out of memory\n");
  283. return -1;
  284. }
  285. ad->pix_fmt = pixel_format;
  286. /* Disable chroma keying function */
  287. ad->ckmax_r = 0;
  288. ad->ckmax_g = 0;
  289. ad->ckmax_b = 0;
  290. ad->ckmin_r = 255;
  291. ad->ckmin_g = 255;
  292. ad->ckmin_b = 255;
  293. /* Initialize the gamma table */
  294. if (allocate_buf(&gamma, 256 * 3, 32) < 0) {
  295. printf("DIU: Out of memory\n");
  296. return -1;
  297. }
  298. gamma_table_base = gamma.vaddr;
  299. for (i = 0; i <= 2; i++)
  300. for (j = 0; j < 256; j++)
  301. *gamma_table_base++ = j;
  302. if (gamma_fix == 1) { /* fix the gamma */
  303. gamma_table_base = gamma.vaddr;
  304. for (i = 0; i < 256 * 3; i++) {
  305. gamma_table_base[i] = (gamma_table_base[i] << 2)
  306. | ((gamma_table_base[i] >> 6) & 0x03);
  307. }
  308. }
  309. /* Initialize the cursor */
  310. if (allocate_buf(&cursor, 32 * 32 * 2, 32) < 0) {
  311. printf("DIU: Can't alloc cursor data\n");
  312. return -1;
  313. }
  314. /* Program DIU registers */
  315. out_be32(&hw->diu_mode, 0); /* Temporarily disable the DIU */
  316. out_be32(&hw->gamma, gamma.paddr);
  317. out_be32(&hw->cursor, cursor.paddr);
  318. out_be32(&hw->bgnd, 0x007F7F7F);
  319. out_be32(&hw->disp_size, info.var.yres << 16 | info.var.xres);
  320. out_be32(&hw->hsyn_para, info.var.left_margin << 22 |
  321. info.var.hsync_len << 11 |
  322. info.var.right_margin);
  323. out_be32(&hw->vsyn_para, info.var.upper_margin << 22 |
  324. info.var.vsync_len << 11 |
  325. info.var.lower_margin);
  326. /* Pixel Clock configuration */
  327. diu_set_pixel_clock(info.var.pixclock);
  328. /* Set the frame buffers */
  329. out_be32(&hw->desc[0], virt_to_phys(ad));
  330. out_be32(&hw->desc[1], 0);
  331. out_be32(&hw->desc[2], 0);
  332. /* Enable the DIU, set display to all three planes */
  333. out_be32(&hw->diu_mode, 1);
  334. return 0;
  335. }
  336. void *video_hw_init(void)
  337. {
  338. static GraphicDevice ctfb;
  339. const char *options;
  340. unsigned int depth = 0, freq = 0;
  341. if (!video_get_video_mode(&ctfb.winSizeX, &ctfb.winSizeY, &depth, &freq,
  342. &options))
  343. return NULL;
  344. /* Find the monitor port, which is a required option */
  345. if (!options)
  346. return NULL;
  347. if (strncmp(options, "monitor=", 8) != 0)
  348. return NULL;
  349. if (platform_diu_init(ctfb.winSizeX, ctfb.winSizeY, options + 8) < 0)
  350. return NULL;
  351. /* fill in Graphic device struct */
  352. sprintf(ctfb.modeIdent, "%ix%ix%i %ikHz %iHz",
  353. ctfb.winSizeX, ctfb.winSizeY, depth, 64, freq);
  354. ctfb.frameAdrs = (unsigned int)info.screen_base;
  355. ctfb.plnSizeX = ctfb.winSizeX;
  356. ctfb.plnSizeY = ctfb.winSizeY;
  357. ctfb.gdfBytesPP = 4;
  358. ctfb.gdfIndex = GDF_32BIT_X888RGB;
  359. ctfb.isaBase = 0;
  360. ctfb.pciBase = 0;
  361. ctfb.memSize = info.screen_size;
  362. /* Cursor Start Address */
  363. ctfb.dprBase = 0;
  364. ctfb.vprBase = 0;
  365. ctfb.cprBase = 0;
  366. return &ctfb;
  367. }