tpm_tis_st33zp24_spi.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * STMicroelectronics TPM ST33ZP24 SPI UBOOT driver
  4. *
  5. * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
  6. * Author(s): Christophe Ricard <christophe-h.ricard@st.com> for STMicroelectronics.
  7. *
  8. * Description: Device driver for ST33ZP24 SPI TPM TCG.
  9. *
  10. * This device driver implements the TPM interface as defined in
  11. * the TCG TPM Interface Spec version 1.21, revision 1.0 and the
  12. * STMicroelectronics Protocol Stack Specification version 1.2.0.
  13. */
  14. #include <common.h>
  15. #include <dm.h>
  16. #include <fdtdec.h>
  17. #include <log.h>
  18. #include <spi.h>
  19. #include <tpm-v1.h>
  20. #include <errno.h>
  21. #include <linux/delay.h>
  22. #include <linux/types.h>
  23. #include <asm/unaligned.h>
  24. #include <linux/compat.h>
  25. #include "tpm_tis.h"
  26. #include "tpm_internal.h"
  27. #define TPM_ACCESS 0x0
  28. #define TPM_STS 0x18
  29. #define TPM_DATA_FIFO 0x24
  30. #define LOCALITY0 0
  31. #define TPM_DATA_FIFO 0x24
  32. #define TPM_INTF_CAPABILITY 0x14
  33. #define TPM_DUMMY_BYTE 0x00
  34. #define TPM_WRITE_DIRECTION 0x80
  35. #define MAX_SPI_LATENCY 15
  36. #define LOCALITY0 0
  37. #define ST33ZP24_OK 0x5A
  38. #define ST33ZP24_UNDEFINED_ERR 0x80
  39. #define ST33ZP24_BADLOCALITY 0x81
  40. #define ST33ZP24_TISREGISTER_UKNOWN 0x82
  41. #define ST33ZP24_LOCALITY_NOT_ACTIVATED 0x83
  42. #define ST33ZP24_HASH_END_BEFORE_HASH_START 0x84
  43. #define ST33ZP24_BAD_COMMAND_ORDER 0x85
  44. #define ST33ZP24_INCORECT_RECEIVED_LENGTH 0x86
  45. #define ST33ZP24_TPM_FIFO_OVERFLOW 0x89
  46. #define ST33ZP24_UNEXPECTED_READ_FIFO 0x8A
  47. #define ST33ZP24_UNEXPECTED_WRITE_FIFO 0x8B
  48. #define ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END 0x90
  49. #define ST33ZP24_DUMMY_BYTES 0x00
  50. /*
  51. * TPM command can be up to 2048 byte, A TPM response can be up to
  52. * 1024 byte.
  53. * Between command and response, there are latency byte (up to 15
  54. * usually on st33zp24 2 are enough).
  55. *
  56. * Overall when sending a command and expecting an answer we need if
  57. * worst case:
  58. * 2048 (for the TPM command) + 1024 (for the TPM answer). We need
  59. * some latency byte before the answer is available (max 15).
  60. * We have 2048 + 1024 + 15.
  61. */
  62. #define ST33ZP24_SPI_BUFFER_SIZE (TPM_BUFSIZE + (TPM_BUFSIZE / 2) +\
  63. MAX_SPI_LATENCY)
  64. struct st33zp24_spi_phy {
  65. int latency;
  66. u8 tx_buf[ST33ZP24_SPI_BUFFER_SIZE];
  67. u8 rx_buf[ST33ZP24_SPI_BUFFER_SIZE];
  68. };
  69. static int st33zp24_spi_status_to_errno(u8 code)
  70. {
  71. switch (code) {
  72. case ST33ZP24_OK:
  73. return 0;
  74. case ST33ZP24_UNDEFINED_ERR:
  75. case ST33ZP24_BADLOCALITY:
  76. case ST33ZP24_TISREGISTER_UKNOWN:
  77. case ST33ZP24_LOCALITY_NOT_ACTIVATED:
  78. case ST33ZP24_HASH_END_BEFORE_HASH_START:
  79. case ST33ZP24_BAD_COMMAND_ORDER:
  80. case ST33ZP24_UNEXPECTED_READ_FIFO:
  81. case ST33ZP24_UNEXPECTED_WRITE_FIFO:
  82. case ST33ZP24_CMDRDY_SET_WHEN_PROCESSING_HASH_END:
  83. return -EPROTO;
  84. case ST33ZP24_INCORECT_RECEIVED_LENGTH:
  85. case ST33ZP24_TPM_FIFO_OVERFLOW:
  86. return -EMSGSIZE;
  87. case ST33ZP24_DUMMY_BYTES:
  88. return -ENOSYS;
  89. }
  90. return code;
  91. }
  92. /*
  93. * st33zp24_spi_send
  94. * Send byte to TPM register according to the ST33ZP24 SPI protocol.
  95. * @param: tpm, the chip description
  96. * @param: tpm_register, the tpm tis register where the data should be written
  97. * @param: tpm_data, the tpm_data to write inside the tpm_register
  98. * @param: tpm_size, The length of the data
  99. * @return: should be zero if success else a negative error code.
  100. */
  101. static int st33zp24_spi_write(struct udevice *dev, u8 tpm_register,
  102. const u8 *tpm_data, size_t tpm_size)
  103. {
  104. int total_length = 0, ret;
  105. struct spi_slave *slave = dev_get_parent_priv(dev);
  106. struct st33zp24_spi_phy *phy = dev_get_plat(dev);
  107. u8 *tx_buf = (u8 *)phy->tx_buf;
  108. u8 *rx_buf = phy->rx_buf;
  109. tx_buf[total_length++] = TPM_WRITE_DIRECTION | LOCALITY0;
  110. tx_buf[total_length++] = tpm_register;
  111. if (tpm_size > 0 && tpm_register == TPM_DATA_FIFO) {
  112. tx_buf[total_length++] = tpm_size >> 8;
  113. tx_buf[total_length++] = tpm_size;
  114. }
  115. memcpy(tx_buf + total_length, tpm_data, tpm_size);
  116. total_length += tpm_size;
  117. memset(tx_buf + total_length, TPM_DUMMY_BYTE, phy->latency);
  118. total_length += phy->latency;
  119. ret = spi_claim_bus(slave);
  120. if (ret < 0)
  121. return ret;
  122. ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
  123. SPI_XFER_BEGIN | SPI_XFER_END);
  124. if (ret < 0)
  125. return ret;
  126. spi_release_bus(slave);
  127. if (ret == 0)
  128. ret = rx_buf[total_length - 1];
  129. return st33zp24_spi_status_to_errno(ret);
  130. }
  131. /*
  132. * spi_st33zp24_spi_read8_reg
  133. * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
  134. * @param: tpm, the chip description
  135. * @param: tpm_loc, the locality to read register from
  136. * @param: tpm_register, the tpm tis register where the data should be read
  137. * @param: tpm_data, the TPM response
  138. * @param: tpm_size, tpm TPM response size to read.
  139. * @return: should be zero if success else a negative error code.
  140. */
  141. static u8 st33zp24_spi_read8_reg(struct udevice *dev, u8 tpm_register,
  142. u8 *tpm_data, size_t tpm_size)
  143. {
  144. int total_length = 0, ret;
  145. struct spi_slave *slave = dev_get_parent_priv(dev);
  146. struct st33zp24_spi_phy *phy = dev_get_plat(dev);
  147. u8 *tx_buf = (u8 *)phy->tx_buf;
  148. u8 *rx_buf = phy->rx_buf;
  149. /* Pre-Header */
  150. tx_buf[total_length++] = LOCALITY0;
  151. tx_buf[total_length++] = tpm_register;
  152. memset(&tx_buf[total_length], TPM_DUMMY_BYTE,
  153. phy->latency + tpm_size);
  154. total_length += phy->latency + tpm_size;
  155. ret = spi_claim_bus(slave);
  156. if (ret < 0)
  157. return 0;
  158. ret = spi_xfer(slave, total_length * 8, tx_buf, rx_buf,
  159. SPI_XFER_BEGIN | SPI_XFER_END);
  160. if (ret < 0)
  161. return 0;
  162. spi_release_bus(slave);
  163. if (tpm_size > 0 && ret == 0) {
  164. ret = rx_buf[total_length - tpm_size - 1];
  165. memcpy(tpm_data, rx_buf + total_length - tpm_size, tpm_size);
  166. }
  167. return ret;
  168. }
  169. /*
  170. * st33zp24_spi_recv
  171. * Recv byte from the TIS register according to the ST33ZP24 SPI protocol.
  172. * @param: phy_id, the phy description
  173. * @param: tpm_register, the tpm tis register where the data should be read
  174. * @param: tpm_data, the TPM response
  175. * @param: tpm_size, tpm TPM response size to read.
  176. * @return: number of byte read successfully: should be one if success.
  177. */
  178. static int st33zp24_spi_read(struct udevice *dev, u8 tpm_register,
  179. u8 *tpm_data, size_t tpm_size)
  180. {
  181. int ret;
  182. ret = st33zp24_spi_read8_reg(dev, tpm_register, tpm_data, tpm_size);
  183. if (!st33zp24_spi_status_to_errno(ret))
  184. return tpm_size;
  185. return ret;
  186. }
  187. static int st33zp24_spi_evaluate_latency(struct udevice *dev)
  188. {
  189. int latency = 1, status = 0;
  190. u8 data = 0;
  191. struct st33zp24_spi_phy *phy = dev_get_plat(dev);
  192. while (!status && latency < MAX_SPI_LATENCY) {
  193. phy->latency = latency;
  194. status = st33zp24_spi_read8_reg(dev, TPM_INTF_CAPABILITY,
  195. &data, 1);
  196. latency++;
  197. }
  198. if (status < 0)
  199. return status;
  200. if (latency == MAX_SPI_LATENCY)
  201. return -ENODEV;
  202. return latency - 1;
  203. }
  204. /*
  205. * st33zp24_spi_release_locality release the active locality
  206. * @param: chip, the tpm chip description.
  207. */
  208. static void st33zp24_spi_release_locality(struct udevice *dev)
  209. {
  210. u8 data = TPM_ACCESS_ACTIVE_LOCALITY;
  211. st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
  212. }
  213. /*
  214. * st33zp24_spi_check_locality if the locality is active
  215. * @param: chip, the tpm chip description
  216. * @return: the active locality or -EACCES.
  217. */
  218. static int st33zp24_spi_check_locality(struct udevice *dev)
  219. {
  220. u8 data;
  221. u8 status;
  222. struct tpm_chip *chip = dev_get_priv(dev);
  223. status = st33zp24_spi_read(dev, TPM_ACCESS, &data, 1);
  224. if (status && (data &
  225. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  226. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  227. return chip->locality;
  228. return -EACCES;
  229. }
  230. /*
  231. * st33zp24_spi_request_locality request the TPM locality
  232. * @param: chip, the chip description
  233. * @return: the active locality or negative value.
  234. */
  235. static int st33zp24_spi_request_locality(struct udevice *dev)
  236. {
  237. unsigned long start, stop;
  238. long ret;
  239. u8 data;
  240. struct tpm_chip *chip = dev_get_priv(dev);
  241. if (st33zp24_spi_check_locality(dev) == chip->locality)
  242. return chip->locality;
  243. data = TPM_ACCESS_REQUEST_USE;
  244. ret = st33zp24_spi_write(dev, TPM_ACCESS, &data, 1);
  245. if (ret < 0)
  246. return ret;
  247. /* wait for locality activated */
  248. start = get_timer(0);
  249. stop = chip->timeout_a;
  250. do {
  251. if (st33zp24_spi_check_locality(dev) >= 0)
  252. return chip->locality;
  253. udelay(TPM_TIMEOUT_MS * 1000);
  254. } while (get_timer(start) < stop);
  255. return -EACCES;
  256. }
  257. /*
  258. * st33zp24_spi_status return the TPM_STS register
  259. * @param: chip, the tpm chip description
  260. * @return: the TPM_STS register value.
  261. */
  262. static u8 st33zp24_spi_status(struct udevice *dev)
  263. {
  264. u8 data;
  265. st33zp24_spi_read(dev, TPM_STS, &data, 1);
  266. return data;
  267. }
  268. /*
  269. * st33zp24_spi_get_burstcount return the burstcount address 0x19 0x1A
  270. * @param: chip, the chip description
  271. * return: the burstcount or -TPM_DRIVER_ERR in case of error.
  272. */
  273. static int st33zp24_spi_get_burstcount(struct udevice *dev)
  274. {
  275. struct tpm_chip *chip = dev_get_priv(dev);
  276. unsigned long start, stop;
  277. int burstcnt, status;
  278. u8 tpm_reg, temp;
  279. /* wait for burstcount */
  280. start = get_timer(0);
  281. stop = chip->timeout_d;
  282. do {
  283. tpm_reg = TPM_STS + 1;
  284. status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
  285. if (status < 0)
  286. return -EBUSY;
  287. tpm_reg = TPM_STS + 2;
  288. burstcnt = temp;
  289. status = st33zp24_spi_read(dev, tpm_reg, &temp, 1);
  290. if (status < 0)
  291. return -EBUSY;
  292. burstcnt |= temp << 8;
  293. if (burstcnt)
  294. return burstcnt;
  295. udelay(TIS_SHORT_TIMEOUT_MS * 1000);
  296. } while (get_timer(start) < stop);
  297. return -EBUSY;
  298. }
  299. /*
  300. * st33zp24_spi_cancel, cancel the current command execution or
  301. * set STS to COMMAND READY.
  302. * @param: chip, tpm_chip description.
  303. */
  304. static void st33zp24_spi_cancel(struct udevice *dev)
  305. {
  306. u8 data;
  307. data = TPM_STS_COMMAND_READY;
  308. st33zp24_spi_write(dev, TPM_STS, &data, 1);
  309. }
  310. /*
  311. * st33zp24_spi_wait_for_stat wait for a TPM_STS value
  312. * @param: chip, the tpm chip description
  313. * @param: mask, the value mask to wait
  314. * @param: timeout, the timeout
  315. * @param: status,
  316. * @return: the tpm status, 0 if success, -ETIME if timeout is reached.
  317. */
  318. static int st33zp24_spi_wait_for_stat(struct udevice *dev, u8 mask,
  319. unsigned long timeout, int *status)
  320. {
  321. unsigned long start, stop;
  322. /* Check current status */
  323. *status = st33zp24_spi_status(dev);
  324. if ((*status & mask) == mask)
  325. return 0;
  326. start = get_timer(0);
  327. stop = timeout;
  328. do {
  329. udelay(TPM_TIMEOUT_MS * 1000);
  330. *status = st33zp24_spi_status(dev);
  331. if ((*status & mask) == mask)
  332. return 0;
  333. } while (get_timer(start) < stop);
  334. return -ETIME;
  335. }
  336. /*
  337. * st33zp24_spi_recv_data receive data
  338. * @param: chip, the tpm chip description
  339. * @param: buf, the buffer where the data are received
  340. * @param: count, the number of data to receive
  341. * @return: the number of bytes read from TPM FIFO.
  342. */
  343. static int st33zp24_spi_recv_data(struct udevice *dev, u8 *buf, size_t count)
  344. {
  345. struct tpm_chip *chip = dev_get_priv(dev);
  346. int size = 0, burstcnt, len, ret, status;
  347. while (size < count &&
  348. st33zp24_spi_wait_for_stat(dev, TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  349. chip->timeout_c, &status) == 0) {
  350. burstcnt = st33zp24_spi_get_burstcount(dev);
  351. if (burstcnt < 0)
  352. return burstcnt;
  353. len = min_t(int, burstcnt, count - size);
  354. ret = st33zp24_spi_read(dev, TPM_DATA_FIFO, buf + size, len);
  355. if (ret < 0)
  356. return ret;
  357. size += len;
  358. }
  359. return size;
  360. }
  361. /*
  362. * st33zp24_spi_recv received TPM response through TPM phy.
  363. * @param: chip, tpm_chip description.
  364. * @param: buf, the buffer to store data.
  365. * @param: count, the number of bytes that can received (sizeof buf).
  366. * @return: Returns zero in case of success else -EIO.
  367. */
  368. static int st33zp24_spi_recv(struct udevice *dev, u8 *buf, size_t count)
  369. {
  370. struct tpm_chip *chip = dev_get_priv(dev);
  371. int size;
  372. unsigned int expected;
  373. if (!chip)
  374. return -ENODEV;
  375. if (count < TPM_HEADER_SIZE) {
  376. size = -EIO;
  377. goto out;
  378. }
  379. size = st33zp24_spi_recv_data(dev, buf, TPM_HEADER_SIZE);
  380. if (size < TPM_HEADER_SIZE) {
  381. debug("TPM error, unable to read header\n");
  382. goto out;
  383. }
  384. expected = get_unaligned_be32(buf + 2);
  385. if (expected > count || expected < TPM_HEADER_SIZE) {
  386. size = -EIO;
  387. goto out;
  388. }
  389. size += st33zp24_spi_recv_data(dev, &buf[TPM_HEADER_SIZE],
  390. expected - TPM_HEADER_SIZE);
  391. if (size < expected) {
  392. debug("TPM error, unable to read remaining bytes of result\n");
  393. size = -EIO;
  394. goto out;
  395. }
  396. out:
  397. st33zp24_spi_cancel(dev);
  398. st33zp24_spi_release_locality(dev);
  399. return size;
  400. }
  401. /*
  402. * st33zp24_spi_send send TPM commands through TPM phy.
  403. * @param: chip, tpm_chip description.
  404. * @param: buf, the buffer to send.
  405. * @param: len, the number of bytes to send.
  406. * @return: Returns zero in case of success else the negative error code.
  407. */
  408. static int st33zp24_spi_send(struct udevice *dev, const u8 *buf, size_t len)
  409. {
  410. struct tpm_chip *chip = dev_get_priv(dev);
  411. u32 i, size;
  412. int burstcnt, ret, status;
  413. u8 data, tpm_stat;
  414. if (!chip)
  415. return -ENODEV;
  416. if (len < TPM_HEADER_SIZE)
  417. return -EIO;
  418. ret = st33zp24_spi_request_locality(dev);
  419. if (ret < 0)
  420. return ret;
  421. tpm_stat = st33zp24_spi_status(dev);
  422. if ((tpm_stat & TPM_STS_COMMAND_READY) == 0) {
  423. st33zp24_spi_cancel(dev);
  424. if (st33zp24_spi_wait_for_stat(dev, TPM_STS_COMMAND_READY,
  425. chip->timeout_b, &status) < 0) {
  426. ret = -ETIME;
  427. goto out_err;
  428. }
  429. }
  430. for (i = 0; i < len - 1;) {
  431. burstcnt = st33zp24_spi_get_burstcount(dev);
  432. if (burstcnt < 0)
  433. return burstcnt;
  434. size = min_t(int, len - i - 1, burstcnt);
  435. ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + i, size);
  436. if (ret < 0)
  437. goto out_err;
  438. i += size;
  439. }
  440. tpm_stat = st33zp24_spi_status(dev);
  441. if ((tpm_stat & TPM_STS_DATA_EXPECT) == 0) {
  442. ret = -EIO;
  443. goto out_err;
  444. }
  445. ret = st33zp24_spi_write(dev, TPM_DATA_FIFO, buf + len - 1, 1);
  446. if (ret < 0)
  447. goto out_err;
  448. tpm_stat = st33zp24_spi_status(dev);
  449. if ((tpm_stat & TPM_STS_DATA_EXPECT) != 0) {
  450. ret = -EIO;
  451. goto out_err;
  452. }
  453. data = TPM_STS_GO;
  454. ret = st33zp24_spi_write(dev, TPM_STS, &data, 1);
  455. if (ret < 0)
  456. goto out_err;
  457. return len;
  458. out_err:
  459. st33zp24_spi_cancel(dev);
  460. st33zp24_spi_release_locality(dev);
  461. return ret;
  462. }
  463. static int st33zp24_spi_cleanup(struct udevice *dev)
  464. {
  465. st33zp24_spi_cancel(dev);
  466. /*
  467. * The TPM needs some time to clean up here,
  468. * so we sleep rather than keeping the bus busy
  469. */
  470. mdelay(2);
  471. st33zp24_spi_release_locality(dev);
  472. return 0;
  473. }
  474. static int st33zp24_spi_init(struct udevice *dev)
  475. {
  476. struct tpm_chip *chip = dev_get_priv(dev);
  477. struct st33zp24_spi_phy *phy = dev_get_plat(dev);
  478. chip->is_open = 1;
  479. /* Default timeouts - these could move to the device tree */
  480. chip->timeout_a = TIS_SHORT_TIMEOUT_MS;
  481. chip->timeout_b = TIS_LONG_TIMEOUT_MS;
  482. chip->timeout_c = TIS_SHORT_TIMEOUT_MS;
  483. chip->timeout_d = TIS_SHORT_TIMEOUT_MS;
  484. chip->locality = LOCALITY0;
  485. phy->latency = st33zp24_spi_evaluate_latency(dev);
  486. if (phy->latency <= 0)
  487. return -ENODEV;
  488. /*
  489. * A timeout query to TPM can be placed here.
  490. * Standard timeout values are used so far
  491. */
  492. return 0;
  493. }
  494. static int st33zp24_spi_open(struct udevice *dev)
  495. {
  496. struct tpm_chip *chip = dev_get_priv(dev);
  497. int rc;
  498. debug("%s: start\n", __func__);
  499. if (chip->is_open)
  500. return -EBUSY;
  501. rc = st33zp24_spi_init(dev);
  502. if (rc < 0)
  503. chip->is_open = 0;
  504. return rc;
  505. }
  506. static int st33zp24_spi_close(struct udevice *dev)
  507. {
  508. struct tpm_chip *chip = dev_get_priv(dev);
  509. if (chip->is_open) {
  510. st33zp24_spi_release_locality(dev);
  511. chip->is_open = 0;
  512. chip->vend_dev = 0;
  513. }
  514. return 0;
  515. }
  516. static int st33zp24_spi_get_desc(struct udevice *dev, char *buf, int size)
  517. {
  518. struct tpm_chip *chip = dev_get_priv(dev);
  519. if (size < 50)
  520. return -ENOSPC;
  521. return snprintf(buf, size, "1.2 TPM (%s, chip type %s device-id 0x%x)",
  522. chip->is_open ? "open" : "closed",
  523. dev->name,
  524. chip->vend_dev >> 16);
  525. }
  526. const struct tpm_ops st33zp24_spi_tpm_ops = {
  527. .open = st33zp24_spi_open,
  528. .close = st33zp24_spi_close,
  529. .recv = st33zp24_spi_recv,
  530. .send = st33zp24_spi_send,
  531. .cleanup = st33zp24_spi_cleanup,
  532. .get_desc = st33zp24_spi_get_desc,
  533. };
  534. static int st33zp24_spi_probe(struct udevice *dev)
  535. {
  536. struct tpm_chip_priv *uc_priv = dev_get_uclass_priv(dev);
  537. uc_priv->duration_ms[TPM_SHORT] = TIS_SHORT_TIMEOUT_MS;
  538. uc_priv->duration_ms[TPM_MEDIUM] = TIS_LONG_TIMEOUT_MS;
  539. uc_priv->duration_ms[TPM_LONG] = TIS_LONG_TIMEOUT_MS;
  540. uc_priv->retry_time_ms = TPM_TIMEOUT_MS;
  541. debug("ST33ZP24 SPI TPM from STMicroelectronics found\n");
  542. return 0;
  543. }
  544. static int st33zp24_spi_remove(struct udevice *dev)
  545. {
  546. st33zp24_spi_release_locality(dev);
  547. return 0;
  548. }
  549. static const struct udevice_id st33zp24_spi_ids[] = {
  550. { .compatible = "st,st33zp24-spi" },
  551. { }
  552. };
  553. U_BOOT_DRIVER(st33zp24_spi_spi) = {
  554. .name = "st33zp24-spi",
  555. .id = UCLASS_TPM,
  556. .of_match = of_match_ptr(st33zp24_spi_ids),
  557. .probe = st33zp24_spi_probe,
  558. .remove = st33zp24_spi_remove,
  559. .ops = &st33zp24_spi_tpm_ops,
  560. .priv_auto = sizeof(struct tpm_chip),
  561. .plat_auto = sizeof(struct st33zp24_spi_phy),
  562. };