cfi_flash.c 64 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002-2004
  4. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  5. *
  6. * Copyright (C) 2003 Arabella Software Ltd.
  7. * Yuli Barcohen <yuli@arabellasw.com>
  8. *
  9. * Copyright (C) 2004
  10. * Ed Okerson
  11. *
  12. * Copyright (C) 2006
  13. * Tolunay Orkun <listmember@orkun.us>
  14. */
  15. /* The DEBUG define must be before common to enable debugging */
  16. /* #define DEBUG */
  17. #include <common.h>
  18. #include <console.h>
  19. #include <dm.h>
  20. #include <env.h>
  21. #include <errno.h>
  22. #include <fdt_support.h>
  23. #include <flash.h>
  24. #include <init.h>
  25. #include <irq_func.h>
  26. #include <log.h>
  27. #include <asm/global_data.h>
  28. #include <asm/processor.h>
  29. #include <asm/io.h>
  30. #include <asm/byteorder.h>
  31. #include <asm/unaligned.h>
  32. #include <env_internal.h>
  33. #include <linux/delay.h>
  34. #include <mtd/cfi_flash.h>
  35. #include <watchdog.h>
  36. /*
  37. * This file implements a Common Flash Interface (CFI) driver for
  38. * U-Boot.
  39. *
  40. * The width of the port and the width of the chips are determined at
  41. * initialization. These widths are used to calculate the address for
  42. * access CFI data structures.
  43. *
  44. * References
  45. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  46. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  47. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  48. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  49. * AMD CFI Specification, Release 2.0 December 1, 2001
  50. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  51. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  52. *
  53. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  54. * reading and writing ... (yes there is such a Hardware).
  55. */
  56. DECLARE_GLOBAL_DATA_PTR;
  57. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  58. #ifdef CONFIG_FLASH_CFI_MTD
  59. static uint flash_verbose = 1;
  60. #else
  61. #define flash_verbose 1
  62. #endif
  63. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  64. /*
  65. * Check if chip width is defined. If not, start detecting with 8bit.
  66. */
  67. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  68. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  69. #endif
  70. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  71. #define __maybe_weak __weak
  72. #else
  73. #define __maybe_weak static
  74. #endif
  75. /*
  76. * 0xffff is an undefined value for the configuration register. When
  77. * this value is returned, the configuration register shall not be
  78. * written at all (default mode).
  79. */
  80. static u16 cfi_flash_config_reg(int i)
  81. {
  82. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  83. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  84. #else
  85. return 0xffff;
  86. #endif
  87. }
  88. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  89. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  90. #else
  91. int cfi_flash_num_flash_banks;
  92. #endif
  93. #ifdef CONFIG_CFI_FLASH /* for driver model */
  94. static void cfi_flash_init_dm(void)
  95. {
  96. struct udevice *dev;
  97. cfi_flash_num_flash_banks = 0;
  98. /*
  99. * The uclass_first_device() will probe the first device and
  100. * uclass_next_device() will probe the rest if they exist. So
  101. * that cfi_flash_probe() will get called assigning the base
  102. * addresses that are available.
  103. */
  104. for (uclass_first_device(UCLASS_MTD, &dev);
  105. dev;
  106. uclass_next_device(&dev)) {
  107. }
  108. }
  109. phys_addr_t cfi_flash_bank_addr(int i)
  110. {
  111. return flash_info[i].base;
  112. }
  113. #else
  114. __weak phys_addr_t cfi_flash_bank_addr(int i)
  115. {
  116. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  117. }
  118. #endif
  119. __weak unsigned long cfi_flash_bank_size(int i)
  120. {
  121. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  122. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  123. #else
  124. return 0;
  125. #endif
  126. }
  127. __maybe_weak void flash_write8(u8 value, void *addr)
  128. {
  129. __raw_writeb(value, addr);
  130. }
  131. __maybe_weak void flash_write16(u16 value, void *addr)
  132. {
  133. __raw_writew(value, addr);
  134. }
  135. __maybe_weak void flash_write32(u32 value, void *addr)
  136. {
  137. __raw_writel(value, addr);
  138. }
  139. __maybe_weak void flash_write64(u64 value, void *addr)
  140. {
  141. /* No architectures currently implement __raw_writeq() */
  142. *(volatile u64 *)addr = value;
  143. }
  144. __maybe_weak u8 flash_read8(void *addr)
  145. {
  146. return __raw_readb(addr);
  147. }
  148. __maybe_weak u16 flash_read16(void *addr)
  149. {
  150. return __raw_readw(addr);
  151. }
  152. __maybe_weak u32 flash_read32(void *addr)
  153. {
  154. return __raw_readl(addr);
  155. }
  156. __maybe_weak u64 flash_read64(void *addr)
  157. {
  158. /* No architectures currently implement __raw_readq() */
  159. return *(volatile u64 *)addr;
  160. }
  161. /*-----------------------------------------------------------------------
  162. */
  163. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
  164. (defined(CONFIG_SYS_MONITOR_BASE) && \
  165. (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
  166. static flash_info_t *flash_get_info(ulong base)
  167. {
  168. int i;
  169. flash_info_t *info;
  170. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  171. info = &flash_info[i];
  172. if (info->size && info->start[0] <= base &&
  173. base <= info->start[0] + info->size - 1)
  174. return info;
  175. }
  176. return NULL;
  177. }
  178. #endif
  179. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  180. {
  181. if (sect != (info->sector_count - 1))
  182. return info->start[sect + 1] - info->start[sect];
  183. else
  184. return info->start[0] + info->size - info->start[sect];
  185. }
  186. /*-----------------------------------------------------------------------
  187. * create an address based on the offset and the port width
  188. */
  189. static inline void *
  190. flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
  191. {
  192. unsigned int byte_offset = offset * info->portwidth;
  193. return (void *)(info->start[sect] + (byte_offset << info->chip_lsb));
  194. }
  195. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  196. unsigned int offset, void *addr)
  197. {
  198. }
  199. /*-----------------------------------------------------------------------
  200. * make a proper sized command based on the port and chip widths
  201. */
  202. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  203. {
  204. int i;
  205. int cword_offset;
  206. int cp_offset;
  207. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  208. u32 cmd_le = cpu_to_le32(cmd);
  209. #endif
  210. uchar val;
  211. uchar *cp = (uchar *) cmdbuf;
  212. for (i = info->portwidth; i > 0; i--) {
  213. cword_offset = (info->portwidth - i) % info->chipwidth;
  214. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  215. cp_offset = info->portwidth - i;
  216. val = *((uchar *)&cmd_le + cword_offset);
  217. #else
  218. cp_offset = i - 1;
  219. val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
  220. #endif
  221. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  222. }
  223. }
  224. #ifdef DEBUG
  225. /*-----------------------------------------------------------------------
  226. * Debug support
  227. */
  228. static void print_longlong(char *str, unsigned long long data)
  229. {
  230. int i;
  231. char *cp;
  232. cp = (char *)&data;
  233. for (i = 0; i < 8; i++)
  234. sprintf(&str[i * 2], "%2.2x", *cp++);
  235. }
  236. static void flash_printqry(struct cfi_qry *qry)
  237. {
  238. u8 *p = (u8 *)qry;
  239. int x, y;
  240. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  241. debug("%02x : ", x);
  242. for (y = 0; y < 16; y++)
  243. debug("%2.2x ", p[x + y]);
  244. debug(" ");
  245. for (y = 0; y < 16; y++) {
  246. unsigned char c = p[x + y];
  247. if (c >= 0x20 && c <= 0x7e)
  248. debug("%c", c);
  249. else
  250. debug(".");
  251. }
  252. debug("\n");
  253. }
  254. }
  255. #endif
  256. /*-----------------------------------------------------------------------
  257. * read a character at a port width address
  258. */
  259. static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
  260. {
  261. uchar *cp;
  262. uchar retval;
  263. cp = flash_map(info, 0, offset);
  264. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  265. retval = flash_read8(cp);
  266. #else
  267. retval = flash_read8(cp + info->portwidth - 1);
  268. #endif
  269. flash_unmap(info, 0, offset, cp);
  270. return retval;
  271. }
  272. /*-----------------------------------------------------------------------
  273. * read a word at a port width address, assume 16bit bus
  274. */
  275. static inline ushort flash_read_word(flash_info_t *info, uint offset)
  276. {
  277. ushort *addr, retval;
  278. addr = flash_map(info, 0, offset);
  279. retval = flash_read16(addr);
  280. flash_unmap(info, 0, offset, addr);
  281. return retval;
  282. }
  283. /*-----------------------------------------------------------------------
  284. * read a long word by picking the least significant byte of each maximum
  285. * port size word. Swap for ppc format.
  286. */
  287. static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
  288. uint offset)
  289. {
  290. uchar *addr;
  291. ulong retval;
  292. #ifdef DEBUG
  293. int x;
  294. #endif
  295. addr = flash_map(info, sect, offset);
  296. #ifdef DEBUG
  297. debug("long addr is at %p info->portwidth = %d\n", addr,
  298. info->portwidth);
  299. for (x = 0; x < 4 * info->portwidth; x++)
  300. debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  301. #endif
  302. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  303. retval = ((flash_read8(addr) << 16) |
  304. (flash_read8(addr + info->portwidth) << 24) |
  305. (flash_read8(addr + 2 * info->portwidth)) |
  306. (flash_read8(addr + 3 * info->portwidth) << 8));
  307. #else
  308. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  309. (flash_read8(addr + info->portwidth - 1) << 16) |
  310. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  311. (flash_read8(addr + 3 * info->portwidth - 1)));
  312. #endif
  313. flash_unmap(info, sect, offset, addr);
  314. return retval;
  315. }
  316. /*
  317. * Write a proper sized command to the correct address
  318. */
  319. static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
  320. uint offset, u32 cmd)
  321. {
  322. void *addr;
  323. cfiword_t cword;
  324. addr = flash_map(info, sect, offset);
  325. flash_make_cmd(info, cmd, &cword);
  326. switch (info->portwidth) {
  327. case FLASH_CFI_8BIT:
  328. debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  329. cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  330. flash_write8(cword.w8, addr);
  331. break;
  332. case FLASH_CFI_16BIT:
  333. debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  334. cmd, cword.w16,
  335. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  336. flash_write16(cword.w16, addr);
  337. break;
  338. case FLASH_CFI_32BIT:
  339. debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
  340. cmd, cword.w32,
  341. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  342. flash_write32(cword.w32, addr);
  343. break;
  344. case FLASH_CFI_64BIT:
  345. #ifdef DEBUG
  346. {
  347. char str[20];
  348. print_longlong(str, cword.w64);
  349. debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  350. addr, cmd, str,
  351. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  352. }
  353. #endif
  354. flash_write64(cword.w64, addr);
  355. break;
  356. }
  357. /* Ensure all the instructions are fully finished */
  358. sync();
  359. flash_unmap(info, sect, offset, addr);
  360. }
  361. static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
  362. {
  363. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  364. flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  365. }
  366. /*-----------------------------------------------------------------------
  367. */
  368. static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
  369. uchar cmd)
  370. {
  371. void *addr;
  372. cfiword_t cword;
  373. int retval;
  374. addr = flash_map(info, sect, offset);
  375. flash_make_cmd(info, cmd, &cword);
  376. debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  377. switch (info->portwidth) {
  378. case FLASH_CFI_8BIT:
  379. debug("is= %x %x\n", flash_read8(addr), cword.w8);
  380. retval = (flash_read8(addr) == cword.w8);
  381. break;
  382. case FLASH_CFI_16BIT:
  383. debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
  384. retval = (flash_read16(addr) == cword.w16);
  385. break;
  386. case FLASH_CFI_32BIT:
  387. debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
  388. retval = (flash_read32(addr) == cword.w32);
  389. break;
  390. case FLASH_CFI_64BIT:
  391. #ifdef DEBUG
  392. {
  393. char str1[20];
  394. char str2[20];
  395. print_longlong(str1, flash_read64(addr));
  396. print_longlong(str2, cword.w64);
  397. debug("is= %s %s\n", str1, str2);
  398. }
  399. #endif
  400. retval = (flash_read64(addr) == cword.w64);
  401. break;
  402. default:
  403. retval = 0;
  404. break;
  405. }
  406. flash_unmap(info, sect, offset, addr);
  407. return retval;
  408. }
  409. /*-----------------------------------------------------------------------
  410. */
  411. static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
  412. uchar cmd)
  413. {
  414. void *addr;
  415. cfiword_t cword;
  416. int retval;
  417. addr = flash_map(info, sect, offset);
  418. flash_make_cmd(info, cmd, &cword);
  419. switch (info->portwidth) {
  420. case FLASH_CFI_8BIT:
  421. retval = ((flash_read8(addr) & cword.w8) == cword.w8);
  422. break;
  423. case FLASH_CFI_16BIT:
  424. retval = ((flash_read16(addr) & cword.w16) == cword.w16);
  425. break;
  426. case FLASH_CFI_32BIT:
  427. retval = ((flash_read32(addr) & cword.w32) == cword.w32);
  428. break;
  429. case FLASH_CFI_64BIT:
  430. retval = ((flash_read64(addr) & cword.w64) == cword.w64);
  431. break;
  432. default:
  433. retval = 0;
  434. break;
  435. }
  436. flash_unmap(info, sect, offset, addr);
  437. return retval;
  438. }
  439. /*-----------------------------------------------------------------------
  440. */
  441. static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
  442. uchar cmd)
  443. {
  444. u8 *addr;
  445. cfiword_t cword;
  446. int retval;
  447. addr = flash_map(info, sect, offset);
  448. flash_make_cmd(info, cmd, &cword);
  449. switch (info->portwidth) {
  450. case FLASH_CFI_8BIT:
  451. retval = flash_read8(addr) != flash_read8(addr);
  452. break;
  453. case FLASH_CFI_16BIT:
  454. retval = flash_read16(addr) != flash_read16(addr);
  455. break;
  456. case FLASH_CFI_32BIT:
  457. retval = flash_read32(addr) != flash_read32(addr);
  458. break;
  459. case FLASH_CFI_64BIT:
  460. retval = ((flash_read32(addr) != flash_read32(addr)) ||
  461. (flash_read32(addr + 4) != flash_read32(addr + 4)));
  462. break;
  463. default:
  464. retval = 0;
  465. break;
  466. }
  467. flash_unmap(info, sect, offset, addr);
  468. return retval;
  469. }
  470. /*
  471. * flash_is_busy - check to see if the flash is busy
  472. *
  473. * This routine checks the status of the chip and returns true if the
  474. * chip is busy.
  475. */
  476. static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
  477. {
  478. int retval;
  479. switch (info->vendor) {
  480. case CFI_CMDSET_INTEL_PROG_REGIONS:
  481. case CFI_CMDSET_INTEL_STANDARD:
  482. case CFI_CMDSET_INTEL_EXTENDED:
  483. retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
  484. break;
  485. case CFI_CMDSET_AMD_STANDARD:
  486. case CFI_CMDSET_AMD_EXTENDED:
  487. #ifdef CONFIG_FLASH_CFI_LEGACY
  488. case CFI_CMDSET_AMD_LEGACY:
  489. #endif
  490. if (info->sr_supported) {
  491. flash_write_cmd(info, sect, info->addr_unlock1,
  492. FLASH_CMD_READ_STATUS);
  493. retval = !flash_isset(info, sect, 0,
  494. FLASH_STATUS_DONE);
  495. } else {
  496. retval = flash_toggle(info, sect, 0,
  497. AMD_STATUS_TOGGLE);
  498. }
  499. break;
  500. default:
  501. retval = 0;
  502. }
  503. debug("%s: %d\n", __func__, retval);
  504. return retval;
  505. }
  506. /*-----------------------------------------------------------------------
  507. * wait for XSR.7 to be set. Time out with an error if it does not.
  508. * This routine does not set the flash to read-array mode.
  509. */
  510. static int flash_status_check(flash_info_t *info, flash_sect_t sector,
  511. ulong tout, char *prompt)
  512. {
  513. ulong start;
  514. #if CONFIG_SYS_HZ != 1000
  515. /* Avoid overflow for large HZ */
  516. if ((ulong)CONFIG_SYS_HZ > 100000)
  517. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  518. else
  519. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  520. #endif
  521. /* Wait for command completion */
  522. #ifdef CONFIG_SYS_LOW_RES_TIMER
  523. reset_timer();
  524. #endif
  525. start = get_timer(0);
  526. WATCHDOG_RESET();
  527. while (flash_is_busy(info, sector)) {
  528. if (get_timer(start) > tout) {
  529. printf("Flash %s timeout at address %lx data %lx\n",
  530. prompt, info->start[sector],
  531. flash_read_long(info, sector, 0));
  532. flash_write_cmd(info, sector, 0, info->cmd_reset);
  533. udelay(1);
  534. return ERR_TIMEOUT;
  535. }
  536. udelay(1); /* also triggers watchdog */
  537. }
  538. return ERR_OK;
  539. }
  540. /*-----------------------------------------------------------------------
  541. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  542. * do a full status check.
  543. *
  544. * This routine sets the flash to read-array mode.
  545. */
  546. static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
  547. ulong tout, char *prompt)
  548. {
  549. int retcode;
  550. retcode = flash_status_check(info, sector, tout, prompt);
  551. switch (info->vendor) {
  552. case CFI_CMDSET_INTEL_PROG_REGIONS:
  553. case CFI_CMDSET_INTEL_EXTENDED:
  554. case CFI_CMDSET_INTEL_STANDARD:
  555. if (retcode == ERR_OK &&
  556. !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
  557. retcode = ERR_INVAL;
  558. printf("Flash %s error at address %lx\n", prompt,
  559. info->start[sector]);
  560. if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
  561. FLASH_STATUS_PSLBS)) {
  562. puts("Command Sequence Error.\n");
  563. } else if (flash_isset(info, sector, 0,
  564. FLASH_STATUS_ECLBS)) {
  565. puts("Block Erase Error.\n");
  566. retcode = ERR_NOT_ERASED;
  567. } else if (flash_isset(info, sector, 0,
  568. FLASH_STATUS_PSLBS)) {
  569. puts("Locking Error\n");
  570. }
  571. if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
  572. puts("Block locked.\n");
  573. retcode = ERR_PROTECTED;
  574. }
  575. if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
  576. puts("Vpp Low Error.\n");
  577. }
  578. flash_write_cmd(info, sector, 0, info->cmd_reset);
  579. udelay(1);
  580. break;
  581. default:
  582. break;
  583. }
  584. return retcode;
  585. }
  586. static int use_flash_status_poll(flash_info_t *info)
  587. {
  588. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  589. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  590. info->vendor == CFI_CMDSET_AMD_STANDARD)
  591. return 1;
  592. #endif
  593. return 0;
  594. }
  595. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  596. ulong tout, char *prompt)
  597. {
  598. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  599. ulong start;
  600. int ready;
  601. #if CONFIG_SYS_HZ != 1000
  602. /* Avoid overflow for large HZ */
  603. if ((ulong)CONFIG_SYS_HZ > 100000)
  604. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  605. else
  606. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  607. #endif
  608. /* Wait for command completion */
  609. #ifdef CONFIG_SYS_LOW_RES_TIMER
  610. reset_timer();
  611. #endif
  612. start = get_timer(0);
  613. WATCHDOG_RESET();
  614. while (1) {
  615. switch (info->portwidth) {
  616. case FLASH_CFI_8BIT:
  617. ready = flash_read8(dst) == flash_read8(src);
  618. break;
  619. case FLASH_CFI_16BIT:
  620. ready = flash_read16(dst) == flash_read16(src);
  621. break;
  622. case FLASH_CFI_32BIT:
  623. ready = flash_read32(dst) == flash_read32(src);
  624. break;
  625. case FLASH_CFI_64BIT:
  626. ready = flash_read64(dst) == flash_read64(src);
  627. break;
  628. default:
  629. ready = 0;
  630. break;
  631. }
  632. if (ready)
  633. break;
  634. if (get_timer(start) > tout) {
  635. printf("Flash %s timeout at address %lx data %lx\n",
  636. prompt, (ulong)dst, (ulong)flash_read8(dst));
  637. return ERR_TIMEOUT;
  638. }
  639. udelay(1); /* also triggers watchdog */
  640. }
  641. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  642. return ERR_OK;
  643. }
  644. /*-----------------------------------------------------------------------
  645. */
  646. static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
  647. {
  648. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  649. unsigned short w;
  650. unsigned int l;
  651. unsigned long long ll;
  652. #endif
  653. switch (info->portwidth) {
  654. case FLASH_CFI_8BIT:
  655. cword->w8 = c;
  656. break;
  657. case FLASH_CFI_16BIT:
  658. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  659. w = c;
  660. w <<= 8;
  661. cword->w16 = (cword->w16 >> 8) | w;
  662. #else
  663. cword->w16 = (cword->w16 << 8) | c;
  664. #endif
  665. break;
  666. case FLASH_CFI_32BIT:
  667. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  668. l = c;
  669. l <<= 24;
  670. cword->w32 = (cword->w32 >> 8) | l;
  671. #else
  672. cword->w32 = (cword->w32 << 8) | c;
  673. #endif
  674. break;
  675. case FLASH_CFI_64BIT:
  676. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  677. ll = c;
  678. ll <<= 56;
  679. cword->w64 = (cword->w64 >> 8) | ll;
  680. #else
  681. cword->w64 = (cword->w64 << 8) | c;
  682. #endif
  683. break;
  684. }
  685. }
  686. /*
  687. * Loop through the sector table starting from the previously found sector.
  688. * Searches forwards or backwards, dependent on the passed address.
  689. */
  690. static flash_sect_t find_sector(flash_info_t *info, ulong addr)
  691. {
  692. static flash_sect_t saved_sector; /* previously found sector */
  693. static flash_info_t *saved_info; /* previously used flash bank */
  694. flash_sect_t sector = saved_sector;
  695. if (info != saved_info || sector >= info->sector_count)
  696. sector = 0;
  697. while ((sector < info->sector_count - 1) &&
  698. (info->start[sector] < addr))
  699. sector++;
  700. while ((info->start[sector] > addr) && (sector > 0))
  701. /*
  702. * also decrements the sector in case of an overshot
  703. * in the first loop
  704. */
  705. sector--;
  706. saved_sector = sector;
  707. saved_info = info;
  708. return sector;
  709. }
  710. /*-----------------------------------------------------------------------
  711. */
  712. static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
  713. {
  714. void *dstaddr = (void *)dest;
  715. int flag;
  716. flash_sect_t sect = 0;
  717. char sect_found = 0;
  718. /* Check if Flash is (sufficiently) erased */
  719. switch (info->portwidth) {
  720. case FLASH_CFI_8BIT:
  721. flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
  722. break;
  723. case FLASH_CFI_16BIT:
  724. flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
  725. break;
  726. case FLASH_CFI_32BIT:
  727. flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
  728. break;
  729. case FLASH_CFI_64BIT:
  730. flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
  731. break;
  732. default:
  733. flag = 0;
  734. break;
  735. }
  736. if (!flag)
  737. return ERR_NOT_ERASED;
  738. /* Disable interrupts which might cause a timeout here */
  739. flag = disable_interrupts();
  740. switch (info->vendor) {
  741. case CFI_CMDSET_INTEL_PROG_REGIONS:
  742. case CFI_CMDSET_INTEL_EXTENDED:
  743. case CFI_CMDSET_INTEL_STANDARD:
  744. flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  745. flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
  746. break;
  747. case CFI_CMDSET_AMD_EXTENDED:
  748. case CFI_CMDSET_AMD_STANDARD:
  749. sect = find_sector(info, dest);
  750. flash_unlock_seq(info, sect);
  751. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  752. sect_found = 1;
  753. break;
  754. #ifdef CONFIG_FLASH_CFI_LEGACY
  755. case CFI_CMDSET_AMD_LEGACY:
  756. sect = find_sector(info, dest);
  757. flash_unlock_seq(info, 0);
  758. flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  759. sect_found = 1;
  760. break;
  761. #endif
  762. }
  763. switch (info->portwidth) {
  764. case FLASH_CFI_8BIT:
  765. flash_write8(cword.w8, dstaddr);
  766. break;
  767. case FLASH_CFI_16BIT:
  768. flash_write16(cword.w16, dstaddr);
  769. break;
  770. case FLASH_CFI_32BIT:
  771. flash_write32(cword.w32, dstaddr);
  772. break;
  773. case FLASH_CFI_64BIT:
  774. flash_write64(cword.w64, dstaddr);
  775. break;
  776. }
  777. /* re-enable interrupts if necessary */
  778. if (flag)
  779. enable_interrupts();
  780. if (!sect_found)
  781. sect = find_sector(info, dest);
  782. if (use_flash_status_poll(info))
  783. return flash_status_poll(info, &cword, dstaddr,
  784. info->write_tout, "write");
  785. else
  786. return flash_full_status_check(info, sect,
  787. info->write_tout, "write");
  788. }
  789. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  790. static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
  791. int len)
  792. {
  793. flash_sect_t sector;
  794. int cnt;
  795. int retcode;
  796. u8 *src = cp;
  797. u8 *dst = (u8 *)dest;
  798. u8 *dst2 = dst;
  799. int flag = 1;
  800. uint offset = 0;
  801. unsigned int shift;
  802. uchar write_cmd;
  803. switch (info->portwidth) {
  804. case FLASH_CFI_8BIT:
  805. shift = 0;
  806. break;
  807. case FLASH_CFI_16BIT:
  808. shift = 1;
  809. break;
  810. case FLASH_CFI_32BIT:
  811. shift = 2;
  812. break;
  813. case FLASH_CFI_64BIT:
  814. shift = 3;
  815. break;
  816. default:
  817. retcode = ERR_INVAL;
  818. goto out_unmap;
  819. }
  820. cnt = len >> shift;
  821. while ((cnt-- > 0) && (flag == 1)) {
  822. switch (info->portwidth) {
  823. case FLASH_CFI_8BIT:
  824. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  825. flash_read8(src));
  826. src += 1, dst2 += 1;
  827. break;
  828. case FLASH_CFI_16BIT:
  829. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  830. flash_read16(src));
  831. src += 2, dst2 += 2;
  832. break;
  833. case FLASH_CFI_32BIT:
  834. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  835. flash_read32(src));
  836. src += 4, dst2 += 4;
  837. break;
  838. case FLASH_CFI_64BIT:
  839. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  840. flash_read64(src));
  841. src += 8, dst2 += 8;
  842. break;
  843. }
  844. }
  845. if (!flag) {
  846. retcode = ERR_NOT_ERASED;
  847. goto out_unmap;
  848. }
  849. src = cp;
  850. sector = find_sector(info, dest);
  851. switch (info->vendor) {
  852. case CFI_CMDSET_INTEL_PROG_REGIONS:
  853. case CFI_CMDSET_INTEL_STANDARD:
  854. case CFI_CMDSET_INTEL_EXTENDED:
  855. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  856. FLASH_CMD_WRITE_BUFFER_PROG :
  857. FLASH_CMD_WRITE_TO_BUFFER;
  858. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  859. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  860. flash_write_cmd(info, sector, 0, write_cmd);
  861. retcode = flash_status_check(info, sector,
  862. info->buffer_write_tout,
  863. "write to buffer");
  864. if (retcode == ERR_OK) {
  865. /* reduce the number of loops by the width of
  866. * the port
  867. */
  868. cnt = len >> shift;
  869. flash_write_cmd(info, sector, 0, cnt - 1);
  870. while (cnt-- > 0) {
  871. switch (info->portwidth) {
  872. case FLASH_CFI_8BIT:
  873. flash_write8(flash_read8(src), dst);
  874. src += 1, dst += 1;
  875. break;
  876. case FLASH_CFI_16BIT:
  877. flash_write16(flash_read16(src), dst);
  878. src += 2, dst += 2;
  879. break;
  880. case FLASH_CFI_32BIT:
  881. flash_write32(flash_read32(src), dst);
  882. src += 4, dst += 4;
  883. break;
  884. case FLASH_CFI_64BIT:
  885. flash_write64(flash_read64(src), dst);
  886. src += 8, dst += 8;
  887. break;
  888. default:
  889. retcode = ERR_INVAL;
  890. goto out_unmap;
  891. }
  892. }
  893. flash_write_cmd(info, sector, 0,
  894. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  895. retcode = flash_full_status_check(
  896. info, sector, info->buffer_write_tout,
  897. "buffer write");
  898. }
  899. break;
  900. case CFI_CMDSET_AMD_STANDARD:
  901. case CFI_CMDSET_AMD_EXTENDED:
  902. flash_unlock_seq(info, sector);
  903. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  904. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  905. #endif
  906. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  907. cnt = len >> shift;
  908. flash_write_cmd(info, sector, offset, cnt - 1);
  909. switch (info->portwidth) {
  910. case FLASH_CFI_8BIT:
  911. while (cnt-- > 0) {
  912. flash_write8(flash_read8(src), dst);
  913. src += 1, dst += 1;
  914. }
  915. break;
  916. case FLASH_CFI_16BIT:
  917. while (cnt-- > 0) {
  918. flash_write16(flash_read16(src), dst);
  919. src += 2, dst += 2;
  920. }
  921. break;
  922. case FLASH_CFI_32BIT:
  923. while (cnt-- > 0) {
  924. flash_write32(flash_read32(src), dst);
  925. src += 4, dst += 4;
  926. }
  927. break;
  928. case FLASH_CFI_64BIT:
  929. while (cnt-- > 0) {
  930. flash_write64(flash_read64(src), dst);
  931. src += 8, dst += 8;
  932. }
  933. break;
  934. default:
  935. retcode = ERR_INVAL;
  936. goto out_unmap;
  937. }
  938. flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  939. if (use_flash_status_poll(info))
  940. retcode = flash_status_poll(info, src - (1 << shift),
  941. dst - (1 << shift),
  942. info->buffer_write_tout,
  943. "buffer write");
  944. else
  945. retcode = flash_full_status_check(info, sector,
  946. info->buffer_write_tout,
  947. "buffer write");
  948. break;
  949. default:
  950. debug("Unknown Command Set\n");
  951. retcode = ERR_INVAL;
  952. break;
  953. }
  954. out_unmap:
  955. return retcode;
  956. }
  957. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  958. /*-----------------------------------------------------------------------
  959. */
  960. int flash_erase(flash_info_t *info, int s_first, int s_last)
  961. {
  962. int rcode = 0;
  963. int prot;
  964. flash_sect_t sect;
  965. int st;
  966. if (info->flash_id != FLASH_MAN_CFI) {
  967. puts("Can't erase unknown flash type - aborted\n");
  968. return 1;
  969. }
  970. if (s_first < 0 || s_first > s_last) {
  971. puts("- no sectors to erase\n");
  972. return 1;
  973. }
  974. prot = 0;
  975. for (sect = s_first; sect <= s_last; ++sect)
  976. if (info->protect[sect])
  977. prot++;
  978. if (prot) {
  979. printf("- Warning: %d protected sectors will not be erased!\n",
  980. prot);
  981. } else if (flash_verbose) {
  982. putc('\n');
  983. }
  984. for (sect = s_first; sect <= s_last; sect++) {
  985. if (ctrlc()) {
  986. printf("\n");
  987. return 1;
  988. }
  989. if (info->protect[sect] == 0) { /* not protected */
  990. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  991. int k;
  992. int size;
  993. int erased;
  994. u32 *flash;
  995. /*
  996. * Check if whole sector is erased
  997. */
  998. size = flash_sector_size(info, sect);
  999. erased = 1;
  1000. flash = (u32 *)info->start[sect];
  1001. /* divide by 4 for longword access */
  1002. size = size >> 2;
  1003. for (k = 0; k < size; k++) {
  1004. if (flash_read32(flash++) != 0xffffffff) {
  1005. erased = 0;
  1006. break;
  1007. }
  1008. }
  1009. if (erased) {
  1010. if (flash_verbose)
  1011. putc(',');
  1012. continue;
  1013. }
  1014. #endif
  1015. switch (info->vendor) {
  1016. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1017. case CFI_CMDSET_INTEL_STANDARD:
  1018. case CFI_CMDSET_INTEL_EXTENDED:
  1019. flash_write_cmd(info, sect, 0,
  1020. FLASH_CMD_CLEAR_STATUS);
  1021. flash_write_cmd(info, sect, 0,
  1022. FLASH_CMD_BLOCK_ERASE);
  1023. flash_write_cmd(info, sect, 0,
  1024. FLASH_CMD_ERASE_CONFIRM);
  1025. break;
  1026. case CFI_CMDSET_AMD_STANDARD:
  1027. case CFI_CMDSET_AMD_EXTENDED:
  1028. flash_unlock_seq(info, sect);
  1029. flash_write_cmd(info, sect,
  1030. info->addr_unlock1,
  1031. AMD_CMD_ERASE_START);
  1032. flash_unlock_seq(info, sect);
  1033. flash_write_cmd(info, sect, 0,
  1034. info->cmd_erase_sector);
  1035. break;
  1036. #ifdef CONFIG_FLASH_CFI_LEGACY
  1037. case CFI_CMDSET_AMD_LEGACY:
  1038. flash_unlock_seq(info, 0);
  1039. flash_write_cmd(info, 0, info->addr_unlock1,
  1040. AMD_CMD_ERASE_START);
  1041. flash_unlock_seq(info, 0);
  1042. flash_write_cmd(info, sect, 0,
  1043. AMD_CMD_ERASE_SECTOR);
  1044. break;
  1045. #endif
  1046. default:
  1047. debug("Unknown flash vendor %d\n",
  1048. info->vendor);
  1049. break;
  1050. }
  1051. if (use_flash_status_poll(info)) {
  1052. cfiword_t cword;
  1053. void *dest;
  1054. cword.w64 = 0xffffffffffffffffULL;
  1055. dest = flash_map(info, sect, 0);
  1056. st = flash_status_poll(info, &cword, dest,
  1057. info->erase_blk_tout,
  1058. "erase");
  1059. flash_unmap(info, sect, 0, dest);
  1060. } else {
  1061. st = flash_full_status_check(info, sect,
  1062. info->erase_blk_tout,
  1063. "erase");
  1064. }
  1065. if (st)
  1066. rcode = 1;
  1067. else if (flash_verbose)
  1068. putc('.');
  1069. }
  1070. }
  1071. if (flash_verbose)
  1072. puts(" done\n");
  1073. return rcode;
  1074. }
  1075. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1076. static int sector_erased(flash_info_t *info, int i)
  1077. {
  1078. int k;
  1079. int size;
  1080. u32 *flash;
  1081. /*
  1082. * Check if whole sector is erased
  1083. */
  1084. size = flash_sector_size(info, i);
  1085. flash = (u32 *)info->start[i];
  1086. /* divide by 4 for longword access */
  1087. size = size >> 2;
  1088. for (k = 0; k < size; k++) {
  1089. if (flash_read32(flash++) != 0xffffffff)
  1090. return 0; /* not erased */
  1091. }
  1092. return 1; /* erased */
  1093. }
  1094. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1095. void flash_print_info(flash_info_t *info)
  1096. {
  1097. int i;
  1098. if (info->flash_id != FLASH_MAN_CFI) {
  1099. puts("missing or unknown FLASH type\n");
  1100. return;
  1101. }
  1102. printf("%s flash (%d x %d)",
  1103. info->name,
  1104. (info->portwidth << 3), (info->chipwidth << 3));
  1105. if (info->size < 1024 * 1024)
  1106. printf(" Size: %ld kB in %d Sectors\n",
  1107. info->size >> 10, info->sector_count);
  1108. else
  1109. printf(" Size: %ld MB in %d Sectors\n",
  1110. info->size >> 20, info->sector_count);
  1111. printf(" ");
  1112. switch (info->vendor) {
  1113. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1114. printf("Intel Prog Regions");
  1115. break;
  1116. case CFI_CMDSET_INTEL_STANDARD:
  1117. printf("Intel Standard");
  1118. break;
  1119. case CFI_CMDSET_INTEL_EXTENDED:
  1120. printf("Intel Extended");
  1121. break;
  1122. case CFI_CMDSET_AMD_STANDARD:
  1123. printf("AMD Standard");
  1124. break;
  1125. case CFI_CMDSET_AMD_EXTENDED:
  1126. printf("AMD Extended");
  1127. break;
  1128. #ifdef CONFIG_FLASH_CFI_LEGACY
  1129. case CFI_CMDSET_AMD_LEGACY:
  1130. printf("AMD Legacy");
  1131. break;
  1132. #endif
  1133. default:
  1134. printf("Unknown (%d)", info->vendor);
  1135. break;
  1136. }
  1137. printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1138. info->manufacturer_id);
  1139. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1140. info->device_id);
  1141. if ((info->device_id & 0xff) == 0x7E) {
  1142. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1143. info->device_id2);
  1144. }
  1145. if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
  1146. printf("\n Advanced Sector Protection (PPB) enabled");
  1147. printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1148. info->erase_blk_tout, info->write_tout);
  1149. if (info->buffer_size > 1) {
  1150. printf(" Buffer write timeout: %ld ms, ",
  1151. info->buffer_write_tout);
  1152. printf("buffer size: %d bytes\n", info->buffer_size);
  1153. }
  1154. puts("\n Sector Start Addresses:");
  1155. for (i = 0; i < info->sector_count; ++i) {
  1156. if (ctrlc())
  1157. break;
  1158. if ((i % 5) == 0)
  1159. putc('\n');
  1160. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1161. /* print empty and read-only info */
  1162. printf(" %08lX %c %s ",
  1163. info->start[i],
  1164. sector_erased(info, i) ? 'E' : ' ',
  1165. info->protect[i] ? "RO" : " ");
  1166. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1167. printf(" %08lX %s ",
  1168. info->start[i],
  1169. info->protect[i] ? "RO" : " ");
  1170. #endif
  1171. }
  1172. putc('\n');
  1173. }
  1174. /*-----------------------------------------------------------------------
  1175. * This is used in a few places in write_buf() to show programming
  1176. * progress. Making it a function is nasty because it needs to do side
  1177. * effect updates to digit and dots. Repeated code is nasty too, so
  1178. * we define it once here.
  1179. */
  1180. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1181. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1182. if (flash_verbose) { \
  1183. dots -= dots_sub; \
  1184. if (scale > 0 && dots <= 0) { \
  1185. if ((digit % 5) == 0) \
  1186. printf("%d", digit / 5); \
  1187. else \
  1188. putc('.'); \
  1189. digit--; \
  1190. dots += scale; \
  1191. } \
  1192. }
  1193. #else
  1194. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1195. #endif
  1196. /*-----------------------------------------------------------------------
  1197. * Copy memory to flash, returns:
  1198. * 0 - OK
  1199. * 1 - write timeout
  1200. * 2 - Flash not erased
  1201. */
  1202. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  1203. {
  1204. ulong wp;
  1205. uchar *p;
  1206. int aln;
  1207. cfiword_t cword;
  1208. int i, rc;
  1209. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1210. int buffered_size;
  1211. #endif
  1212. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1213. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1214. int scale = 0;
  1215. int dots = 0;
  1216. /*
  1217. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1218. */
  1219. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1220. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1221. CONFIG_FLASH_SHOW_PROGRESS);
  1222. }
  1223. #endif
  1224. /* get lower aligned address */
  1225. wp = (addr & ~(info->portwidth - 1));
  1226. /* handle unaligned start */
  1227. aln = addr - wp;
  1228. if (aln != 0) {
  1229. cword.w32 = 0;
  1230. p = (uchar *)wp;
  1231. for (i = 0; i < aln; ++i)
  1232. flash_add_byte(info, &cword, flash_read8(p + i));
  1233. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1234. flash_add_byte(info, &cword, *src++);
  1235. cnt--;
  1236. }
  1237. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1238. flash_add_byte(info, &cword, flash_read8(p + i));
  1239. rc = flash_write_cfiword(info, wp, cword);
  1240. if (rc != 0)
  1241. return rc;
  1242. wp += i;
  1243. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1244. }
  1245. /* handle the aligned part */
  1246. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1247. buffered_size = (info->portwidth / info->chipwidth);
  1248. buffered_size *= info->buffer_size;
  1249. while (cnt >= info->portwidth) {
  1250. /* prohibit buffer write when buffer_size is 1 */
  1251. if (info->buffer_size == 1) {
  1252. cword.w32 = 0;
  1253. for (i = 0; i < info->portwidth; i++)
  1254. flash_add_byte(info, &cword, *src++);
  1255. rc = flash_write_cfiword(info, wp, cword);
  1256. if (rc != 0)
  1257. return rc;
  1258. wp += info->portwidth;
  1259. cnt -= info->portwidth;
  1260. continue;
  1261. }
  1262. /* write buffer until next buffered_size aligned boundary */
  1263. i = buffered_size - (wp % buffered_size);
  1264. if (i > cnt)
  1265. i = cnt;
  1266. rc = flash_write_cfibuffer(info, wp, src, i);
  1267. if (rc != ERR_OK)
  1268. return rc;
  1269. i -= i & (info->portwidth - 1);
  1270. wp += i;
  1271. src += i;
  1272. cnt -= i;
  1273. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1274. /* Only check every once in a while */
  1275. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1276. return ERR_ABORTED;
  1277. }
  1278. #else
  1279. while (cnt >= info->portwidth) {
  1280. cword.w32 = 0;
  1281. for (i = 0; i < info->portwidth; i++)
  1282. flash_add_byte(info, &cword, *src++);
  1283. rc = flash_write_cfiword(info, wp, cword);
  1284. if (rc != 0)
  1285. return rc;
  1286. wp += info->portwidth;
  1287. cnt -= info->portwidth;
  1288. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1289. /* Only check every once in a while */
  1290. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1291. return ERR_ABORTED;
  1292. }
  1293. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1294. if (cnt == 0)
  1295. return (0);
  1296. /*
  1297. * handle unaligned tail bytes
  1298. */
  1299. cword.w32 = 0;
  1300. p = (uchar *)wp;
  1301. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1302. flash_add_byte(info, &cword, *src++);
  1303. --cnt;
  1304. }
  1305. for (; i < info->portwidth; ++i)
  1306. flash_add_byte(info, &cword, flash_read8(p + i));
  1307. return flash_write_cfiword(info, wp, cword);
  1308. }
  1309. static inline int manufact_match(flash_info_t *info, u32 manu)
  1310. {
  1311. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1312. }
  1313. /*-----------------------------------------------------------------------
  1314. */
  1315. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1316. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1317. {
  1318. if (manufact_match(info, INTEL_MANUFACT) &&
  1319. info->device_id == NUMONYX_256MBIT) {
  1320. /*
  1321. * see errata called
  1322. * "Numonyx Axcell P33/P30 Specification Update" :)
  1323. */
  1324. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1325. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1326. prot)) {
  1327. /*
  1328. * cmd must come before FLASH_CMD_PROTECT + 20us
  1329. * Disable interrupts which might cause a timeout here.
  1330. */
  1331. int flag = disable_interrupts();
  1332. unsigned short cmd;
  1333. if (prot)
  1334. cmd = FLASH_CMD_PROTECT_SET;
  1335. else
  1336. cmd = FLASH_CMD_PROTECT_CLEAR;
  1337. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1338. flash_write_cmd(info, sector, 0, cmd);
  1339. /* re-enable interrupts if necessary */
  1340. if (flag)
  1341. enable_interrupts();
  1342. }
  1343. return 1;
  1344. }
  1345. return 0;
  1346. }
  1347. int flash_real_protect(flash_info_t *info, long sector, int prot)
  1348. {
  1349. int retcode = 0;
  1350. switch (info->vendor) {
  1351. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1352. case CFI_CMDSET_INTEL_STANDARD:
  1353. case CFI_CMDSET_INTEL_EXTENDED:
  1354. if (!cfi_protect_bugfix(info, sector, prot)) {
  1355. flash_write_cmd(info, sector, 0,
  1356. FLASH_CMD_CLEAR_STATUS);
  1357. flash_write_cmd(info, sector, 0,
  1358. FLASH_CMD_PROTECT);
  1359. if (prot)
  1360. flash_write_cmd(info, sector, 0,
  1361. FLASH_CMD_PROTECT_SET);
  1362. else
  1363. flash_write_cmd(info, sector, 0,
  1364. FLASH_CMD_PROTECT_CLEAR);
  1365. }
  1366. break;
  1367. case CFI_CMDSET_AMD_EXTENDED:
  1368. case CFI_CMDSET_AMD_STANDARD:
  1369. /* U-Boot only checks the first byte */
  1370. if (manufact_match(info, ATM_MANUFACT)) {
  1371. if (prot) {
  1372. flash_unlock_seq(info, 0);
  1373. flash_write_cmd(info, 0,
  1374. info->addr_unlock1,
  1375. ATM_CMD_SOFTLOCK_START);
  1376. flash_unlock_seq(info, 0);
  1377. flash_write_cmd(info, sector, 0,
  1378. ATM_CMD_LOCK_SECT);
  1379. } else {
  1380. flash_write_cmd(info, 0,
  1381. info->addr_unlock1,
  1382. AMD_CMD_UNLOCK_START);
  1383. if (info->device_id == ATM_ID_BV6416)
  1384. flash_write_cmd(info, sector,
  1385. 0, ATM_CMD_UNLOCK_SECT);
  1386. }
  1387. }
  1388. if (info->legacy_unlock) {
  1389. int flag = disable_interrupts();
  1390. int lock_flag;
  1391. flash_unlock_seq(info, 0);
  1392. flash_write_cmd(info, 0, info->addr_unlock1,
  1393. AMD_CMD_SET_PPB_ENTRY);
  1394. lock_flag = flash_isset(info, sector, 0, 0x01);
  1395. if (prot) {
  1396. if (lock_flag) {
  1397. flash_write_cmd(info, sector, 0,
  1398. AMD_CMD_PPB_LOCK_BC1);
  1399. flash_write_cmd(info, sector, 0,
  1400. AMD_CMD_PPB_LOCK_BC2);
  1401. }
  1402. debug("sector %ld %slocked\n", sector,
  1403. lock_flag ? "" : "already ");
  1404. } else {
  1405. if (!lock_flag) {
  1406. debug("unlock %ld\n", sector);
  1407. flash_write_cmd(info, 0, 0,
  1408. AMD_CMD_PPB_UNLOCK_BC1);
  1409. flash_write_cmd(info, 0, 0,
  1410. AMD_CMD_PPB_UNLOCK_BC2);
  1411. }
  1412. debug("sector %ld %sunlocked\n", sector,
  1413. !lock_flag ? "" : "already ");
  1414. }
  1415. if (flag)
  1416. enable_interrupts();
  1417. if (flash_status_check(info, sector,
  1418. info->erase_blk_tout,
  1419. prot ? "protect" : "unprotect"))
  1420. printf("status check error\n");
  1421. flash_write_cmd(info, 0, 0,
  1422. AMD_CMD_SET_PPB_EXIT_BC1);
  1423. flash_write_cmd(info, 0, 0,
  1424. AMD_CMD_SET_PPB_EXIT_BC2);
  1425. }
  1426. break;
  1427. #ifdef CONFIG_FLASH_CFI_LEGACY
  1428. case CFI_CMDSET_AMD_LEGACY:
  1429. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1430. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1431. if (prot)
  1432. flash_write_cmd(info, sector, 0,
  1433. FLASH_CMD_PROTECT_SET);
  1434. else
  1435. flash_write_cmd(info, sector, 0,
  1436. FLASH_CMD_PROTECT_CLEAR);
  1437. #endif
  1438. };
  1439. /*
  1440. * Flash needs to be in status register read mode for
  1441. * flash_full_status_check() to work correctly
  1442. */
  1443. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1444. retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
  1445. prot ? "protect" : "unprotect");
  1446. if (retcode == 0) {
  1447. info->protect[sector] = prot;
  1448. /*
  1449. * On some of Intel's flash chips (marked via legacy_unlock)
  1450. * unprotect unprotects all locking.
  1451. */
  1452. if (prot == 0 && info->legacy_unlock) {
  1453. flash_sect_t i;
  1454. for (i = 0; i < info->sector_count; i++) {
  1455. if (info->protect[i])
  1456. flash_real_protect(info, i, 1);
  1457. }
  1458. }
  1459. }
  1460. return retcode;
  1461. }
  1462. /*-----------------------------------------------------------------------
  1463. * flash_read_user_serial - read the OneTimeProgramming cells
  1464. */
  1465. void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
  1466. int len)
  1467. {
  1468. uchar *src;
  1469. uchar *dst;
  1470. dst = buffer;
  1471. src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
  1472. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1473. memcpy(dst, src + offset, len);
  1474. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1475. udelay(1);
  1476. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1477. }
  1478. /*
  1479. * flash_read_factory_serial - read the device Id from the protection area
  1480. */
  1481. void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
  1482. int len)
  1483. {
  1484. uchar *src;
  1485. src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1486. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1487. memcpy(buffer, src + offset, len);
  1488. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1489. udelay(1);
  1490. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1491. }
  1492. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1493. /*-----------------------------------------------------------------------
  1494. * Reverse the order of the erase regions in the CFI QRY structure.
  1495. * This is needed for chips that are either a) correctly detected as
  1496. * top-boot, or b) buggy.
  1497. */
  1498. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1499. {
  1500. unsigned int i, j;
  1501. u32 tmp;
  1502. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1503. tmp = get_unaligned(&qry->erase_region_info[i]);
  1504. put_unaligned(get_unaligned(&qry->erase_region_info[j]),
  1505. &qry->erase_region_info[i]);
  1506. put_unaligned(tmp, &qry->erase_region_info[j]);
  1507. }
  1508. }
  1509. /*-----------------------------------------------------------------------
  1510. * read jedec ids from device and set corresponding fields in info struct
  1511. *
  1512. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1513. *
  1514. */
  1515. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1516. {
  1517. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1518. udelay(1);
  1519. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1520. udelay(1000); /* some flash are slow to respond */
  1521. info->manufacturer_id = flash_read_uchar(info,
  1522. FLASH_OFFSET_MANUFACTURER_ID);
  1523. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1524. flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
  1525. flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
  1526. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1527. }
  1528. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1529. {
  1530. info->cmd_reset = FLASH_CMD_RESET;
  1531. cmdset_intel_read_jedec_ids(info);
  1532. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1533. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1534. /* read legacy lock/unlock bit from intel flash */
  1535. if (info->ext_addr) {
  1536. info->legacy_unlock =
  1537. flash_read_uchar(info, info->ext_addr + 5) & 0x08;
  1538. }
  1539. #endif
  1540. return 0;
  1541. }
  1542. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1543. {
  1544. ushort bank_id = 0;
  1545. uchar manu_id;
  1546. uchar feature;
  1547. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1548. flash_unlock_seq(info, 0);
  1549. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1550. udelay(1000); /* some flash are slow to respond */
  1551. manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
  1552. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1553. while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
  1554. bank_id += 0x100;
  1555. manu_id = flash_read_uchar(info,
  1556. bank_id | FLASH_OFFSET_MANUFACTURER_ID);
  1557. }
  1558. info->manufacturer_id = manu_id;
  1559. debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
  1560. info->ext_addr, info->cfi_version);
  1561. if (info->ext_addr && info->cfi_version >= 0x3134) {
  1562. /* read software feature (at 0x53) */
  1563. feature = flash_read_uchar(info, info->ext_addr + 0x13);
  1564. debug("feature = 0x%x\n", feature);
  1565. info->sr_supported = feature & 0x1;
  1566. }
  1567. switch (info->chipwidth) {
  1568. case FLASH_CFI_8BIT:
  1569. info->device_id = flash_read_uchar(info,
  1570. FLASH_OFFSET_DEVICE_ID);
  1571. if (info->device_id == 0x7E) {
  1572. /* AMD 3-byte (expanded) device ids */
  1573. info->device_id2 = flash_read_uchar(info,
  1574. FLASH_OFFSET_DEVICE_ID2);
  1575. info->device_id2 <<= 8;
  1576. info->device_id2 |= flash_read_uchar(info,
  1577. FLASH_OFFSET_DEVICE_ID3);
  1578. }
  1579. break;
  1580. case FLASH_CFI_16BIT:
  1581. info->device_id = flash_read_word(info,
  1582. FLASH_OFFSET_DEVICE_ID);
  1583. if ((info->device_id & 0xff) == 0x7E) {
  1584. /* AMD 3-byte (expanded) device ids */
  1585. info->device_id2 = flash_read_uchar(info,
  1586. FLASH_OFFSET_DEVICE_ID2);
  1587. info->device_id2 <<= 8;
  1588. info->device_id2 |= flash_read_uchar(info,
  1589. FLASH_OFFSET_DEVICE_ID3);
  1590. }
  1591. break;
  1592. default:
  1593. break;
  1594. }
  1595. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1596. udelay(1);
  1597. }
  1598. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1599. {
  1600. info->cmd_reset = AMD_CMD_RESET;
  1601. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1602. cmdset_amd_read_jedec_ids(info);
  1603. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1604. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1605. if (info->ext_addr) {
  1606. /* read sector protect/unprotect scheme (at 0x49) */
  1607. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1608. info->legacy_unlock = 1;
  1609. }
  1610. #endif
  1611. return 0;
  1612. }
  1613. #ifdef CONFIG_FLASH_CFI_LEGACY
  1614. static void flash_read_jedec_ids(flash_info_t *info)
  1615. {
  1616. info->manufacturer_id = 0;
  1617. info->device_id = 0;
  1618. info->device_id2 = 0;
  1619. switch (info->vendor) {
  1620. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1621. case CFI_CMDSET_INTEL_STANDARD:
  1622. case CFI_CMDSET_INTEL_EXTENDED:
  1623. cmdset_intel_read_jedec_ids(info);
  1624. break;
  1625. case CFI_CMDSET_AMD_STANDARD:
  1626. case CFI_CMDSET_AMD_EXTENDED:
  1627. cmdset_amd_read_jedec_ids(info);
  1628. break;
  1629. default:
  1630. break;
  1631. }
  1632. }
  1633. /*-----------------------------------------------------------------------
  1634. * Call board code to request info about non-CFI flash.
  1635. * board_flash_get_legacy needs to fill in at least:
  1636. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1637. */
  1638. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1639. {
  1640. flash_info_t *info = &flash_info[banknum];
  1641. if (board_flash_get_legacy(base, banknum, info)) {
  1642. /* board code may have filled info completely. If not, we
  1643. * use JEDEC ID probing.
  1644. */
  1645. if (!info->vendor) {
  1646. int modes[] = {
  1647. CFI_CMDSET_AMD_STANDARD,
  1648. CFI_CMDSET_INTEL_STANDARD
  1649. };
  1650. int i;
  1651. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  1652. info->vendor = modes[i];
  1653. info->start[0] =
  1654. (ulong)map_physmem(base,
  1655. info->portwidth,
  1656. MAP_NOCACHE);
  1657. if (info->portwidth == FLASH_CFI_8BIT &&
  1658. info->interface == FLASH_CFI_X8X16) {
  1659. info->addr_unlock1 = 0x2AAA;
  1660. info->addr_unlock2 = 0x5555;
  1661. } else {
  1662. info->addr_unlock1 = 0x5555;
  1663. info->addr_unlock2 = 0x2AAA;
  1664. }
  1665. flash_read_jedec_ids(info);
  1666. debug("JEDEC PROBE: ID %x %x %x\n",
  1667. info->manufacturer_id,
  1668. info->device_id,
  1669. info->device_id2);
  1670. if (jedec_flash_match(info, info->start[0]))
  1671. break;
  1672. unmap_physmem((void *)info->start[0],
  1673. info->portwidth);
  1674. }
  1675. }
  1676. switch (info->vendor) {
  1677. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1678. case CFI_CMDSET_INTEL_STANDARD:
  1679. case CFI_CMDSET_INTEL_EXTENDED:
  1680. info->cmd_reset = FLASH_CMD_RESET;
  1681. break;
  1682. case CFI_CMDSET_AMD_STANDARD:
  1683. case CFI_CMDSET_AMD_EXTENDED:
  1684. case CFI_CMDSET_AMD_LEGACY:
  1685. info->cmd_reset = AMD_CMD_RESET;
  1686. break;
  1687. }
  1688. info->flash_id = FLASH_MAN_CFI;
  1689. return 1;
  1690. }
  1691. return 0; /* use CFI */
  1692. }
  1693. #else
  1694. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1695. {
  1696. return 0; /* use CFI */
  1697. }
  1698. #endif
  1699. /*-----------------------------------------------------------------------
  1700. * detect if flash is compatible with the Common Flash Interface (CFI)
  1701. * http://www.jedec.org/download/search/jesd68.pdf
  1702. */
  1703. static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
  1704. size_t len)
  1705. {
  1706. u8 *p = buf;
  1707. unsigned int i;
  1708. for (i = 0; i < len; i++)
  1709. p[i] = flash_read_uchar(info, start + i);
  1710. }
  1711. static void __flash_cmd_reset(flash_info_t *info)
  1712. {
  1713. /*
  1714. * We do not yet know what kind of commandset to use, so we issue
  1715. * the reset command in both Intel and AMD variants, in the hope
  1716. * that AMD flash roms ignore the Intel command.
  1717. */
  1718. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1719. udelay(1);
  1720. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1721. }
  1722. void flash_cmd_reset(flash_info_t *info)
  1723. __attribute__((weak, alias("__flash_cmd_reset")));
  1724. static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1725. {
  1726. int cfi_offset;
  1727. /* Issue FLASH reset command */
  1728. flash_cmd_reset(info);
  1729. for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
  1730. cfi_offset++) {
  1731. flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
  1732. FLASH_CMD_CFI);
  1733. if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
  1734. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
  1735. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1736. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1737. sizeof(struct cfi_qry));
  1738. info->interface = le16_to_cpu(qry->interface_desc);
  1739. /* Some flash chips can support multiple bus widths.
  1740. * In this case, override the interface width and
  1741. * limit it to the port width.
  1742. */
  1743. if ((info->interface == FLASH_CFI_X8X16) &&
  1744. (info->portwidth == FLASH_CFI_8BIT)) {
  1745. debug("Overriding 16-bit interface width to"
  1746. " 8-bit port width\n");
  1747. info->interface = FLASH_CFI_X8;
  1748. } else if ((info->interface == FLASH_CFI_X16X32) &&
  1749. (info->portwidth == FLASH_CFI_16BIT)) {
  1750. debug("Overriding 16-bit interface width to"
  1751. " 16-bit port width\n");
  1752. info->interface = FLASH_CFI_X16;
  1753. }
  1754. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1755. debug("device interface is %d\n",
  1756. info->interface);
  1757. debug("found port %d chip %d chip_lsb %d ",
  1758. info->portwidth, info->chipwidth, info->chip_lsb);
  1759. debug("port %d bits chip %d bits\n",
  1760. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1761. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1762. /* calculate command offsets as in the Linux driver */
  1763. info->addr_unlock1 = 0x555;
  1764. info->addr_unlock2 = 0x2aa;
  1765. /*
  1766. * modify the unlock address if we are
  1767. * in compatibility mode
  1768. */
  1769. if (/* x8/x16 in x8 mode */
  1770. (info->chipwidth == FLASH_CFI_BY8 &&
  1771. info->interface == FLASH_CFI_X8X16) ||
  1772. /* x16/x32 in x16 mode */
  1773. (info->chipwidth == FLASH_CFI_BY16 &&
  1774. info->interface == FLASH_CFI_X16X32)) {
  1775. info->addr_unlock1 = 0xaaa;
  1776. info->addr_unlock2 = 0x555;
  1777. }
  1778. info->name = "CFI conformant";
  1779. return 1;
  1780. }
  1781. }
  1782. return 0;
  1783. }
  1784. static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1785. {
  1786. debug("flash detect cfi\n");
  1787. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1788. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1789. for (info->chipwidth = FLASH_CFI_BY8;
  1790. info->chipwidth <= info->portwidth;
  1791. info->chipwidth <<= 1) {
  1792. /*
  1793. * First, try detection without shifting the addresses
  1794. * for 8bit devices (16bit wide connection)
  1795. */
  1796. info->chip_lsb = 0;
  1797. if (__flash_detect_cfi(info, qry))
  1798. return 1;
  1799. /*
  1800. * Not detected, so let's try with shifting
  1801. * for 8bit devices
  1802. */
  1803. info->chip_lsb = 1;
  1804. if (__flash_detect_cfi(info, qry))
  1805. return 1;
  1806. }
  1807. }
  1808. debug("not found\n");
  1809. return 0;
  1810. }
  1811. /*
  1812. * Manufacturer-specific quirks. Add workarounds for geometry
  1813. * reversal, etc. here.
  1814. */
  1815. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1816. {
  1817. /* check if flash geometry needs reversal */
  1818. if (qry->num_erase_regions > 1) {
  1819. /* reverse geometry if top boot part */
  1820. if (info->cfi_version < 0x3131) {
  1821. /* CFI < 1.1, try to guess from device id */
  1822. if ((info->device_id & 0x80) != 0)
  1823. cfi_reverse_geometry(qry);
  1824. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1825. /* CFI >= 1.1, deduct from top/bottom flag */
  1826. /* note: ext_addr is valid since cfi_version > 0 */
  1827. cfi_reverse_geometry(qry);
  1828. }
  1829. }
  1830. }
  1831. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1832. {
  1833. int reverse_geometry = 0;
  1834. /* Check the "top boot" bit in the PRI */
  1835. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1836. reverse_geometry = 1;
  1837. /* AT49BV6416(T) list the erase regions in the wrong order.
  1838. * However, the device ID is identical with the non-broken
  1839. * AT49BV642D they differ in the high byte.
  1840. */
  1841. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1842. reverse_geometry = !reverse_geometry;
  1843. if (reverse_geometry)
  1844. cfi_reverse_geometry(qry);
  1845. }
  1846. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1847. {
  1848. /* check if flash geometry needs reversal */
  1849. if (qry->num_erase_regions > 1) {
  1850. /* reverse geometry if top boot part */
  1851. if (info->cfi_version < 0x3131) {
  1852. /* CFI < 1.1, guess by device id */
  1853. if (info->device_id == 0x22CA || /* M29W320DT */
  1854. info->device_id == 0x2256 || /* M29W320ET */
  1855. info->device_id == 0x22D7) { /* M29W800DT */
  1856. cfi_reverse_geometry(qry);
  1857. }
  1858. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1859. /* CFI >= 1.1, deduct from top/bottom flag */
  1860. /* note: ext_addr is valid since cfi_version > 0 */
  1861. cfi_reverse_geometry(qry);
  1862. }
  1863. }
  1864. }
  1865. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1866. {
  1867. /*
  1868. * SST, for many recent nor parallel flashes, says they are
  1869. * CFI-conformant. This is not true, since qry struct.
  1870. * reports a std. AMD command set (0x0002), while SST allows to
  1871. * erase two different sector sizes for the same memory.
  1872. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1873. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1874. * Since CFI query detect the 4KB number of sectors, users expects
  1875. * a sector granularity of 4KB, and it is here set.
  1876. */
  1877. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1878. info->device_id == 0x5C23) { /* SST39VF3202B */
  1879. /* set sector granularity to 4KB */
  1880. info->cmd_erase_sector = 0x50;
  1881. }
  1882. }
  1883. static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  1884. {
  1885. /*
  1886. * The M29EW devices seem to report the CFI information wrong
  1887. * when it's in 8 bit mode.
  1888. * There's an app note from Numonyx on this issue.
  1889. * So adjust the buffer size for M29EW while operating in 8-bit mode
  1890. */
  1891. if (qry->max_buf_write_size > 0x8 &&
  1892. info->device_id == 0x7E &&
  1893. (info->device_id2 == 0x2201 ||
  1894. info->device_id2 == 0x2301 ||
  1895. info->device_id2 == 0x2801 ||
  1896. info->device_id2 == 0x4801)) {
  1897. debug("Adjusted buffer size on Numonyx flash");
  1898. debug(" M29EW family in 8 bit mode\n");
  1899. qry->max_buf_write_size = 0x8;
  1900. }
  1901. }
  1902. /*
  1903. * The following code cannot be run from FLASH!
  1904. *
  1905. */
  1906. ulong flash_get_size(phys_addr_t base, int banknum)
  1907. {
  1908. flash_info_t *info = &flash_info[banknum];
  1909. int i, j;
  1910. flash_sect_t sect_cnt;
  1911. phys_addr_t sector;
  1912. unsigned long tmp;
  1913. int size_ratio;
  1914. uchar num_erase_regions;
  1915. int erase_region_size;
  1916. int erase_region_count;
  1917. struct cfi_qry qry;
  1918. unsigned long max_size;
  1919. memset(&qry, 0, sizeof(qry));
  1920. info->ext_addr = 0;
  1921. info->cfi_version = 0;
  1922. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1923. info->legacy_unlock = 0;
  1924. #endif
  1925. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1926. if (flash_detect_cfi(info, &qry)) {
  1927. info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
  1928. info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
  1929. num_erase_regions = qry.num_erase_regions;
  1930. if (info->ext_addr) {
  1931. info->cfi_version = (ushort)flash_read_uchar(info,
  1932. info->ext_addr + 3) << 8;
  1933. info->cfi_version |= (ushort)flash_read_uchar(info,
  1934. info->ext_addr + 4);
  1935. }
  1936. #ifdef DEBUG
  1937. flash_printqry(&qry);
  1938. #endif
  1939. switch (info->vendor) {
  1940. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1941. case CFI_CMDSET_INTEL_STANDARD:
  1942. case CFI_CMDSET_INTEL_EXTENDED:
  1943. cmdset_intel_init(info, &qry);
  1944. break;
  1945. case CFI_CMDSET_AMD_STANDARD:
  1946. case CFI_CMDSET_AMD_EXTENDED:
  1947. cmdset_amd_init(info, &qry);
  1948. break;
  1949. default:
  1950. printf("CFI: Unknown command set 0x%x\n",
  1951. info->vendor);
  1952. /*
  1953. * Unfortunately, this means we don't know how
  1954. * to get the chip back to Read mode. Might
  1955. * as well try an Intel-style reset...
  1956. */
  1957. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1958. return 0;
  1959. }
  1960. /* Do manufacturer-specific fixups */
  1961. switch (info->manufacturer_id) {
  1962. case 0x0001: /* AMD */
  1963. case 0x0037: /* AMIC */
  1964. flash_fixup_amd(info, &qry);
  1965. break;
  1966. case 0x001f:
  1967. flash_fixup_atmel(info, &qry);
  1968. break;
  1969. case 0x0020:
  1970. flash_fixup_stm(info, &qry);
  1971. break;
  1972. case 0x00bf: /* SST */
  1973. flash_fixup_sst(info, &qry);
  1974. break;
  1975. case 0x0089: /* Numonyx */
  1976. flash_fixup_num(info, &qry);
  1977. break;
  1978. }
  1979. debug("manufacturer is %d\n", info->vendor);
  1980. debug("manufacturer id is 0x%x\n", info->manufacturer_id);
  1981. debug("device id is 0x%x\n", info->device_id);
  1982. debug("device id2 is 0x%x\n", info->device_id2);
  1983. debug("cfi version is 0x%04x\n", info->cfi_version);
  1984. size_ratio = info->portwidth / info->chipwidth;
  1985. /* if the chip is x8/x16 reduce the ratio by half */
  1986. if (info->interface == FLASH_CFI_X8X16 &&
  1987. info->chipwidth == FLASH_CFI_BY8) {
  1988. size_ratio >>= 1;
  1989. }
  1990. debug("size_ratio %d port %d bits chip %d bits\n",
  1991. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1992. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1993. info->size = 1 << qry.dev_size;
  1994. /* multiply the size by the number of chips */
  1995. info->size *= size_ratio;
  1996. max_size = cfi_flash_bank_size(banknum);
  1997. if (max_size && info->size > max_size) {
  1998. debug("[truncated from %ldMiB]", info->size >> 20);
  1999. info->size = max_size;
  2000. }
  2001. debug("found %d erase regions\n", num_erase_regions);
  2002. sect_cnt = 0;
  2003. sector = base;
  2004. for (i = 0; i < num_erase_regions; i++) {
  2005. if (i > NUM_ERASE_REGIONS) {
  2006. printf("%d erase regions found, only %d used\n",
  2007. num_erase_regions, NUM_ERASE_REGIONS);
  2008. break;
  2009. }
  2010. tmp = le32_to_cpu(get_unaligned(
  2011. &qry.erase_region_info[i]));
  2012. debug("erase region %u: 0x%08lx\n", i, tmp);
  2013. erase_region_count = (tmp & 0xffff) + 1;
  2014. tmp >>= 16;
  2015. erase_region_size =
  2016. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  2017. debug("erase_region_count = %d ", erase_region_count);
  2018. debug("erase_region_size = %d\n", erase_region_size);
  2019. for (j = 0; j < erase_region_count; j++) {
  2020. if (sector - base >= info->size)
  2021. break;
  2022. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  2023. printf("ERROR: too many flash sectors\n");
  2024. break;
  2025. }
  2026. info->start[sect_cnt] =
  2027. (ulong)map_physmem(sector,
  2028. info->portwidth,
  2029. MAP_NOCACHE);
  2030. sector += (erase_region_size * size_ratio);
  2031. /*
  2032. * Only read protection status from
  2033. * supported devices (intel...)
  2034. */
  2035. switch (info->vendor) {
  2036. case CFI_CMDSET_INTEL_PROG_REGIONS:
  2037. case CFI_CMDSET_INTEL_EXTENDED:
  2038. case CFI_CMDSET_INTEL_STANDARD:
  2039. /*
  2040. * Set flash to read-id mode. Otherwise
  2041. * reading protected status is not
  2042. * guaranteed.
  2043. */
  2044. flash_write_cmd(info, sect_cnt, 0,
  2045. FLASH_CMD_READ_ID);
  2046. info->protect[sect_cnt] =
  2047. flash_isset(info, sect_cnt,
  2048. FLASH_OFFSET_PROTECT,
  2049. FLASH_STATUS_PROTECT);
  2050. flash_write_cmd(info, sect_cnt, 0,
  2051. FLASH_CMD_RESET);
  2052. break;
  2053. case CFI_CMDSET_AMD_EXTENDED:
  2054. case CFI_CMDSET_AMD_STANDARD:
  2055. if (!info->legacy_unlock) {
  2056. /* default: not protected */
  2057. info->protect[sect_cnt] = 0;
  2058. break;
  2059. }
  2060. /* Read protection (PPB) from sector */
  2061. flash_write_cmd(info, 0, 0,
  2062. info->cmd_reset);
  2063. flash_unlock_seq(info, 0);
  2064. flash_write_cmd(info, 0,
  2065. info->addr_unlock1,
  2066. AMD_CMD_SET_PPB_ENTRY);
  2067. info->protect[sect_cnt] =
  2068. !flash_isset(info, sect_cnt,
  2069. 0, 0x01);
  2070. flash_write_cmd(info, 0, 0,
  2071. info->cmd_reset);
  2072. break;
  2073. default:
  2074. /* default: not protected */
  2075. info->protect[sect_cnt] = 0;
  2076. }
  2077. sect_cnt++;
  2078. }
  2079. }
  2080. info->sector_count = sect_cnt;
  2081. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2082. tmp = 1 << qry.block_erase_timeout_typ;
  2083. info->erase_blk_tout = tmp *
  2084. (1 << qry.block_erase_timeout_max);
  2085. tmp = (1 << qry.buf_write_timeout_typ) *
  2086. (1 << qry.buf_write_timeout_max);
  2087. /* round up when converting to ms */
  2088. info->buffer_write_tout = (tmp + 999) / 1000;
  2089. tmp = (1 << qry.word_write_timeout_typ) *
  2090. (1 << qry.word_write_timeout_max);
  2091. /* round up when converting to ms */
  2092. info->write_tout = (tmp + 999) / 1000;
  2093. info->flash_id = FLASH_MAN_CFI;
  2094. if (info->interface == FLASH_CFI_X8X16 &&
  2095. info->chipwidth == FLASH_CFI_BY8) {
  2096. /* XXX - Need to test on x8/x16 in parallel. */
  2097. info->portwidth >>= 1;
  2098. }
  2099. flash_write_cmd(info, 0, 0, info->cmd_reset);
  2100. }
  2101. return (info->size);
  2102. }
  2103. #ifdef CONFIG_FLASH_CFI_MTD
  2104. void flash_set_verbose(uint v)
  2105. {
  2106. flash_verbose = v;
  2107. }
  2108. #endif
  2109. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2110. {
  2111. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2112. /*
  2113. * Only set this config register if really defined
  2114. * to a valid value (0xffff is invalid)
  2115. */
  2116. if (val == 0xffff)
  2117. return;
  2118. /*
  2119. * Set configuration register. Data is "encrypted" in the 16 lower
  2120. * address bits.
  2121. */
  2122. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2123. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2124. /*
  2125. * Finally issue reset-command to bring device back to
  2126. * read-array mode
  2127. */
  2128. flash_write16(FLASH_CMD_RESET, (void *)base);
  2129. #endif
  2130. }
  2131. /*-----------------------------------------------------------------------
  2132. */
  2133. static void flash_protect_default(void)
  2134. {
  2135. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2136. int i;
  2137. struct apl_s {
  2138. ulong start;
  2139. ulong size;
  2140. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2141. #endif
  2142. /* Monitor protection ON by default */
  2143. #if defined(CONFIG_SYS_MONITOR_BASE) && \
  2144. (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2145. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2146. flash_protect(FLAG_PROTECT_SET,
  2147. CONFIG_SYS_MONITOR_BASE,
  2148. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2149. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2150. #endif
  2151. /* Environment protection ON by default */
  2152. #ifdef CONFIG_ENV_IS_IN_FLASH
  2153. flash_protect(FLAG_PROTECT_SET,
  2154. CONFIG_ENV_ADDR,
  2155. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2156. flash_get_info(CONFIG_ENV_ADDR));
  2157. #endif
  2158. /* Redundant environment protection ON by default */
  2159. #ifdef CONFIG_ENV_ADDR_REDUND
  2160. flash_protect(FLAG_PROTECT_SET,
  2161. CONFIG_ENV_ADDR_REDUND,
  2162. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2163. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2164. #endif
  2165. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2166. for (i = 0; i < ARRAY_SIZE(apl); i++) {
  2167. debug("autoprotecting from %08lx to %08lx\n",
  2168. apl[i].start, apl[i].start + apl[i].size - 1);
  2169. flash_protect(FLAG_PROTECT_SET,
  2170. apl[i].start,
  2171. apl[i].start + apl[i].size - 1,
  2172. flash_get_info(apl[i].start));
  2173. }
  2174. #endif
  2175. }
  2176. unsigned long flash_init(void)
  2177. {
  2178. unsigned long size = 0;
  2179. int i;
  2180. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2181. /* read environment from EEPROM */
  2182. char s[64];
  2183. env_get_f("unlock", s, sizeof(s));
  2184. #endif
  2185. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2186. cfi_flash_init_dm();
  2187. #endif
  2188. /* Init: no FLASHes known */
  2189. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2190. flash_info[i].flash_id = FLASH_UNKNOWN;
  2191. /* Optionally write flash configuration register */
  2192. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2193. cfi_flash_config_reg(i));
  2194. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2195. flash_get_size(cfi_flash_bank_addr(i), i);
  2196. size += flash_info[i].size;
  2197. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2198. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2199. printf("## Unknown flash on Bank %d ", i + 1);
  2200. printf("- Size = 0x%08lx = %ld MB\n",
  2201. flash_info[i].size,
  2202. flash_info[i].size >> 20);
  2203. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2204. }
  2205. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2206. else if (strcmp(s, "yes") == 0) {
  2207. /*
  2208. * Only the U-Boot image and it's environment
  2209. * is protected, all other sectors are
  2210. * unprotected (unlocked) if flash hardware
  2211. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2212. * and the environment variable "unlock" is
  2213. * set to "yes".
  2214. */
  2215. if (flash_info[i].legacy_unlock) {
  2216. int k;
  2217. /*
  2218. * Disable legacy_unlock temporarily,
  2219. * since flash_real_protect would
  2220. * relock all other sectors again
  2221. * otherwise.
  2222. */
  2223. flash_info[i].legacy_unlock = 0;
  2224. /*
  2225. * Legacy unlocking (e.g. Intel J3) ->
  2226. * unlock only one sector. This will
  2227. * unlock all sectors.
  2228. */
  2229. flash_real_protect(&flash_info[i], 0, 0);
  2230. flash_info[i].legacy_unlock = 1;
  2231. /*
  2232. * Manually mark other sectors as
  2233. * unlocked (unprotected)
  2234. */
  2235. for (k = 1; k < flash_info[i].sector_count; k++)
  2236. flash_info[i].protect[k] = 0;
  2237. } else {
  2238. /*
  2239. * No legancy unlocking -> unlock all sectors
  2240. */
  2241. flash_protect(FLAG_PROTECT_CLEAR,
  2242. flash_info[i].start[0],
  2243. flash_info[i].start[0]
  2244. + flash_info[i].size - 1,
  2245. &flash_info[i]);
  2246. }
  2247. }
  2248. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2249. }
  2250. flash_protect_default();
  2251. #ifdef CONFIG_FLASH_CFI_MTD
  2252. cfi_mtd_init();
  2253. #endif
  2254. return (size);
  2255. }
  2256. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2257. static int cfi_flash_probe(struct udevice *dev)
  2258. {
  2259. fdt_addr_t addr;
  2260. int idx;
  2261. for (idx = 0; idx < CFI_MAX_FLASH_BANKS; idx++) {
  2262. addr = dev_read_addr_index(dev, idx);
  2263. if (addr == FDT_ADDR_T_NONE)
  2264. break;
  2265. flash_info[cfi_flash_num_flash_banks].dev = dev;
  2266. flash_info[cfi_flash_num_flash_banks].base = addr;
  2267. cfi_flash_num_flash_banks++;
  2268. }
  2269. gd->bd->bi_flashstart = flash_info[0].base;
  2270. return 0;
  2271. }
  2272. static const struct udevice_id cfi_flash_ids[] = {
  2273. { .compatible = "cfi-flash" },
  2274. { .compatible = "jedec-flash" },
  2275. {}
  2276. };
  2277. U_BOOT_DRIVER(cfi_flash) = {
  2278. .name = "cfi_flash",
  2279. .id = UCLASS_MTD,
  2280. .of_match = cfi_flash_ids,
  2281. .probe = cfi_flash_probe,
  2282. };
  2283. #endif /* CONFIG_CFI_FLASH */