sti_sdhci.c 3.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
  4. * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
  5. */
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <log.h>
  9. #include <mmc.h>
  10. #include <reset-uclass.h>
  11. #include <sdhci.h>
  12. #include <asm/arch/sdhci.h>
  13. #include <asm/global_data.h>
  14. DECLARE_GLOBAL_DATA_PTR;
  15. struct sti_sdhci_plat {
  16. struct mmc_config cfg;
  17. struct mmc mmc;
  18. struct reset_ctl reset;
  19. int instance;
  20. };
  21. /**
  22. * sti_mmc_core_config: configure the Arasan HC
  23. * @dev : udevice
  24. *
  25. * Description: this function is to configure the Arasan MMC HC.
  26. * This should be called when the system starts in case of, on the SoC,
  27. * it is needed to configure the host controller.
  28. * This happens on some SoCs, i.e. StiH410, where the MMC0 inside the flashSS
  29. * needs to be configured as MMC 4.5 to have full capabilities.
  30. * W/o these settings the SDHCI could configure and use the embedded controller
  31. * with limited features.
  32. */
  33. static int sti_mmc_core_config(struct udevice *dev)
  34. {
  35. struct sti_sdhci_plat *plat = dev_get_plat(dev);
  36. struct sdhci_host *host = dev_get_priv(dev);
  37. int ret;
  38. /* only MMC1 has a reset line */
  39. if (plat->instance) {
  40. ret = reset_deassert(&plat->reset);
  41. if (ret < 0) {
  42. pr_err("MMC1 deassert failed: %d", ret);
  43. return ret;
  44. }
  45. }
  46. writel(STI_FLASHSS_MMC_CORE_CONFIG_1,
  47. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_1);
  48. if (plat->instance) {
  49. writel(STI_FLASHSS_MMC_CORE_CONFIG2,
  50. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
  51. writel(STI_FLASHSS_MMC_CORE_CONFIG3,
  52. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
  53. } else {
  54. writel(STI_FLASHSS_SDCARD_CORE_CONFIG2,
  55. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_2);
  56. writel(STI_FLASHSS_SDCARD_CORE_CONFIG3,
  57. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_3);
  58. }
  59. writel(STI_FLASHSS_MMC_CORE_CONFIG4,
  60. host->ioaddr + FLASHSS_MMC_CORE_CONFIG_4);
  61. return 0;
  62. }
  63. static int sti_sdhci_probe(struct udevice *dev)
  64. {
  65. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  66. struct sti_sdhci_plat *plat = dev_get_plat(dev);
  67. struct sdhci_host *host = dev_get_priv(dev);
  68. int ret;
  69. /*
  70. * identify current mmc instance, mmc1 has a reset, not mmc0
  71. * MMC0 is wired to the SD slot,
  72. * MMC1 is wired on the high speed connector
  73. */
  74. ret = reset_get_by_index(dev, 0, &plat->reset);
  75. if (!ret)
  76. plat->instance = 1;
  77. else
  78. if (ret == -ENOENT)
  79. plat->instance = 0;
  80. else
  81. return ret;
  82. ret = sti_mmc_core_config(dev);
  83. if (ret)
  84. return ret;
  85. host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
  86. SDHCI_QUIRK_32BIT_DMA_ADDR |
  87. SDHCI_QUIRK_NO_HISPD_BIT;
  88. host->host_caps = MMC_MODE_DDR_52MHz;
  89. host->mmc = &plat->mmc;
  90. host->mmc->dev = dev;
  91. host->mmc->priv = host;
  92. ret = sdhci_setup_cfg(&plat->cfg, host, 50000000, 400000);
  93. if (ret)
  94. return ret;
  95. upriv->mmc = host->mmc;
  96. return sdhci_probe(dev);
  97. }
  98. static int sti_sdhci_of_to_plat(struct udevice *dev)
  99. {
  100. struct sdhci_host *host = dev_get_priv(dev);
  101. host->name = strdup(dev->name);
  102. host->ioaddr = dev_read_addr_ptr(dev);
  103. host->bus_width = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
  104. "bus-width", 4);
  105. return 0;
  106. }
  107. static int sti_sdhci_bind(struct udevice *dev)
  108. {
  109. struct sti_sdhci_plat *plat = dev_get_plat(dev);
  110. return sdhci_bind(dev, &plat->mmc, &plat->cfg);
  111. }
  112. static const struct udevice_id sti_sdhci_ids[] = {
  113. { .compatible = "st,sdhci" },
  114. { }
  115. };
  116. U_BOOT_DRIVER(sti_mmc) = {
  117. .name = "sti_sdhci",
  118. .id = UCLASS_MMC,
  119. .of_match = sti_sdhci_ids,
  120. .bind = sti_sdhci_bind,
  121. .ops = &sdhci_ops,
  122. .of_to_plat = sti_sdhci_of_to_plat,
  123. .probe = sti_sdhci_probe,
  124. .priv_auto = sizeof(struct sdhci_host),
  125. .plat_auto = sizeof(struct sti_sdhci_plat),
  126. };