mmc_spi.c 12 KB

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  1. /*
  2. * generic mmc spi driver
  3. *
  4. * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
  5. * Copyright 2019 Bhargav Shah <bhargavshah1988@gmail.com>
  6. *
  7. * Licensed under the GPL-2 or later.
  8. */
  9. #include <common.h>
  10. #include <errno.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <part.h>
  14. #include <mmc.h>
  15. #include <stdlib.h>
  16. #include <linux/bitops.h>
  17. #include <u-boot/crc.h>
  18. #include <linux/crc7.h>
  19. #include <asm/byteorder.h>
  20. #include <dm.h>
  21. #include <spi.h>
  22. /* MMC/SD in SPI mode reports R1 status always */
  23. #define R1_SPI_IDLE BIT(0)
  24. #define R1_SPI_ERASE_RESET BIT(1)
  25. #define R1_SPI_ILLEGAL_COMMAND BIT(2)
  26. #define R1_SPI_COM_CRC BIT(3)
  27. #define R1_SPI_ERASE_SEQ BIT(4)
  28. #define R1_SPI_ADDRESS BIT(5)
  29. #define R1_SPI_PARAMETER BIT(6)
  30. /* R1 bit 7 is always zero, reuse this bit for error */
  31. #define R1_SPI_ERROR BIT(7)
  32. /* Response tokens used to ack each block written: */
  33. #define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
  34. #define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
  35. #define SPI_RESPONSE_CRC_ERR ((5 << 1)|1)
  36. #define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1)
  37. /*
  38. * Read and write blocks start with these tokens and end with crc;
  39. * on error, read tokens act like a subset of R2_SPI_* values.
  40. */
  41. /* single block write multiblock read */
  42. #define SPI_TOKEN_SINGLE 0xfe
  43. /* multiblock write */
  44. #define SPI_TOKEN_MULTI_WRITE 0xfc
  45. /* terminate multiblock write */
  46. #define SPI_TOKEN_STOP_TRAN 0xfd
  47. /* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
  48. #define MMC_SPI_CMD(x) (0x40 | (x))
  49. /* bus capability */
  50. #define MMC_SPI_VOLTAGE (MMC_VDD_32_33 | MMC_VDD_33_34)
  51. #define MMC_SPI_MIN_CLOCK 400000 /* 400KHz to meet MMC spec */
  52. #define MMC_SPI_MAX_CLOCK 25000000 /* SD/MMC legacy speed */
  53. /* timeout value */
  54. #define CMD_TIMEOUT 8
  55. #define READ_TIMEOUT 3000000 /* 1 sec */
  56. #define WRITE_TIMEOUT 3000000 /* 1 sec */
  57. #define R1B_TIMEOUT 3000000 /* 1 sec */
  58. struct mmc_spi_plat {
  59. struct mmc_config cfg;
  60. struct mmc mmc;
  61. };
  62. struct mmc_spi_priv {
  63. struct spi_slave *spi;
  64. };
  65. /**
  66. * mmc_spi_sendcmd() - send a command to the SD card
  67. *
  68. * @dev: mmc_spi device
  69. * @cmdidx: command index
  70. * @cmdarg: command argument
  71. * @resp_type: card response type
  72. * @resp: buffer to store the card response
  73. * @resp_size: size of the card response
  74. * @resp_match: if true, compare each of received bytes with @resp_match_value
  75. * @resp_match_value: a value to be compared with each of received bytes
  76. * @r1b: if true, receive additional bytes for busy signal token
  77. * @return 0 if OK, -ETIMEDOUT if no card response is received, -ve on error
  78. */
  79. static int mmc_spi_sendcmd(struct udevice *dev,
  80. ushort cmdidx, u32 cmdarg, u32 resp_type,
  81. u8 *resp, u32 resp_size,
  82. bool resp_match, u8 resp_match_value, bool r1b)
  83. {
  84. int i, rpos = 0, ret = 0;
  85. u8 cmdo[7], r;
  86. if (!resp || !resp_size)
  87. return 0;
  88. debug("%s: cmd%d cmdarg=0x%x resp_type=0x%x "
  89. "resp_size=%d resp_match=%d resp_match_value=0x%x\n",
  90. __func__, cmdidx, cmdarg, resp_type,
  91. resp_size, resp_match, resp_match_value);
  92. cmdo[0] = 0xff;
  93. cmdo[1] = MMC_SPI_CMD(cmdidx);
  94. cmdo[2] = cmdarg >> 24;
  95. cmdo[3] = cmdarg >> 16;
  96. cmdo[4] = cmdarg >> 8;
  97. cmdo[5] = cmdarg;
  98. cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
  99. ret = dm_spi_xfer(dev, sizeof(cmdo) * 8, cmdo, NULL, SPI_XFER_BEGIN);
  100. if (ret)
  101. return ret;
  102. ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  103. if (ret)
  104. return ret;
  105. debug("%s: cmd%d", __func__, cmdidx);
  106. if (resp_match)
  107. r = ~resp_match_value;
  108. i = CMD_TIMEOUT;
  109. while (i) {
  110. ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  111. if (ret)
  112. return ret;
  113. debug(" resp%d=0x%x", rpos, r);
  114. rpos++;
  115. i--;
  116. if (resp_match) {
  117. if (r == resp_match_value)
  118. break;
  119. } else {
  120. if (!(r & 0x80))
  121. break;
  122. }
  123. if (!i)
  124. return -ETIMEDOUT;
  125. }
  126. resp[0] = r;
  127. for (i = 1; i < resp_size; i++) {
  128. ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  129. if (ret)
  130. return ret;
  131. debug(" resp%d=0x%x", rpos, r);
  132. rpos++;
  133. resp[i] = r;
  134. }
  135. if (r1b == true) {
  136. i = R1B_TIMEOUT;
  137. while (i) {
  138. ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  139. if (ret)
  140. return ret;
  141. debug(" resp%d=0x%x", rpos, r);
  142. rpos++;
  143. i--;
  144. if (r)
  145. break;
  146. }
  147. if (!i)
  148. return -ETIMEDOUT;
  149. }
  150. debug("\n");
  151. return 0;
  152. }
  153. /**
  154. * mmc_spi_readdata() - read data block(s) from the SD card
  155. *
  156. * @dev: mmc_spi device
  157. * @xbuf: buffer of the actual data (excluding token and crc) to read
  158. * @bcnt: number of data blocks to transfer
  159. * @bsize: size of the actual data (excluding token and crc) in bytes
  160. * @return 0 if OK, -ECOMM if crc error, -ETIMEDOUT on other errors
  161. */
  162. static int mmc_spi_readdata(struct udevice *dev,
  163. void *xbuf, u32 bcnt, u32 bsize)
  164. {
  165. u16 crc;
  166. u8 *buf = xbuf, r1;
  167. int i, ret = 0;
  168. while (bcnt--) {
  169. for (i = 0; i < READ_TIMEOUT; i++) {
  170. ret = dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
  171. if (ret)
  172. return ret;
  173. if (r1 == SPI_TOKEN_SINGLE)
  174. break;
  175. }
  176. debug("%s: data tok%d 0x%x\n", __func__, i, r1);
  177. if (r1 == SPI_TOKEN_SINGLE) {
  178. ret = dm_spi_xfer(dev, bsize * 8, NULL, buf, 0);
  179. if (ret)
  180. return ret;
  181. ret = dm_spi_xfer(dev, 2 * 8, NULL, &crc, 0);
  182. if (ret)
  183. return ret;
  184. #ifdef CONFIG_MMC_SPI_CRC_ON
  185. u16 crc_ok = be16_to_cpu(crc16_ccitt(0, buf, bsize));
  186. if (crc_ok != crc) {
  187. debug("%s: data crc error, expected %04x got %04x\n",
  188. __func__, crc_ok, crc);
  189. r1 = R1_SPI_COM_CRC;
  190. break;
  191. }
  192. #endif
  193. r1 = 0;
  194. } else {
  195. r1 = R1_SPI_ERROR;
  196. break;
  197. }
  198. buf += bsize;
  199. }
  200. if (r1 & R1_SPI_COM_CRC)
  201. ret = -ECOMM;
  202. else if (r1) /* other errors */
  203. ret = -ETIMEDOUT;
  204. return ret;
  205. }
  206. /**
  207. * mmc_spi_writedata() - write data block(s) to the SD card
  208. *
  209. * @dev: mmc_spi device
  210. * @xbuf: buffer of the actual data (excluding token and crc) to write
  211. * @bcnt: number of data blocks to transfer
  212. * @bsize: size of actual data (excluding token and crc) in bytes
  213. * @multi: indicate a transfer by multiple block write command (CMD25)
  214. * @return 0 if OK, -ECOMM if crc error, -ETIMEDOUT on other errors
  215. */
  216. static int mmc_spi_writedata(struct udevice *dev, const void *xbuf,
  217. u32 bcnt, u32 bsize, int multi)
  218. {
  219. const u8 *buf = xbuf;
  220. u8 r1, tok[2];
  221. u16 crc;
  222. int i, ret = 0;
  223. tok[0] = 0xff;
  224. tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
  225. while (bcnt--) {
  226. #ifdef CONFIG_MMC_SPI_CRC_ON
  227. crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
  228. #endif
  229. dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
  230. dm_spi_xfer(dev, bsize * 8, buf, NULL, 0);
  231. dm_spi_xfer(dev, 2 * 8, &crc, NULL, 0);
  232. for (i = 0; i < CMD_TIMEOUT; i++) {
  233. dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
  234. if ((r1 & 0x10) == 0) /* response token */
  235. break;
  236. }
  237. debug("%s: data tok%d 0x%x\n", __func__, i, r1);
  238. if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
  239. debug("%s: data accepted\n", __func__);
  240. for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
  241. dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
  242. if (i && r1 == 0xff) {
  243. r1 = 0;
  244. break;
  245. }
  246. }
  247. if (i == WRITE_TIMEOUT) {
  248. debug("%s: data write timeout 0x%x\n",
  249. __func__, r1);
  250. r1 = R1_SPI_ERROR;
  251. break;
  252. }
  253. } else {
  254. debug("%s: data error 0x%x\n", __func__, r1);
  255. r1 = R1_SPI_COM_CRC;
  256. break;
  257. }
  258. buf += bsize;
  259. }
  260. if (multi && bcnt == -1) { /* stop multi write */
  261. tok[1] = SPI_TOKEN_STOP_TRAN;
  262. dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
  263. for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
  264. dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
  265. if (i && r1 == 0xff) {
  266. r1 = 0;
  267. break;
  268. }
  269. }
  270. if (i == WRITE_TIMEOUT) {
  271. debug("%s: data write timeout 0x%x\n", __func__, r1);
  272. r1 = R1_SPI_ERROR;
  273. }
  274. }
  275. if (r1 & R1_SPI_COM_CRC)
  276. ret = -ECOMM;
  277. else if (r1) /* other errors */
  278. ret = -ETIMEDOUT;
  279. return ret;
  280. }
  281. static int dm_mmc_spi_set_ios(struct udevice *dev)
  282. {
  283. return 0;
  284. }
  285. static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd,
  286. struct mmc_data *data)
  287. {
  288. int i, multi, ret = 0;
  289. u8 *resp = NULL;
  290. u32 resp_size = 0;
  291. bool resp_match = false, r1b = false;
  292. u8 resp8 = 0, resp16[2] = { 0 }, resp40[5] = { 0 }, resp_match_value = 0;
  293. dm_spi_claim_bus(dev);
  294. for (i = 0; i < 4; i++)
  295. cmd->response[i] = 0;
  296. switch (cmd->cmdidx) {
  297. case SD_CMD_APP_SEND_OP_COND:
  298. case MMC_CMD_SEND_OP_COND:
  299. resp = &resp8;
  300. resp_size = sizeof(resp8);
  301. cmd->cmdarg = 0x40000000;
  302. break;
  303. case SD_CMD_SEND_IF_COND:
  304. resp = (u8 *)&resp40[0];
  305. resp_size = sizeof(resp40);
  306. resp_match = true;
  307. resp_match_value = R1_SPI_IDLE;
  308. break;
  309. case MMC_CMD_SPI_READ_OCR:
  310. resp = (u8 *)&resp40[0];
  311. resp_size = sizeof(resp40);
  312. break;
  313. case MMC_CMD_SEND_STATUS:
  314. resp = (u8 *)&resp16[0];
  315. resp_size = sizeof(resp16);
  316. break;
  317. case MMC_CMD_SET_BLOCKLEN:
  318. case MMC_CMD_SPI_CRC_ON_OFF:
  319. resp = &resp8;
  320. resp_size = sizeof(resp8);
  321. resp_match = true;
  322. resp_match_value = 0x0;
  323. break;
  324. case MMC_CMD_STOP_TRANSMISSION:
  325. case MMC_CMD_ERASE:
  326. resp = &resp8;
  327. resp_size = sizeof(resp8);
  328. r1b = true;
  329. break;
  330. case MMC_CMD_SEND_CSD:
  331. case MMC_CMD_SEND_CID:
  332. case MMC_CMD_READ_SINGLE_BLOCK:
  333. case MMC_CMD_READ_MULTIPLE_BLOCK:
  334. case MMC_CMD_WRITE_SINGLE_BLOCK:
  335. case MMC_CMD_WRITE_MULTIPLE_BLOCK:
  336. case MMC_CMD_APP_CMD:
  337. case SD_CMD_ERASE_WR_BLK_START:
  338. case SD_CMD_ERASE_WR_BLK_END:
  339. resp = &resp8;
  340. resp_size = sizeof(resp8);
  341. break;
  342. default:
  343. resp = &resp8;
  344. resp_size = sizeof(resp8);
  345. resp_match = true;
  346. resp_match_value = R1_SPI_IDLE;
  347. break;
  348. };
  349. ret = mmc_spi_sendcmd(dev, cmd->cmdidx, cmd->cmdarg, cmd->resp_type,
  350. resp, resp_size, resp_match, resp_match_value, r1b);
  351. if (ret)
  352. goto done;
  353. switch (cmd->cmdidx) {
  354. case SD_CMD_APP_SEND_OP_COND:
  355. case MMC_CMD_SEND_OP_COND:
  356. cmd->response[0] = (resp8 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
  357. break;
  358. case SD_CMD_SEND_IF_COND:
  359. case MMC_CMD_SPI_READ_OCR:
  360. cmd->response[0] = resp40[4];
  361. cmd->response[0] |= (uint)resp40[3] << 8;
  362. cmd->response[0] |= (uint)resp40[2] << 16;
  363. cmd->response[0] |= (uint)resp40[1] << 24;
  364. break;
  365. case MMC_CMD_SEND_STATUS:
  366. if (resp16[0] || resp16[1])
  367. cmd->response[0] = MMC_STATUS_ERROR;
  368. else
  369. cmd->response[0] = MMC_STATUS_RDY_FOR_DATA;
  370. break;
  371. case MMC_CMD_SEND_CID:
  372. case MMC_CMD_SEND_CSD:
  373. ret = mmc_spi_readdata(dev, cmd->response, 1, 16);
  374. if (ret)
  375. return ret;
  376. for (i = 0; i < 4; i++)
  377. cmd->response[i] =
  378. cpu_to_be32(cmd->response[i]);
  379. break;
  380. default:
  381. cmd->response[0] = resp8;
  382. break;
  383. }
  384. debug("%s: cmd%d resp0=0x%x resp1=0x%x resp2=0x%x resp3=0x%x\n",
  385. __func__, cmd->cmdidx, cmd->response[0], cmd->response[1],
  386. cmd->response[2], cmd->response[3]);
  387. if (data) {
  388. debug("%s: data flags=0x%x blocks=%d block_size=%d\n",
  389. __func__, data->flags, data->blocks, data->blocksize);
  390. multi = (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK);
  391. if (data->flags == MMC_DATA_READ)
  392. ret = mmc_spi_readdata(dev, data->dest,
  393. data->blocks, data->blocksize);
  394. else if (data->flags == MMC_DATA_WRITE)
  395. ret = mmc_spi_writedata(dev, data->src,
  396. data->blocks, data->blocksize,
  397. multi);
  398. }
  399. done:
  400. dm_spi_xfer(dev, 0, NULL, NULL, SPI_XFER_END);
  401. dm_spi_release_bus(dev);
  402. return ret;
  403. }
  404. static int mmc_spi_probe(struct udevice *dev)
  405. {
  406. struct mmc_spi_priv *priv = dev_get_priv(dev);
  407. struct mmc_spi_plat *plat = dev_get_plat(dev);
  408. struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  409. char *name;
  410. priv->spi = dev_get_parent_priv(dev);
  411. if (!priv->spi->max_hz)
  412. priv->spi->max_hz = MMC_SPI_MAX_CLOCK;
  413. priv->spi->mode = SPI_MODE_0;
  414. priv->spi->wordlen = 8;
  415. name = malloc(strlen(dev->parent->name) + strlen(dev->name) + 4);
  416. if (!name)
  417. return -ENOMEM;
  418. sprintf(name, "%s:%s", dev->parent->name, dev->name);
  419. plat->cfg.name = name;
  420. plat->cfg.host_caps = MMC_MODE_SPI;
  421. plat->cfg.voltages = MMC_SPI_VOLTAGE;
  422. plat->cfg.f_min = MMC_SPI_MIN_CLOCK;
  423. plat->cfg.f_max = priv->spi->max_hz;
  424. plat->cfg.part_type = PART_TYPE_DOS;
  425. plat->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
  426. plat->mmc.cfg = &plat->cfg;
  427. plat->mmc.priv = priv;
  428. plat->mmc.dev = dev;
  429. upriv->mmc = &plat->mmc;
  430. return 0;
  431. }
  432. static int mmc_spi_bind(struct udevice *dev)
  433. {
  434. struct mmc_spi_plat *plat = dev_get_plat(dev);
  435. return mmc_bind(dev, &plat->mmc, &plat->cfg);
  436. }
  437. static const struct dm_mmc_ops mmc_spi_ops = {
  438. .send_cmd = dm_mmc_spi_request,
  439. .set_ios = dm_mmc_spi_set_ios,
  440. };
  441. static const struct udevice_id dm_mmc_spi_match[] = {
  442. { .compatible = "mmc-spi-slot" },
  443. { /* sentinel */ }
  444. };
  445. U_BOOT_DRIVER(mmc_spi) = {
  446. .name = "mmc_spi",
  447. .id = UCLASS_MMC,
  448. .of_match = dm_mmc_spi_match,
  449. .ops = &mmc_spi_ops,
  450. .probe = mmc_spi_probe,
  451. .bind = mmc_spi_bind,
  452. .plat_auto = sizeof(struct mmc_spi_plat),
  453. .priv_auto = sizeof(struct mmc_spi_priv),
  454. };