stm32-ipcc.c 3.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
  4. */
  5. #define LOG_CATEGORY UCLASS_MAILBOX
  6. #include <common.h>
  7. #include <clk.h>
  8. #include <dm.h>
  9. #include <log.h>
  10. #include <mailbox-uclass.h>
  11. #include <malloc.h>
  12. #include <asm/io.h>
  13. #include <dm/device_compat.h>
  14. #include <linux/bitops.h>
  15. /*
  16. * IPCC has one set of registers per CPU
  17. * IPCC_PROC_OFFST allows to define cpu registers set base address
  18. * according to the assigned proc_id.
  19. */
  20. #define IPCC_PROC_OFFST 0x010
  21. #define IPCC_XSCR 0x008
  22. #define IPCC_XTOYSR 0x00c
  23. #define IPCC_HWCFGR 0x3f0
  24. #define IPCFGR_CHAN_MASK GENMASK(7, 0)
  25. #define RX_BIT_CHAN(chan) BIT(chan)
  26. #define TX_BIT_SHIFT 16
  27. #define TX_BIT_CHAN(chan) BIT(TX_BIT_SHIFT + (chan))
  28. #define STM32_MAX_PROCS 2
  29. struct stm32_ipcc {
  30. void __iomem *reg_base;
  31. void __iomem *reg_proc;
  32. u32 proc_id;
  33. u32 n_chans;
  34. };
  35. static int stm32_ipcc_request(struct mbox_chan *chan)
  36. {
  37. struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
  38. dev_dbg(chan->dev, "chan=%p\n", chan);
  39. if (chan->id >= ipcc->n_chans) {
  40. dev_dbg(chan->dev, "failed to request channel: %ld\n",
  41. chan->id);
  42. return -EINVAL;
  43. }
  44. return 0;
  45. }
  46. static int stm32_ipcc_free(struct mbox_chan *chan)
  47. {
  48. dev_dbg(chan->dev, "chan=%p\n", chan);
  49. return 0;
  50. }
  51. static int stm32_ipcc_send(struct mbox_chan *chan, const void *data)
  52. {
  53. struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
  54. dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
  55. if (readl(ipcc->reg_proc + IPCC_XTOYSR) & BIT(chan->id))
  56. return -EBUSY;
  57. /* set channel n occupied */
  58. setbits_le32(ipcc->reg_proc + IPCC_XSCR, TX_BIT_CHAN(chan->id));
  59. return 0;
  60. }
  61. static int stm32_ipcc_recv(struct mbox_chan *chan, void *data)
  62. {
  63. struct stm32_ipcc *ipcc = dev_get_priv(chan->dev);
  64. u32 val;
  65. int proc_offset;
  66. dev_dbg(chan->dev, "chan=%p, data=%p\n", chan, data);
  67. /* read 'channel occupied' status from other proc */
  68. proc_offset = ipcc->proc_id ? -IPCC_PROC_OFFST : IPCC_PROC_OFFST;
  69. val = readl(ipcc->reg_proc + proc_offset + IPCC_XTOYSR);
  70. if (!(val & BIT(chan->id)))
  71. return -ENODATA;
  72. setbits_le32(ipcc->reg_proc + IPCC_XSCR, RX_BIT_CHAN(chan->id));
  73. return 0;
  74. }
  75. static int stm32_ipcc_probe(struct udevice *dev)
  76. {
  77. struct stm32_ipcc *ipcc = dev_get_priv(dev);
  78. fdt_addr_t addr;
  79. struct clk clk;
  80. int ret;
  81. dev_dbg(dev, "\n");
  82. addr = dev_read_addr(dev);
  83. if (addr == FDT_ADDR_T_NONE)
  84. return -EINVAL;
  85. ipcc->reg_base = (void __iomem *)addr;
  86. /* proc_id */
  87. ret = dev_read_u32_index(dev, "st,proc_id", 1, &ipcc->proc_id);
  88. if (ret) {
  89. dev_dbg(dev, "Missing st,proc_id\n");
  90. return -EINVAL;
  91. }
  92. if (ipcc->proc_id >= STM32_MAX_PROCS) {
  93. dev_err(dev, "Invalid proc_id (%d)\n", ipcc->proc_id);
  94. return -EINVAL;
  95. }
  96. ipcc->reg_proc = ipcc->reg_base + ipcc->proc_id * IPCC_PROC_OFFST;
  97. ret = clk_get_by_index(dev, 0, &clk);
  98. if (ret)
  99. return ret;
  100. ret = clk_enable(&clk);
  101. if (ret)
  102. goto clk_free;
  103. /* get channel number */
  104. ipcc->n_chans = readl(ipcc->reg_base + IPCC_HWCFGR);
  105. ipcc->n_chans &= IPCFGR_CHAN_MASK;
  106. return 0;
  107. clk_free:
  108. clk_free(&clk);
  109. return ret;
  110. }
  111. static const struct udevice_id stm32_ipcc_ids[] = {
  112. { .compatible = "st,stm32mp1-ipcc" },
  113. { }
  114. };
  115. struct mbox_ops stm32_ipcc_mbox_ops = {
  116. .request = stm32_ipcc_request,
  117. .rfree = stm32_ipcc_free,
  118. .send = stm32_ipcc_send,
  119. .recv = stm32_ipcc_recv,
  120. };
  121. U_BOOT_DRIVER(stm32_ipcc) = {
  122. .name = "stm32_ipcc",
  123. .id = UCLASS_MAILBOX,
  124. .of_match = stm32_ipcc_ids,
  125. .probe = stm32_ipcc_probe,
  126. .priv_auto = sizeof(struct stm32_ipcc),
  127. .ops = &stm32_ipcc_mbox_ops,
  128. };