work_92105.h 2.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * WORK Microwave work_92105 board configuration file
  4. *
  5. * (C) Copyright 2014 DENX Software Engineering GmbH
  6. * Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
  7. */
  8. #ifndef __CONFIG_WORK_92105_H__
  9. #define __CONFIG_WORK_92105_H__
  10. /* SoC and board defines */
  11. #include <linux/sizes.h>
  12. #include <asm/arch/cpu.h>
  13. /*
  14. * Memory configurations
  15. */
  16. #define CONFIG_SYS_SDRAM_BASE EMC_DYCS0_BASE
  17. #define CONFIG_SYS_SDRAM_SIZE SZ_128M
  18. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_512K \
  19. - GENERATED_GBL_DATA_SIZE)
  20. /*
  21. * Ethernet Driver
  22. */
  23. #define CONFIG_LPC32XX_ETH
  24. #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
  25. /* FIXME: remove "Waiting for PHY auto negotiation to complete..." message */
  26. #define CONFIG_RTC_DS1374
  27. /*
  28. * U-Boot General Configurations
  29. */
  30. #define CONFIG_SYS_CBSIZE 1024
  31. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  32. /*
  33. * NAND chip timings for FIXME: which one?
  34. */
  35. #define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
  36. #define CONFIG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000
  37. #define CONFIG_LPC32XX_NAND_MLC_NAND_TA 18181818
  38. #define CONFIG_LPC32XX_NAND_MLC_RD_HIGH 31250000
  39. #define CONFIG_LPC32XX_NAND_MLC_RD_LOW 45454545
  40. #define CONFIG_LPC32XX_NAND_MLC_WR_HIGH 40000000
  41. #define CONFIG_LPC32XX_NAND_MLC_WR_LOW 83333333
  42. /*
  43. * NAND
  44. */
  45. /* driver configuration */
  46. #define CONFIG_SYS_NAND_SELF_INIT
  47. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  48. #define CONFIG_SYS_MAX_NAND_CHIPS 1
  49. #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
  50. /*
  51. * GPIO
  52. */
  53. #define CONFIG_LPC32XX_GPIO
  54. /*
  55. * Environment
  56. */
  57. /*
  58. * Boot Linux
  59. */
  60. #define CONFIG_BOOTFILE "uImage"
  61. /*
  62. * SPL
  63. */
  64. /* SPL will be executed at offset 0 */
  65. /* SPL will use SRAM as stack */
  66. #define CONFIG_SPL_STACK 0x0000FFF8
  67. /* Use the framework and generic lib */
  68. /* SPL will use serial */
  69. /* SPL will load U-Boot from NAND offset 0x40000 */
  70. #define CONFIG_SPL_PAD_TO 0x20000
  71. /* U-Boot will be 0x40000 bytes, loaded and run at CONFIG_SYS_TEXT_BASE */
  72. #define CONFIG_SYS_MONITOR_LEN 0x40000 /* actually, MAX size */
  73. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  74. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
  75. /*
  76. * Include SoC specific configuration
  77. */
  78. #include <asm/arch/config.h>
  79. #endif /* __CONFIG_WORK_92105_H__*/