smartweb.h 5.2 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * (C) Copyright 2007-2008
  4. * Stelian Pop <stelian@popies.net>
  5. * Lead Tech Design <www.leadtechdesign.com>
  6. *
  7. * (C) Copyright 2010
  8. * Achim Ehrlich <aehrlich@taskit.de>
  9. * taskit GmbH <www.taskit.de>
  10. *
  11. * (C) Copyright 2012
  12. * Markus Hubig <mhubig@imko.de>
  13. * IMKO GmbH <www.imko.de>
  14. *
  15. * (C) Copyright 2014
  16. * Heiko Schocher <hs@denx.de>
  17. * DENX Software Engineering GmbH
  18. *
  19. * Configuation settings for the smartweb.
  20. */
  21. #ifndef __CONFIG_H
  22. #define __CONFIG_H
  23. /*
  24. * SoC must be defined first, before hardware.h is included.
  25. * In this case SoC is defined in boards.cfg.
  26. */
  27. #include <asm/hardware.h>
  28. #include <linux/sizes.h>
  29. /*
  30. * Warning: changing CONFIG_SYS_TEXT_BASE requires adapting the initial boot
  31. * program. Since the linker has to swallow that define, we must use a pure
  32. * hex number here!
  33. */
  34. /* ARM asynchronous clock */
  35. #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
  36. #define CONFIG_SYS_AT91_MAIN_CLOCK 18432000 /* 18.432MHz crystal */
  37. /* misc settings */
  38. /* We set the max number of command args high to avoid HUSH bugs. */
  39. #define CONFIG_SYS_MAXARGS 32
  40. /* setting board specific options */
  41. #define CONFIG_SYS_AUTOLOAD "yes"
  42. #define CONFIG_RESET_TO_RETRY
  43. /* The LED PINs */
  44. #define CONFIG_RED_LED AT91_PIN_PA9
  45. #define CONFIG_GREEN_LED AT91_PIN_PA6
  46. /*
  47. * SDRAM: 1 bank, 64 MB, base address 0x20000000
  48. * Already initialized before u-boot gets started.
  49. */
  50. #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
  51. #define CONFIG_SYS_SDRAM_SIZE (64 * SZ_1M)
  52. /*
  53. * Perform a SDRAM Memtest from the start of SDRAM
  54. * till the beginning of the U-Boot position in RAM.
  55. */
  56. /* NAND flash settings */
  57. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  58. #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
  59. #define CONFIG_SYS_NAND_DBW_8
  60. #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
  61. #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
  62. #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
  63. #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
  64. /* general purpose I/O */
  65. #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
  66. #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */
  67. /* serial console */
  68. #define CONFIG_USART_BASE ATMEL_BASE_DBGU
  69. #define CONFIG_USART_ID ATMEL_ID_SYS
  70. /*
  71. * Ethernet configuration
  72. *
  73. */
  74. #define CONFIG_MACB
  75. #define CONFIG_RMII /* use reduced MII inteface */
  76. #define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
  77. #define CONFIG_AT91_WANTS_COMMON_PHY
  78. /* BOOTP and DHCP options */
  79. #define CONFIG_BOOTP_BOOTFILESIZE
  80. #define NFSBOOTCOMMAND \
  81. "setenv autoload yes; setenv autoboot yes; " \
  82. "setenv bootargs ${basicargs} ${mtdparts} " \
  83. "root=/dev/nfs ip=dhcp nfsroot=${serverip}:/srv/nfs/rootfs; " \
  84. "dhcp"
  85. #if !defined(CONFIG_SPL_BUILD)
  86. /* USB configuration */
  87. #define CONFIG_USB_ATMEL
  88. #define CONFIG_USB_ATMEL_CLK_SEL_PLLB
  89. #define CONFIG_USB_OHCI_NEW
  90. #define CONFIG_SYS_USB_OHCI_CPU_INIT
  91. #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_UHP_BASE
  92. #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
  93. #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
  94. /* USB DFU support */
  95. #define CONFIG_USB_GADGET_AT91
  96. /* DFU class support */
  97. #define DFU_MANIFEST_POLL_TIMEOUT 25000
  98. #endif
  99. /* General Boot Parameter */
  100. #define CONFIG_BOOTCOMMAND "run flashboot"
  101. #define CONFIG_SYS_CBSIZE 512
  102. /*
  103. * The NAND Flash partitions:
  104. */
  105. #define CONFIG_ENV_RANGE (SZ_512K)
  106. /*
  107. * Predefined environment variables.
  108. * Usefull to define some easy to use boot commands.
  109. */
  110. #define CONFIG_EXTRA_ENV_SETTINGS \
  111. \
  112. "basicargs=console=ttyS0,115200\0" \
  113. \
  114. "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0"
  115. #ifdef CONFIG_SPL_BUILD
  116. #define CONFIG_SYS_INIT_SP_ADDR 0x301000
  117. #define CONFIG_SPL_STACK_R
  118. #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
  119. #else
  120. /*
  121. * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,
  122. * leaving the correct space for initial global data structure above that
  123. * address while providing maximum stack area below.
  124. */
  125. #define CONFIG_SYS_INIT_SP_ADDR \
  126. (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
  127. #endif
  128. /* Defines for SPL */
  129. #define CONFIG_SPL_MAX_SIZE (SZ_4K)
  130. #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE
  131. #define CONFIG_SPL_BSS_MAX_SIZE (SZ_16K)
  132. #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
  133. CONFIG_SPL_BSS_MAX_SIZE)
  134. #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
  135. #define CONFIG_SYS_NAND_ENABLE_PIN_SPL (2*32 + 14)
  136. #define CONFIG_SYS_USE_NANDFLASH 1
  137. #define CONFIG_SPL_NAND_RAW_ONLY
  138. #define CONFIG_SPL_NAND_SOFTECC
  139. #define CONFIG_SYS_NAND_U_BOOT_SIZE SZ_512K
  140. #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
  141. #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
  142. #define CONFIG_SYS_NAND_SIZE (SZ_256M)
  143. #define CONFIG_SYS_NAND_ECCSIZE 256
  144. #define CONFIG_SYS_NAND_ECCBYTES 3
  145. #define CONFIG_SYS_NAND_ECCPOS { 40, 41, 42, 43, 44, 45, 46, 47, \
  146. 48, 49, 50, 51, 52, 53, 54, 55, \
  147. 56, 57, 58, 59, 60, 61, 62, 63, }
  148. #define CONFIG_SPL_ATMEL_SIZE
  149. #define CONFIG_SYS_MASTER_CLOCK (198656000/2)
  150. #define AT91_PLL_LOCK_TIMEOUT 1000000
  151. #define CONFIG_SYS_AT91_PLLA 0x2060bf09
  152. #define CONFIG_SYS_MCKR 0x100
  153. #define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
  154. #define CONFIG_SYS_AT91_PLLB 0x10483f0e
  155. #define CONFIG_SPL_PAD_TO CONFIG_SYS_NAND_U_BOOT_OFFS
  156. #define CONFIG_SYS_SPL_LEN CONFIG_SPL_PAD_TO
  157. #endif /* __CONFIG_H */