imximage.c 27 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
  5. *
  6. * (C) Copyright 2008
  7. * Marvell Semiconductor <www.marvell.com>
  8. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  9. */
  10. #include "imagetool.h"
  11. #include <image.h>
  12. #include "imximage.h"
  13. #define UNDEFINED 0xFFFFFFFF
  14. /*
  15. * Supported commands for configuration file
  16. */
  17. static table_entry_t imximage_cmds[] = {
  18. {CMD_BOOT_FROM, "BOOT_FROM", "boot command", },
  19. {CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
  20. {CMD_WRITE_DATA, "DATA", "Reg Write Data", },
  21. {CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
  22. {CMD_WRITE_SET_BIT, "SET_BIT", "Reg set bit", },
  23. {CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
  24. {CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
  25. {CMD_CSF, "CSF", "Command Sequence File", },
  26. {CMD_IMAGE_VERSION, "IMAGE_VERSION", "image version", },
  27. {CMD_PLUGIN, "PLUGIN", "file plugin_addr", },
  28. {-1, "", "", },
  29. };
  30. /*
  31. * Supported Boot options for configuration file
  32. * this is needed to set the correct flash offset
  33. */
  34. static table_entry_t imximage_boot_offset[] = {
  35. {FLASH_OFFSET_ONENAND, "onenand", "OneNAND Flash",},
  36. {FLASH_OFFSET_NAND, "nand", "NAND Flash", },
  37. {FLASH_OFFSET_NOR, "nor", "NOR Flash", },
  38. {FLASH_OFFSET_SATA, "sata", "SATA Disk", },
  39. {FLASH_OFFSET_SD, "sd", "SD Card", },
  40. {FLASH_OFFSET_SPI, "spi", "SPI Flash", },
  41. {FLASH_OFFSET_QSPI, "qspi", "QSPI NOR Flash",},
  42. {-1, "", "Invalid", },
  43. };
  44. /*
  45. * Supported Boot options for configuration file
  46. * this is needed to determine the initial load size
  47. */
  48. static table_entry_t imximage_boot_loadsize[] = {
  49. {FLASH_LOADSIZE_ONENAND, "onenand", "OneNAND Flash",},
  50. {FLASH_LOADSIZE_NAND, "nand", "NAND Flash", },
  51. {FLASH_LOADSIZE_NOR, "nor", "NOR Flash", },
  52. {FLASH_LOADSIZE_SATA, "sata", "SATA Disk", },
  53. {FLASH_LOADSIZE_SD, "sd", "SD Card", },
  54. {FLASH_LOADSIZE_SPI, "spi", "SPI Flash", },
  55. {FLASH_LOADSIZE_QSPI, "qspi", "QSPI NOR Flash",},
  56. {-1, "", "Invalid", },
  57. };
  58. /*
  59. * IMXIMAGE version definition for i.MX chips
  60. */
  61. static table_entry_t imximage_versions[] = {
  62. {IMXIMAGE_V1, "", " (i.MX25/35/51 compatible)", },
  63. {IMXIMAGE_V2, "", " (i.MX53/6/7 compatible)", },
  64. {-1, "", " (Invalid)", },
  65. };
  66. static struct imx_header imximage_header;
  67. static uint32_t imximage_version;
  68. /*
  69. * Image Vector Table Offset
  70. * Initialized to a wrong not 4-bytes aligned address to
  71. * check if it is was set by the cfg file.
  72. */
  73. static uint32_t imximage_ivt_offset = UNDEFINED;
  74. static uint32_t imximage_csf_size = UNDEFINED;
  75. /* Initial Load Region Size */
  76. static uint32_t imximage_init_loadsize;
  77. static uint32_t imximage_iram_free_start;
  78. static uint32_t imximage_plugin_size;
  79. static uint32_t plugin_image;
  80. static set_dcd_val_t set_dcd_val;
  81. static set_dcd_param_t set_dcd_param;
  82. static set_dcd_rst_t set_dcd_rst;
  83. static set_imx_hdr_t set_imx_hdr;
  84. static uint32_t max_dcd_entries;
  85. static uint32_t *header_size_ptr;
  86. static uint32_t *csf_ptr;
  87. static uint32_t get_cfg_value(char *token, char *name, int linenr)
  88. {
  89. char *endptr;
  90. uint32_t value;
  91. errno = 0;
  92. value = strtoul(token, &endptr, 16);
  93. if (errno || (token == endptr)) {
  94. fprintf(stderr, "Error: %s[%d] - Invalid hex data(%s)\n",
  95. name, linenr, token);
  96. exit(EXIT_FAILURE);
  97. }
  98. return value;
  99. }
  100. static uint32_t detect_imximage_version(struct imx_header *imx_hdr)
  101. {
  102. imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
  103. imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
  104. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  105. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  106. /* Try to detect V1 */
  107. if ((fhdr_v1->app_code_barker == APP_CODE_BARKER) &&
  108. (hdr_v1->dcd_table.preamble.barker == DCD_BARKER))
  109. return IMXIMAGE_V1;
  110. /* Try to detect V2 */
  111. if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
  112. (hdr_v2->data.dcd_table.header.tag == DCD_HEADER_TAG))
  113. return IMXIMAGE_V2;
  114. if ((fhdr_v2->header.tag == IVT_HEADER_TAG) &&
  115. hdr_v2->boot_data.plugin)
  116. return IMXIMAGE_V2;
  117. return IMXIMAGE_VER_INVALID;
  118. }
  119. static void err_imximage_version(int version)
  120. {
  121. fprintf(stderr,
  122. "Error: Unsupported imximage version:%d\n", version);
  123. exit(EXIT_FAILURE);
  124. }
  125. static void set_dcd_val_v1(struct imx_header *imxhdr, char *name, int lineno,
  126. int fld, uint32_t value, uint32_t off)
  127. {
  128. dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
  129. switch (fld) {
  130. case CFG_REG_SIZE:
  131. /* Byte, halfword, word */
  132. if ((value != 1) && (value != 2) && (value != 4)) {
  133. fprintf(stderr, "Error: %s[%d] - "
  134. "Invalid register size " "(%d)\n",
  135. name, lineno, value);
  136. exit(EXIT_FAILURE);
  137. }
  138. dcd_v1->addr_data[off].type = value;
  139. break;
  140. case CFG_REG_ADDRESS:
  141. dcd_v1->addr_data[off].addr = value;
  142. break;
  143. case CFG_REG_VALUE:
  144. dcd_v1->addr_data[off].value = value;
  145. break;
  146. default:
  147. break;
  148. }
  149. }
  150. static struct dcd_v2_cmd *gd_last_cmd;
  151. static void set_dcd_param_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  152. int32_t cmd)
  153. {
  154. dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
  155. struct dcd_v2_cmd *d = gd_last_cmd;
  156. struct dcd_v2_cmd *d2;
  157. int len;
  158. if (!d)
  159. d = &dcd_v2->dcd_cmd;
  160. d2 = d;
  161. len = be16_to_cpu(d->write_dcd_command.length);
  162. if (len > 4)
  163. d2 = (struct dcd_v2_cmd *)(((char *)d) + len);
  164. switch (cmd) {
  165. case CMD_WRITE_DATA:
  166. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  167. (d->write_dcd_command.param == DCD_WRITE_DATA_PARAM))
  168. break;
  169. d = d2;
  170. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  171. d->write_dcd_command.length = cpu_to_be16(4);
  172. d->write_dcd_command.param = DCD_WRITE_DATA_PARAM;
  173. break;
  174. case CMD_WRITE_CLR_BIT:
  175. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  176. (d->write_dcd_command.param == DCD_WRITE_CLR_BIT_PARAM))
  177. break;
  178. d = d2;
  179. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  180. d->write_dcd_command.length = cpu_to_be16(4);
  181. d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
  182. break;
  183. case CMD_WRITE_SET_BIT:
  184. if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
  185. (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
  186. break;
  187. d = d2;
  188. d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
  189. d->write_dcd_command.length = cpu_to_be16(4);
  190. d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
  191. break;
  192. /*
  193. * Check data command only supports one entry,
  194. */
  195. case CMD_CHECK_BITS_SET:
  196. d = d2;
  197. d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
  198. d->write_dcd_command.length = cpu_to_be16(4);
  199. d->write_dcd_command.param = DCD_CHECK_BITS_SET_PARAM;
  200. break;
  201. case CMD_CHECK_BITS_CLR:
  202. d = d2;
  203. d->write_dcd_command.tag = DCD_CHECK_DATA_COMMAND_TAG;
  204. d->write_dcd_command.length = cpu_to_be16(4);
  205. d->write_dcd_command.param = DCD_CHECK_BITS_CLR_PARAM;
  206. break;
  207. default:
  208. break;
  209. }
  210. gd_last_cmd = d;
  211. }
  212. static void set_dcd_val_v2(struct imx_header *imxhdr, char *name, int lineno,
  213. int fld, uint32_t value, uint32_t off)
  214. {
  215. struct dcd_v2_cmd *d = gd_last_cmd;
  216. int len;
  217. len = be16_to_cpu(d->write_dcd_command.length);
  218. off = (len - 4) >> 3;
  219. switch (fld) {
  220. case CFG_REG_ADDRESS:
  221. d->addr_data[off].addr = cpu_to_be32(value);
  222. break;
  223. case CFG_REG_VALUE:
  224. d->addr_data[off].value = cpu_to_be32(value);
  225. off++;
  226. d->write_dcd_command.length = cpu_to_be16((off << 3) + 4);
  227. break;
  228. default:
  229. break;
  230. }
  231. }
  232. /*
  233. * Complete setting up the rest field of DCD of V1
  234. * such as barker code and DCD data length.
  235. */
  236. static void set_dcd_rst_v1(struct imx_header *imxhdr, uint32_t dcd_len,
  237. char *name, int lineno)
  238. {
  239. dcd_v1_t *dcd_v1 = &imxhdr->header.hdr_v1.dcd_table;
  240. dcd_v1->preamble.barker = DCD_BARKER;
  241. dcd_v1->preamble.length = dcd_len * sizeof(dcd_type_addr_data_t);
  242. }
  243. /*
  244. * Complete setting up the reset field of DCD of V2
  245. * such as DCD tag, version, length, etc.
  246. */
  247. static void set_dcd_rst_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  248. char *name, int lineno)
  249. {
  250. if (!imxhdr->header.hdr_v2.boot_data.plugin) {
  251. dcd_v2_t *dcd_v2 = &imxhdr->header.hdr_v2.data.dcd_table;
  252. struct dcd_v2_cmd *d = gd_last_cmd;
  253. int len;
  254. if (!d)
  255. d = &dcd_v2->dcd_cmd;
  256. len = be16_to_cpu(d->write_dcd_command.length);
  257. if (len > 4)
  258. d = (struct dcd_v2_cmd *)(((char *)d) + len);
  259. len = (char *)d - (char *)&dcd_v2->header;
  260. dcd_v2->header.tag = DCD_HEADER_TAG;
  261. dcd_v2->header.length = cpu_to_be16(len);
  262. dcd_v2->header.version = DCD_VERSION;
  263. }
  264. }
  265. static void set_imx_hdr_v1(struct imx_header *imxhdr, uint32_t dcd_len,
  266. uint32_t entry_point, uint32_t flash_offset)
  267. {
  268. imx_header_v1_t *hdr_v1 = &imxhdr->header.hdr_v1;
  269. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  270. dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
  271. uint32_t hdr_base;
  272. uint32_t header_length = (((char *)&dcd_v1->addr_data[dcd_len].addr)
  273. - ((char *)imxhdr));
  274. /* Set magic number */
  275. fhdr_v1->app_code_barker = APP_CODE_BARKER;
  276. hdr_base = entry_point - imximage_init_loadsize + flash_offset;
  277. fhdr_v1->app_dest_ptr = hdr_base - flash_offset;
  278. fhdr_v1->app_code_jump_vector = entry_point;
  279. fhdr_v1->dcd_ptr_ptr = hdr_base + offsetof(flash_header_v1_t, dcd_ptr);
  280. fhdr_v1->dcd_ptr = hdr_base + offsetof(imx_header_v1_t, dcd_table);
  281. /* Security feature are not supported */
  282. fhdr_v1->app_code_csf = 0;
  283. fhdr_v1->super_root_key = 0;
  284. header_size_ptr = (uint32_t *)(((char *)imxhdr) + header_length - 4);
  285. }
  286. static void set_imx_hdr_v2(struct imx_header *imxhdr, uint32_t dcd_len,
  287. uint32_t entry_point, uint32_t flash_offset)
  288. {
  289. imx_header_v2_t *hdr_v2 = &imxhdr->header.hdr_v2;
  290. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  291. uint32_t hdr_base;
  292. /* Set magic number */
  293. fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
  294. fhdr_v2->header.length = cpu_to_be16(sizeof(flash_header_v2_t));
  295. fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
  296. if (!hdr_v2->boot_data.plugin) {
  297. fhdr_v2->entry = entry_point;
  298. fhdr_v2->reserved1 = 0;
  299. fhdr_v2->reserved1 = 0;
  300. hdr_base = entry_point - imximage_init_loadsize +
  301. flash_offset;
  302. fhdr_v2->self = hdr_base;
  303. if (dcd_len > 0)
  304. fhdr_v2->dcd_ptr = hdr_base +
  305. offsetof(imx_header_v2_t, data);
  306. else
  307. fhdr_v2->dcd_ptr = 0;
  308. fhdr_v2->boot_data_ptr = hdr_base
  309. + offsetof(imx_header_v2_t, boot_data);
  310. hdr_v2->boot_data.start = entry_point - imximage_init_loadsize;
  311. fhdr_v2->csf = 0;
  312. header_size_ptr = &hdr_v2->boot_data.size;
  313. csf_ptr = &fhdr_v2->csf;
  314. } else {
  315. imx_header_v2_t *next_hdr_v2;
  316. flash_header_v2_t *next_fhdr_v2;
  317. if (imximage_csf_size != 0) {
  318. fprintf(stderr, "Error: Header v2: SECURE_BOOT is only supported in DCD mode!");
  319. exit(EXIT_FAILURE);
  320. }
  321. fhdr_v2->entry = imximage_iram_free_start +
  322. flash_offset + sizeof(flash_header_v2_t) +
  323. sizeof(boot_data_t);
  324. fhdr_v2->reserved1 = 0;
  325. fhdr_v2->reserved2 = 0;
  326. fhdr_v2->self = imximage_iram_free_start + flash_offset;
  327. fhdr_v2->dcd_ptr = 0;
  328. fhdr_v2->boot_data_ptr = fhdr_v2->self +
  329. offsetof(imx_header_v2_t, boot_data);
  330. hdr_v2->boot_data.start = imximage_iram_free_start;
  331. /*
  332. * The actural size of plugin image is "imximage_plugin_size +
  333. * sizeof(flash_header_v2_t) + sizeof(boot_data_t)", plus the
  334. * flash_offset space.The ROM code only need to copy this size
  335. * to run the plugin code. However, later when copy the whole
  336. * U-Boot image to DDR, the ROM code use memcpy to copy the
  337. * first part of the image, and use the storage read function
  338. * to get the remaining part. This requires the dividing point
  339. * must be multiple of storage sector size. Here we set the
  340. * first section to be MAX_PLUGIN_CODE_SIZE(64KB) for this
  341. * purpose.
  342. */
  343. hdr_v2->boot_data.size = MAX_PLUGIN_CODE_SIZE;
  344. /* Security feature are not supported */
  345. fhdr_v2->csf = 0;
  346. next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
  347. imximage_plugin_size);
  348. next_fhdr_v2 = &next_hdr_v2->fhdr;
  349. next_fhdr_v2->header.tag = IVT_HEADER_TAG; /* 0xD1 */
  350. next_fhdr_v2->header.length =
  351. cpu_to_be16(sizeof(flash_header_v2_t));
  352. next_fhdr_v2->header.version = IVT_VERSION; /* 0x40 */
  353. next_fhdr_v2->entry = entry_point;
  354. hdr_base = entry_point - sizeof(struct imx_header);
  355. next_fhdr_v2->reserved1 = 0;
  356. next_fhdr_v2->reserved2 = 0;
  357. next_fhdr_v2->self = hdr_base + imximage_plugin_size;
  358. next_fhdr_v2->dcd_ptr = 0;
  359. next_fhdr_v2->boot_data_ptr = next_fhdr_v2->self +
  360. offsetof(imx_header_v2_t, boot_data);
  361. next_hdr_v2->boot_data.start = hdr_base - flash_offset;
  362. header_size_ptr = &next_hdr_v2->boot_data.size;
  363. next_hdr_v2->boot_data.plugin = 0;
  364. next_fhdr_v2->csf = 0;
  365. }
  366. }
  367. static void set_hdr_func(void)
  368. {
  369. switch (imximage_version) {
  370. case IMXIMAGE_V1:
  371. set_dcd_val = set_dcd_val_v1;
  372. set_dcd_param = NULL;
  373. set_dcd_rst = set_dcd_rst_v1;
  374. set_imx_hdr = set_imx_hdr_v1;
  375. max_dcd_entries = MAX_HW_CFG_SIZE_V1;
  376. break;
  377. case IMXIMAGE_V2:
  378. gd_last_cmd = NULL;
  379. set_dcd_val = set_dcd_val_v2;
  380. set_dcd_param = set_dcd_param_v2;
  381. set_dcd_rst = set_dcd_rst_v2;
  382. set_imx_hdr = set_imx_hdr_v2;
  383. max_dcd_entries = MAX_HW_CFG_SIZE_V2;
  384. break;
  385. default:
  386. err_imximage_version(imximage_version);
  387. break;
  388. }
  389. }
  390. static void print_hdr_v1(struct imx_header *imx_hdr)
  391. {
  392. imx_header_v1_t *hdr_v1 = &imx_hdr->header.hdr_v1;
  393. flash_header_v1_t *fhdr_v1 = &hdr_v1->fhdr;
  394. dcd_v1_t *dcd_v1 = &hdr_v1->dcd_table;
  395. uint32_t size, length, ver;
  396. size = dcd_v1->preamble.length;
  397. if (size > (MAX_HW_CFG_SIZE_V1 * sizeof(dcd_type_addr_data_t))) {
  398. fprintf(stderr,
  399. "Error: Image corrupt DCD size %d exceed maximum %d\n",
  400. (uint32_t)(size / sizeof(dcd_type_addr_data_t)),
  401. MAX_HW_CFG_SIZE_V1);
  402. exit(EXIT_FAILURE);
  403. }
  404. length = dcd_v1->preamble.length / sizeof(dcd_type_addr_data_t);
  405. ver = detect_imximage_version(imx_hdr);
  406. printf("Image Type: Freescale IMX Boot Image\n");
  407. printf("Image Ver: %x", ver);
  408. printf("%s\n", get_table_entry_name(imximage_versions, NULL, ver));
  409. printf("Data Size: ");
  410. genimg_print_size(dcd_v1->addr_data[length].type);
  411. printf("Load Address: %08x\n", (uint32_t)fhdr_v1->app_dest_ptr);
  412. printf("Entry Point: %08x\n", (uint32_t)fhdr_v1->app_code_jump_vector);
  413. }
  414. static void print_hdr_v2(struct imx_header *imx_hdr)
  415. {
  416. imx_header_v2_t *hdr_v2 = &imx_hdr->header.hdr_v2;
  417. flash_header_v2_t *fhdr_v2 = &hdr_v2->fhdr;
  418. dcd_v2_t *dcd_v2 = &hdr_v2->data.dcd_table;
  419. uint32_t size, version, plugin;
  420. plugin = hdr_v2->boot_data.plugin;
  421. if (!plugin) {
  422. size = be16_to_cpu(dcd_v2->header.length);
  423. if (size > (MAX_HW_CFG_SIZE_V2 * sizeof(dcd_addr_data_t))) {
  424. fprintf(stderr,
  425. "Error: Image corrupt DCD size %d exceed maximum %d\n",
  426. (uint32_t)(size / sizeof(dcd_addr_data_t)),
  427. MAX_HW_CFG_SIZE_V2);
  428. exit(EXIT_FAILURE);
  429. }
  430. }
  431. version = detect_imximage_version(imx_hdr);
  432. printf("Image Type: Freescale IMX Boot Image\n");
  433. printf("Image Ver: %x", version);
  434. printf("%s\n", get_table_entry_name(imximage_versions, NULL, version));
  435. printf("Mode: %s\n", plugin ? "PLUGIN" : "DCD");
  436. if (!plugin) {
  437. printf("Data Size: ");
  438. genimg_print_size(hdr_v2->boot_data.size);
  439. printf("Load Address: %08x\n", (uint32_t)fhdr_v2->boot_data_ptr);
  440. printf("Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
  441. if (fhdr_v2->csf && (imximage_ivt_offset != UNDEFINED) &&
  442. (imximage_csf_size != UNDEFINED)) {
  443. uint16_t dcdlen;
  444. int offs;
  445. dcdlen = hdr_v2->data.dcd_table.header.length;
  446. offs = (char *)&hdr_v2->data.dcd_table
  447. - (char *)hdr_v2;
  448. printf("HAB Blocks: 0x%08x 0x%08x 0x%08x\n",
  449. (uint32_t)fhdr_v2->self, 0,
  450. hdr_v2->boot_data.size - imximage_ivt_offset -
  451. imximage_csf_size);
  452. printf("DCD Blocks: 0x00910000 0x%08x 0x%08x\n",
  453. offs, be16_to_cpu(dcdlen));
  454. }
  455. } else {
  456. imx_header_v2_t *next_hdr_v2;
  457. flash_header_v2_t *next_fhdr_v2;
  458. /*First Header*/
  459. printf("Plugin Data Size: ");
  460. genimg_print_size(hdr_v2->boot_data.size);
  461. printf("Plugin Code Size: ");
  462. genimg_print_size(imximage_plugin_size);
  463. printf("Plugin Load Address: %08x\n", hdr_v2->boot_data.start);
  464. printf("Plugin Entry Point: %08x\n", (uint32_t)fhdr_v2->entry);
  465. /*Second Header*/
  466. next_hdr_v2 = (imx_header_v2_t *)((char *)hdr_v2 +
  467. imximage_plugin_size);
  468. next_fhdr_v2 = &next_hdr_v2->fhdr;
  469. printf("U-Boot Data Size: ");
  470. genimg_print_size(next_hdr_v2->boot_data.size);
  471. printf("U-Boot Load Address: %08x\n",
  472. next_hdr_v2->boot_data.start);
  473. printf("U-Boot Entry Point: %08x\n",
  474. (uint32_t)next_fhdr_v2->entry);
  475. }
  476. }
  477. static void copy_plugin_code(struct imx_header *imxhdr, char *plugin_file)
  478. {
  479. int ifd;
  480. struct stat sbuf;
  481. char *plugin_buf = imxhdr->header.hdr_v2.data.plugin_code;
  482. char *ptr;
  483. ifd = open(plugin_file, O_RDONLY|O_BINARY);
  484. if (ifd < 0) {
  485. fprintf(stderr, "Can't open %s: %s\n",
  486. plugin_file,
  487. strerror(errno));
  488. exit(EXIT_FAILURE);
  489. }
  490. if (fstat(ifd, &sbuf) < 0) {
  491. fprintf(stderr, "Can't stat %s: %s\n",
  492. plugin_file,
  493. strerror(errno));
  494. exit(EXIT_FAILURE);
  495. }
  496. ptr = mmap(0, sbuf.st_size, PROT_READ, MAP_SHARED, ifd, 0);
  497. if (ptr == MAP_FAILED) {
  498. fprintf(stderr, "Can't read %s: %s\n",
  499. plugin_file,
  500. strerror(errno));
  501. exit(EXIT_FAILURE);
  502. }
  503. if (sbuf.st_size > MAX_PLUGIN_CODE_SIZE) {
  504. printf("plugin binary size too large\n");
  505. exit(EXIT_FAILURE);
  506. }
  507. memcpy(plugin_buf, ptr, sbuf.st_size);
  508. imximage_plugin_size = sbuf.st_size;
  509. (void) munmap((void *)ptr, sbuf.st_size);
  510. (void) close(ifd);
  511. imxhdr->header.hdr_v2.boot_data.plugin = 1;
  512. }
  513. static void parse_cfg_cmd(struct imx_header *imxhdr, int32_t cmd, char *token,
  514. char *name, int lineno, int fld, int dcd_len)
  515. {
  516. int value;
  517. static int cmd_ver_first = ~0;
  518. switch (cmd) {
  519. case CMD_IMAGE_VERSION:
  520. imximage_version = get_cfg_value(token, name, lineno);
  521. if (cmd_ver_first == 0) {
  522. fprintf(stderr, "Error: %s[%d] - IMAGE_VERSION "
  523. "command need be the first before other "
  524. "valid command in the file\n", name, lineno);
  525. exit(EXIT_FAILURE);
  526. }
  527. cmd_ver_first = 1;
  528. set_hdr_func();
  529. break;
  530. case CMD_BOOT_FROM:
  531. imximage_ivt_offset = get_table_entry_id(imximage_boot_offset,
  532. "imximage boot option", token);
  533. if (imximage_ivt_offset == -1) {
  534. fprintf(stderr, "Error: %s[%d] -Invalid boot device"
  535. "(%s)\n", name, lineno, token);
  536. exit(EXIT_FAILURE);
  537. }
  538. imximage_init_loadsize =
  539. get_table_entry_id(imximage_boot_loadsize,
  540. "imximage boot option", token);
  541. if (imximage_init_loadsize == -1) {
  542. fprintf(stderr,
  543. "Error: %s[%d] -Invalid boot device(%s)\n",
  544. name, lineno, token);
  545. exit(EXIT_FAILURE);
  546. }
  547. /*
  548. * The SOC loads from the storage starting at address 0
  549. * then ensures that the load size contains the offset
  550. */
  551. if (imximage_init_loadsize < imximage_ivt_offset)
  552. imximage_init_loadsize = imximage_ivt_offset;
  553. if (unlikely(cmd_ver_first != 1))
  554. cmd_ver_first = 0;
  555. break;
  556. case CMD_BOOT_OFFSET:
  557. imximage_ivt_offset = get_cfg_value(token, name, lineno);
  558. if (unlikely(cmd_ver_first != 1))
  559. cmd_ver_first = 0;
  560. break;
  561. case CMD_WRITE_DATA:
  562. case CMD_WRITE_CLR_BIT:
  563. case CMD_WRITE_SET_BIT:
  564. case CMD_CHECK_BITS_SET:
  565. case CMD_CHECK_BITS_CLR:
  566. value = get_cfg_value(token, name, lineno);
  567. if (set_dcd_param)
  568. (*set_dcd_param)(imxhdr, dcd_len, cmd);
  569. (*set_dcd_val)(imxhdr, name, lineno, fld, value, dcd_len);
  570. if (unlikely(cmd_ver_first != 1))
  571. cmd_ver_first = 0;
  572. break;
  573. case CMD_CSF:
  574. if (imximage_version != 2) {
  575. fprintf(stderr,
  576. "Error: %s[%d] - CSF only supported for VERSION 2(%s)\n",
  577. name, lineno, token);
  578. exit(EXIT_FAILURE);
  579. }
  580. imximage_csf_size = get_cfg_value(token, name, lineno);
  581. if (unlikely(cmd_ver_first != 1))
  582. cmd_ver_first = 0;
  583. break;
  584. case CMD_PLUGIN:
  585. plugin_image = 1;
  586. copy_plugin_code(imxhdr, token);
  587. break;
  588. }
  589. }
  590. static void parse_cfg_fld(struct imx_header *imxhdr, int32_t *cmd,
  591. char *token, char *name, int lineno, int fld, int *dcd_len)
  592. {
  593. int value;
  594. switch (fld) {
  595. case CFG_COMMAND:
  596. *cmd = get_table_entry_id(imximage_cmds,
  597. "imximage commands", token);
  598. if (*cmd < 0) {
  599. fprintf(stderr, "Error: %s[%d] - Invalid command"
  600. "(%s)\n", name, lineno, token);
  601. exit(EXIT_FAILURE);
  602. }
  603. break;
  604. case CFG_REG_SIZE:
  605. parse_cfg_cmd(imxhdr, *cmd, token, name, lineno, fld, *dcd_len);
  606. break;
  607. case CFG_REG_ADDRESS:
  608. case CFG_REG_VALUE:
  609. switch(*cmd) {
  610. case CMD_WRITE_DATA:
  611. case CMD_WRITE_CLR_BIT:
  612. case CMD_WRITE_SET_BIT:
  613. case CMD_CHECK_BITS_SET:
  614. case CMD_CHECK_BITS_CLR:
  615. value = get_cfg_value(token, name, lineno);
  616. if (set_dcd_param)
  617. (*set_dcd_param)(imxhdr, *dcd_len, *cmd);
  618. (*set_dcd_val)(imxhdr, name, lineno, fld, value,
  619. *dcd_len);
  620. if (fld == CFG_REG_VALUE) {
  621. (*dcd_len)++;
  622. if (*dcd_len > max_dcd_entries) {
  623. fprintf(stderr, "Error: %s[%d] -"
  624. "DCD table exceeds maximum size(%d)\n",
  625. name, lineno, max_dcd_entries);
  626. exit(EXIT_FAILURE);
  627. }
  628. }
  629. break;
  630. case CMD_PLUGIN:
  631. value = get_cfg_value(token, name, lineno);
  632. imximage_iram_free_start = value;
  633. break;
  634. default:
  635. break;
  636. }
  637. break;
  638. default:
  639. break;
  640. }
  641. }
  642. static uint32_t parse_cfg_file(struct imx_header *imxhdr, char *name)
  643. {
  644. FILE *fd = NULL;
  645. char *line = NULL;
  646. char *token, *saveptr1, *saveptr2;
  647. int lineno = 0;
  648. int fld;
  649. size_t len;
  650. int dcd_len = 0;
  651. int32_t cmd;
  652. fd = fopen(name, "r");
  653. if (fd == 0) {
  654. fprintf(stderr, "Error: %s - Can't open DCD file\n", name);
  655. exit(EXIT_FAILURE);
  656. }
  657. /*
  658. * Very simple parsing, line starting with # are comments
  659. * and are dropped
  660. */
  661. while ((getline(&line, &len, fd)) > 0) {
  662. lineno++;
  663. token = strtok_r(line, "\r\n", &saveptr1);
  664. if (token == NULL)
  665. continue;
  666. /* Check inside the single line */
  667. for (fld = CFG_COMMAND, cmd = CMD_INVALID,
  668. line = token; ; line = NULL, fld++) {
  669. token = strtok_r(line, " \t", &saveptr2);
  670. if (token == NULL)
  671. break;
  672. /* Drop all text starting with '#' as comments */
  673. if (token[0] == '#')
  674. break;
  675. parse_cfg_fld(imxhdr, &cmd, token, name,
  676. lineno, fld, &dcd_len);
  677. }
  678. }
  679. (*set_dcd_rst)(imxhdr, dcd_len, name, lineno);
  680. fclose(fd);
  681. /* Exit if there is no BOOT_FROM field specifying the flash_offset */
  682. if (imximage_ivt_offset == FLASH_OFFSET_UNDEFINED) {
  683. fprintf(stderr, "Error: No BOOT_FROM tag in %s\n", name);
  684. exit(EXIT_FAILURE);
  685. }
  686. return dcd_len;
  687. }
  688. static int imximage_check_image_types(uint8_t type)
  689. {
  690. if (type == IH_TYPE_IMXIMAGE)
  691. return EXIT_SUCCESS;
  692. else
  693. return EXIT_FAILURE;
  694. }
  695. static int imximage_verify_header(unsigned char *ptr, int image_size,
  696. struct image_tool_params *params)
  697. {
  698. struct imx_header *imx_hdr = (struct imx_header *) ptr;
  699. if (detect_imximage_version(imx_hdr) == IMXIMAGE_VER_INVALID)
  700. return -FDT_ERR_BADSTRUCTURE;
  701. return 0;
  702. }
  703. static void imximage_print_header(const void *ptr)
  704. {
  705. struct imx_header *imx_hdr = (struct imx_header *) ptr;
  706. uint32_t version = detect_imximage_version(imx_hdr);
  707. switch (version) {
  708. case IMXIMAGE_V1:
  709. print_hdr_v1(imx_hdr);
  710. break;
  711. case IMXIMAGE_V2:
  712. print_hdr_v2(imx_hdr);
  713. break;
  714. default:
  715. err_imximage_version(version);
  716. break;
  717. }
  718. }
  719. static void imximage_set_header(void *ptr, struct stat *sbuf, int ifd,
  720. struct image_tool_params *params)
  721. {
  722. struct imx_header *imxhdr = (struct imx_header *)ptr;
  723. uint32_t dcd_len;
  724. uint32_t header_size;
  725. /*
  726. * In order to not change the old imx cfg file
  727. * by adding VERSION command into it, here need
  728. * set up function ptr group to V1 by default.
  729. */
  730. imximage_version = IMXIMAGE_V1;
  731. /* Be able to detect if the cfg file has no BOOT_FROM tag */
  732. imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
  733. imximage_csf_size = 0;
  734. set_hdr_func();
  735. /* Parse dcd configuration file */
  736. dcd_len = parse_cfg_file(imxhdr, params->imagename);
  737. if (imximage_version == IMXIMAGE_V1)
  738. header_size = sizeof(flash_header_v1_t);
  739. else {
  740. header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
  741. if (!plugin_image)
  742. header_size += sizeof(dcd_v2_t);
  743. else
  744. header_size += MAX_PLUGIN_CODE_SIZE;
  745. }
  746. if (imximage_init_loadsize < imximage_ivt_offset + header_size)
  747. imximage_init_loadsize = imximage_ivt_offset + header_size;
  748. /* Set the imx header */
  749. (*set_imx_hdr)(imxhdr, dcd_len, params->ep, imximage_ivt_offset);
  750. /*
  751. * ROM bug alert
  752. *
  753. * MX53 only loads 512 byte multiples in case of SD boot.
  754. * MX53 only loads NAND page multiples in case of NAND boot and
  755. * supports up to 4096 byte large pages, thus align to 4096.
  756. *
  757. * The remaining fraction of a block bytes would not be loaded!
  758. */
  759. *header_size_ptr = ROUND((sbuf->st_size + imximage_ivt_offset), 4096);
  760. if (csf_ptr && imximage_csf_size) {
  761. *csf_ptr = params->ep - imximage_init_loadsize +
  762. *header_size_ptr;
  763. *header_size_ptr += imximage_csf_size;
  764. }
  765. }
  766. int imximage_check_params(struct image_tool_params *params)
  767. {
  768. if (!params)
  769. return CFG_INVALID;
  770. if (!strlen(params->imagename)) {
  771. fprintf(stderr, "Error: %s - Configuration file not specified, "
  772. "it is needed for imximage generation\n",
  773. params->cmdname);
  774. return CFG_INVALID;
  775. }
  776. /*
  777. * Check parameters:
  778. * XIP is not allowed and verify that incompatible
  779. * parameters are not sent at the same time
  780. * For example, if list is required a data image must not be provided
  781. */
  782. return (params->dflag && (params->fflag || params->lflag)) ||
  783. (params->fflag && (params->dflag || params->lflag)) ||
  784. (params->lflag && (params->dflag || params->fflag)) ||
  785. (params->xflag) || !(strlen(params->imagename));
  786. }
  787. static int imximage_generate(struct image_tool_params *params,
  788. struct image_type_params *tparams)
  789. {
  790. struct imx_header *imxhdr;
  791. size_t alloc_len;
  792. struct stat sbuf;
  793. char *datafile = params->datafile;
  794. uint32_t pad_len, header_size;
  795. memset(&imximage_header, 0, sizeof(imximage_header));
  796. /*
  797. * In order to not change the old imx cfg file
  798. * by adding VERSION command into it, here need
  799. * set up function ptr group to V1 by default.
  800. */
  801. imximage_version = IMXIMAGE_V1;
  802. /* Be able to detect if the cfg file has no BOOT_FROM tag */
  803. imximage_ivt_offset = FLASH_OFFSET_UNDEFINED;
  804. imximage_csf_size = 0;
  805. set_hdr_func();
  806. /* Parse dcd configuration file */
  807. parse_cfg_file(&imximage_header, params->imagename);
  808. if (imximage_version == IMXIMAGE_V1)
  809. header_size = sizeof(imx_header_v1_t);
  810. else {
  811. header_size = sizeof(flash_header_v2_t) + sizeof(boot_data_t);
  812. if (!plugin_image)
  813. header_size += sizeof(dcd_v2_t);
  814. else
  815. header_size += MAX_PLUGIN_CODE_SIZE;
  816. }
  817. if (imximage_init_loadsize < imximage_ivt_offset + header_size)
  818. imximage_init_loadsize = imximage_ivt_offset + header_size;
  819. alloc_len = imximage_init_loadsize - imximage_ivt_offset;
  820. if (alloc_len < header_size) {
  821. fprintf(stderr, "%s: header error\n",
  822. params->cmdname);
  823. exit(EXIT_FAILURE);
  824. }
  825. imxhdr = malloc(alloc_len);
  826. if (!imxhdr) {
  827. fprintf(stderr, "%s: malloc return failure: %s\n",
  828. params->cmdname, strerror(errno));
  829. exit(EXIT_FAILURE);
  830. }
  831. memset(imxhdr, 0, alloc_len);
  832. tparams->header_size = alloc_len;
  833. tparams->hdr = imxhdr;
  834. /* determine data image file length */
  835. if (stat(datafile, &sbuf) < 0) {
  836. fprintf(stderr, "%s: Can't stat %s: %s\n",
  837. params->cmdname, datafile, strerror(errno));
  838. exit(EXIT_FAILURE);
  839. }
  840. pad_len = ROUND(sbuf.st_size, 4096) - sbuf.st_size;
  841. return pad_len;
  842. }
  843. /*
  844. * imximage parameters
  845. */
  846. U_BOOT_IMAGE_TYPE(
  847. imximage,
  848. "Freescale i.MX Boot Image support",
  849. 0,
  850. NULL,
  851. imximage_check_params,
  852. imximage_verify_header,
  853. imximage_print_header,
  854. imximage_set_header,
  855. NULL,
  856. imximage_check_image_types,
  857. NULL,
  858. imximage_generate
  859. );