timer.c 1.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  5. * Marius Groeger <mgroeger@sysgo.de>
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Alex Zuepke <azu@sysgo.de>
  10. *
  11. * (C) Copyright 2002
  12. * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  13. */
  14. #include <common.h>
  15. #if defined (CONFIG_IMX)
  16. #include <asm/arch/imx-regs.h>
  17. int timer_init (void)
  18. {
  19. int i;
  20. /* setup GP Timer 1 */
  21. TCTL1 = TCTL_SWR;
  22. for ( i=0; i<100; i++) TCTL1 = 0; /* We have no udelay by now */
  23. TPRER1 = get_PERCLK1() / 1000000; /* 1 MHz */
  24. TCTL1 |= TCTL_FRR | (1<<1); /* Freerun Mode, PERCLK1 input */
  25. /* Reset the timer */
  26. TCTL1 &= ~TCTL_TEN;
  27. TCTL1 |= TCTL_TEN; /* Enable timer */
  28. return (0);
  29. }
  30. /*
  31. * timer without interrupts
  32. */
  33. ulong get_timer (ulong base)
  34. {
  35. return get_timer_masked() - base;
  36. }
  37. ulong get_timer_masked (void)
  38. {
  39. return TCN1;
  40. }
  41. void udelay_masked (unsigned long usec)
  42. {
  43. ulong endtime = get_timer_masked() + usec;
  44. signed long diff;
  45. do {
  46. ulong now = get_timer_masked ();
  47. diff = endtime - now;
  48. } while (diff >= 0);
  49. }
  50. void __udelay (unsigned long usec)
  51. {
  52. udelay_masked(usec);
  53. }
  54. /*
  55. * This function is derived from PowerPC code (read timebase as long long).
  56. * On ARM it just returns the timer value.
  57. */
  58. unsigned long long get_ticks(void)
  59. {
  60. return get_timer(0);
  61. }
  62. /*
  63. * This function is derived from PowerPC code (timebase clock frequency).
  64. * On ARM it returns the number of timer ticks per second.
  65. */
  66. ulong get_tbclk (void)
  67. {
  68. return CONFIG_SYS_HZ;
  69. }
  70. /*
  71. * Reset the cpu by setting up the watchdog timer and let him time out
  72. */
  73. void reset_cpu (ulong ignored)
  74. {
  75. /* Disable watchdog and set Time-Out field to 0 */
  76. WCR = 0x00000000;
  77. /* Write Service Sequence */
  78. WSR = 0x00005555;
  79. WSR = 0x0000AAAA;
  80. /* Enable watchdog */
  81. WCR = 0x00000001;
  82. while (1);
  83. /*NOTREACHED*/
  84. }
  85. #endif /* defined (CONFIG_IMX) */