smc911x.c 14 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * SMSC LAN9[12]1[567] Network driver
  4. *
  5. * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
  6. */
  7. #include <common.h>
  8. #include <command.h>
  9. #include <malloc.h>
  10. #include <net.h>
  11. #include <miiphy.h>
  12. #include <linux/io.h>
  13. #include <linux/types.h>
  14. #include "smc911x.h"
  15. struct chip_id {
  16. u16 id;
  17. char *name;
  18. };
  19. struct smc911x_priv {
  20. #ifndef CONFIG_DM_ETH
  21. struct eth_device dev;
  22. #endif
  23. phys_addr_t iobase;
  24. const struct chip_id *chipid;
  25. unsigned char enetaddr[6];
  26. };
  27. static const struct chip_id chip_ids[] = {
  28. { CHIP_89218, "LAN89218" },
  29. { CHIP_9115, "LAN9115" },
  30. { CHIP_9116, "LAN9116" },
  31. { CHIP_9117, "LAN9117" },
  32. { CHIP_9118, "LAN9118" },
  33. { CHIP_9211, "LAN9211" },
  34. { CHIP_9215, "LAN9215" },
  35. { CHIP_9216, "LAN9216" },
  36. { CHIP_9217, "LAN9217" },
  37. { CHIP_9218, "LAN9218" },
  38. { CHIP_9220, "LAN9220" },
  39. { CHIP_9221, "LAN9221" },
  40. { 0, NULL },
  41. };
  42. #define DRIVERNAME "smc911x"
  43. #if defined (CONFIG_SMC911X_32_BIT) && \
  44. defined (CONFIG_SMC911X_16_BIT)
  45. #error "SMC911X: Only one of CONFIG_SMC911X_32_BIT and \
  46. CONFIG_SMC911X_16_BIT shall be set"
  47. #endif
  48. #if defined (CONFIG_SMC911X_32_BIT)
  49. static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
  50. {
  51. return readl(priv->iobase + offset);
  52. }
  53. static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
  54. {
  55. writel(val, priv->iobase + offset);
  56. }
  57. #elif defined (CONFIG_SMC911X_16_BIT)
  58. static u32 smc911x_reg_read(struct smc911x_priv *priv, u32 offset)
  59. {
  60. return (readw(priv->iobase + offset) & 0xffff) |
  61. (readw(priv->iobase + offset + 2) << 16);
  62. }
  63. static void smc911x_reg_write(struct smc911x_priv *priv, u32 offset, u32 val)
  64. {
  65. writew(val & 0xffff, priv->iobase + offset);
  66. writew(val >> 16, priv->iobase + offset + 2);
  67. }
  68. #else
  69. #error "SMC911X: undefined bus width"
  70. #endif /* CONFIG_SMC911X_16_BIT */
  71. static u32 smc911x_get_mac_csr(struct smc911x_priv *priv, u8 reg)
  72. {
  73. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  74. ;
  75. smc911x_reg_write(priv, MAC_CSR_CMD,
  76. MAC_CSR_CMD_CSR_BUSY | MAC_CSR_CMD_R_NOT_W | reg);
  77. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  78. ;
  79. return smc911x_reg_read(priv, MAC_CSR_DATA);
  80. }
  81. static void smc911x_set_mac_csr(struct smc911x_priv *priv, u8 reg, u32 data)
  82. {
  83. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  84. ;
  85. smc911x_reg_write(priv, MAC_CSR_DATA, data);
  86. smc911x_reg_write(priv, MAC_CSR_CMD, MAC_CSR_CMD_CSR_BUSY | reg);
  87. while (smc911x_reg_read(priv, MAC_CSR_CMD) & MAC_CSR_CMD_CSR_BUSY)
  88. ;
  89. }
  90. static int smc911x_detect_chip(struct smc911x_priv *priv)
  91. {
  92. unsigned long val, i;
  93. val = smc911x_reg_read(priv, BYTE_TEST);
  94. if (val == 0xffffffff) {
  95. /* Special case -- no chip present */
  96. return -1;
  97. } else if (val != 0x87654321) {
  98. printf(DRIVERNAME ": Invalid chip endian 0x%08lx\n", val);
  99. return -1;
  100. }
  101. val = smc911x_reg_read(priv, ID_REV) >> 16;
  102. for (i = 0; chip_ids[i].id != 0; i++) {
  103. if (chip_ids[i].id == val) break;
  104. }
  105. if (!chip_ids[i].id) {
  106. printf(DRIVERNAME ": Unknown chip ID %04lx\n", val);
  107. return -1;
  108. }
  109. priv->chipid = &chip_ids[i];
  110. return 0;
  111. }
  112. static void smc911x_reset(struct smc911x_priv *priv)
  113. {
  114. int timeout;
  115. /*
  116. * Take out of PM setting first
  117. * Device is already wake up if PMT_CTRL_READY bit is set
  118. */
  119. if ((smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY) == 0) {
  120. /* Write to the bytetest will take out of powerdown */
  121. smc911x_reg_write(priv, BYTE_TEST, 0x0);
  122. timeout = 10;
  123. while (timeout-- &&
  124. !(smc911x_reg_read(priv, PMT_CTRL) & PMT_CTRL_READY))
  125. udelay(10);
  126. if (timeout < 0) {
  127. printf(DRIVERNAME
  128. ": timeout waiting for PM restore\n");
  129. return;
  130. }
  131. }
  132. /* Disable interrupts */
  133. smc911x_reg_write(priv, INT_EN, 0);
  134. smc911x_reg_write(priv, HW_CFG, HW_CFG_SRST);
  135. timeout = 1000;
  136. while (timeout-- && smc911x_reg_read(priv, E2P_CMD) & E2P_CMD_EPC_BUSY)
  137. udelay(10);
  138. if (timeout < 0) {
  139. printf(DRIVERNAME ": reset timeout\n");
  140. return;
  141. }
  142. /* Reset the FIFO level and flow control settings */
  143. smc911x_set_mac_csr(priv, FLOW, FLOW_FCPT | FLOW_FCEN);
  144. smc911x_reg_write(priv, AFC_CFG, 0x0050287F);
  145. /* Set to LED outputs */
  146. smc911x_reg_write(priv, GPIO_CFG, 0x70070000);
  147. }
  148. static void smc911x_handle_mac_address(struct smc911x_priv *priv)
  149. {
  150. unsigned long addrh, addrl;
  151. unsigned char *m = priv->enetaddr;
  152. addrl = m[0] | (m[1] << 8) | (m[2] << 16) | (m[3] << 24);
  153. addrh = m[4] | (m[5] << 8);
  154. smc911x_set_mac_csr(priv, ADDRL, addrl);
  155. smc911x_set_mac_csr(priv, ADDRH, addrh);
  156. printf(DRIVERNAME ": MAC %pM\n", m);
  157. }
  158. static int smc911x_eth_phy_read(struct smc911x_priv *priv,
  159. u8 phy, u8 reg, u16 *val)
  160. {
  161. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  162. ;
  163. smc911x_set_mac_csr(priv, MII_ACC, phy << 11 | reg << 6 |
  164. MII_ACC_MII_BUSY);
  165. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  166. ;
  167. *val = smc911x_get_mac_csr(priv, MII_DATA);
  168. return 0;
  169. }
  170. static int smc911x_eth_phy_write(struct smc911x_priv *priv,
  171. u8 phy, u8 reg, u16 val)
  172. {
  173. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  174. ;
  175. smc911x_set_mac_csr(priv, MII_DATA, val);
  176. smc911x_set_mac_csr(priv, MII_ACC,
  177. phy << 11 | reg << 6 | MII_ACC_MII_BUSY | MII_ACC_MII_WRITE);
  178. while (smc911x_get_mac_csr(priv, MII_ACC) & MII_ACC_MII_BUSY)
  179. ;
  180. return 0;
  181. }
  182. static int smc911x_phy_reset(struct smc911x_priv *priv)
  183. {
  184. u32 reg;
  185. reg = smc911x_reg_read(priv, PMT_CTRL);
  186. reg &= ~0xfffff030;
  187. reg |= PMT_CTRL_PHY_RST;
  188. smc911x_reg_write(priv, PMT_CTRL, reg);
  189. mdelay(100);
  190. return 0;
  191. }
  192. static void smc911x_phy_configure(struct smc911x_priv *priv)
  193. {
  194. int timeout;
  195. u16 status;
  196. smc911x_phy_reset(priv);
  197. smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_RESET);
  198. mdelay(1);
  199. smc911x_eth_phy_write(priv, 1, MII_ADVERTISE, 0x01e1);
  200. smc911x_eth_phy_write(priv, 1, MII_BMCR, BMCR_ANENABLE |
  201. BMCR_ANRESTART);
  202. timeout = 5000;
  203. do {
  204. mdelay(1);
  205. if ((timeout--) == 0)
  206. goto err_out;
  207. if (smc911x_eth_phy_read(priv, 1, MII_BMSR, &status) != 0)
  208. goto err_out;
  209. } while (!(status & BMSR_LSTATUS));
  210. printf(DRIVERNAME ": phy initialized\n");
  211. return;
  212. err_out:
  213. printf(DRIVERNAME ": autonegotiation timed out\n");
  214. }
  215. static void smc911x_enable(struct smc911x_priv *priv)
  216. {
  217. /* Enable TX */
  218. smc911x_reg_write(priv, HW_CFG, 8 << 16 | HW_CFG_SF);
  219. smc911x_reg_write(priv, GPT_CFG, GPT_CFG_TIMER_EN | 10000);
  220. smc911x_reg_write(priv, TX_CFG, TX_CFG_TX_ON);
  221. /* no padding to start of packets */
  222. smc911x_reg_write(priv, RX_CFG, 0);
  223. smc911x_set_mac_csr(priv, MAC_CR, MAC_CR_TXEN | MAC_CR_RXEN |
  224. MAC_CR_HBDIS);
  225. }
  226. static int smc911x_init_common(struct smc911x_priv *priv)
  227. {
  228. const struct chip_id *id = priv->chipid;
  229. printf(DRIVERNAME ": detected %s controller\n", id->name);
  230. smc911x_reset(priv);
  231. /* Configure the PHY, initialize the link state */
  232. smc911x_phy_configure(priv);
  233. smc911x_handle_mac_address(priv);
  234. /* Turn on Tx + Rx */
  235. smc911x_enable(priv);
  236. return 0;
  237. }
  238. static int smc911x_send_common(struct smc911x_priv *priv,
  239. void *packet, int length)
  240. {
  241. u32 *data = (u32*)packet;
  242. u32 tmplen;
  243. u32 status;
  244. smc911x_reg_write(priv, TX_DATA_FIFO, TX_CMD_A_INT_FIRST_SEG |
  245. TX_CMD_A_INT_LAST_SEG | length);
  246. smc911x_reg_write(priv, TX_DATA_FIFO, length);
  247. tmplen = (length + 3) / 4;
  248. while (tmplen--)
  249. smc911x_reg_write(priv, TX_DATA_FIFO, *data++);
  250. /* wait for transmission */
  251. while (!((smc911x_reg_read(priv, TX_FIFO_INF) &
  252. TX_FIFO_INF_TSUSED) >> 16));
  253. /* get status. Ignore 'no carrier' error, it has no meaning for
  254. * full duplex operation
  255. */
  256. status = smc911x_reg_read(priv, TX_STATUS_FIFO) &
  257. (TX_STS_LOC | TX_STS_LATE_COLL | TX_STS_MANY_COLL |
  258. TX_STS_MANY_DEFER | TX_STS_UNDERRUN);
  259. if (!status)
  260. return 0;
  261. printf(DRIVERNAME ": failed to send packet: %s%s%s%s%s\n",
  262. status & TX_STS_LOC ? "TX_STS_LOC " : "",
  263. status & TX_STS_LATE_COLL ? "TX_STS_LATE_COLL " : "",
  264. status & TX_STS_MANY_COLL ? "TX_STS_MANY_COLL " : "",
  265. status & TX_STS_MANY_DEFER ? "TX_STS_MANY_DEFER " : "",
  266. status & TX_STS_UNDERRUN ? "TX_STS_UNDERRUN" : "");
  267. return -1;
  268. }
  269. static void smc911x_halt_common(struct smc911x_priv *priv)
  270. {
  271. smc911x_reset(priv);
  272. smc911x_handle_mac_address(priv);
  273. }
  274. static int smc911x_recv_common(struct smc911x_priv *priv, u32 *data)
  275. {
  276. u32 pktlen, tmplen;
  277. u32 status;
  278. status = smc911x_reg_read(priv, RX_FIFO_INF);
  279. if (!(status & RX_FIFO_INF_RXSUSED))
  280. return 0;
  281. status = smc911x_reg_read(priv, RX_STATUS_FIFO);
  282. pktlen = (status & RX_STS_PKT_LEN) >> 16;
  283. smc911x_reg_write(priv, RX_CFG, 0);
  284. tmplen = (pktlen + 3) / 4;
  285. while (tmplen--)
  286. *data++ = smc911x_reg_read(priv, RX_DATA_FIFO);
  287. if (status & RX_STS_ES) {
  288. printf(DRIVERNAME
  289. ": dropped bad packet. Status: 0x%08x\n",
  290. status);
  291. return 0;
  292. }
  293. return pktlen;
  294. }
  295. #ifndef CONFIG_DM_ETH
  296. #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
  297. /* wrapper for smc911x_eth_phy_read */
  298. static int smc911x_miiphy_read(struct mii_dev *bus, int phy, int devad,
  299. int reg)
  300. {
  301. struct eth_device *dev = eth_get_dev_by_name(bus->name);
  302. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  303. u16 val = 0;
  304. int ret;
  305. if (!dev || !priv)
  306. return -ENODEV;
  307. ret = smc911x_eth_phy_read(priv, phy, reg, &val);
  308. if (ret < 0)
  309. return ret;
  310. return val;
  311. }
  312. /* wrapper for smc911x_eth_phy_write */
  313. static int smc911x_miiphy_write(struct mii_dev *bus, int phy, int devad,
  314. int reg, u16 val)
  315. {
  316. struct eth_device *dev = eth_get_dev_by_name(bus->name);
  317. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  318. if (!dev || !priv)
  319. return -ENODEV;
  320. return smc911x_eth_phy_write(priv, phy, reg, val);
  321. }
  322. static int smc911x_initialize_mii(struct smc911x_priv *priv)
  323. {
  324. struct mii_dev *mdiodev = mdio_alloc();
  325. int ret;
  326. if (!mdiodev)
  327. return -ENOMEM;
  328. strncpy(mdiodev->name, priv->dev.name, MDIO_NAME_LEN);
  329. mdiodev->read = smc911x_miiphy_read;
  330. mdiodev->write = smc911x_miiphy_write;
  331. ret = mdio_register(mdiodev);
  332. if (ret < 0) {
  333. mdio_free(mdiodev);
  334. return ret;
  335. }
  336. return 0;
  337. }
  338. #else
  339. static int smc911x_initialize_mii(struct smc911x_priv *priv)
  340. {
  341. return 0;
  342. }
  343. #endif
  344. static int smc911x_init(struct eth_device *dev, bd_t *bd)
  345. {
  346. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  347. return smc911x_init_common(priv);
  348. }
  349. static void smc911x_halt(struct eth_device *dev)
  350. {
  351. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  352. smc911x_halt_common(priv);
  353. }
  354. static int smc911x_send(struct eth_device *dev, void *packet, int length)
  355. {
  356. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  357. return smc911x_send_common(priv, packet, length);
  358. }
  359. static int smc911x_recv(struct eth_device *dev)
  360. {
  361. struct smc911x_priv *priv = container_of(dev, struct smc911x_priv, dev);
  362. u32 *data = (u32 *)net_rx_packets[0];
  363. int ret;
  364. ret = smc911x_recv_common(priv, data);
  365. if (ret)
  366. net_process_received_packet(net_rx_packets[0], ret);
  367. return ret;
  368. }
  369. int smc911x_initialize(u8 dev_num, int base_addr)
  370. {
  371. unsigned long addrl, addrh;
  372. struct smc911x_priv *priv;
  373. int ret;
  374. priv = calloc(1, sizeof(*priv));
  375. if (!priv)
  376. return -ENOMEM;
  377. priv->iobase = base_addr;
  378. priv->dev.iobase = base_addr;
  379. /* Try to detect chip. Will fail if not present. */
  380. ret = smc911x_detect_chip(priv);
  381. if (ret) {
  382. ret = 0; /* Card not detected is not an error */
  383. goto err_detect;
  384. }
  385. addrh = smc911x_get_mac_csr(priv, ADDRH);
  386. addrl = smc911x_get_mac_csr(priv, ADDRL);
  387. if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
  388. /* address is obtained from optional eeprom */
  389. priv->enetaddr[0] = addrl;
  390. priv->enetaddr[1] = addrl >> 8;
  391. priv->enetaddr[2] = addrl >> 16;
  392. priv->enetaddr[3] = addrl >> 24;
  393. priv->enetaddr[4] = addrh;
  394. priv->enetaddr[5] = addrh >> 8;
  395. memcpy(priv->dev.enetaddr, priv->enetaddr, 6);
  396. }
  397. priv->dev.init = smc911x_init;
  398. priv->dev.halt = smc911x_halt;
  399. priv->dev.send = smc911x_send;
  400. priv->dev.recv = smc911x_recv;
  401. sprintf(priv->dev.name, "%s-%hu", DRIVERNAME, dev_num);
  402. eth_register(&priv->dev);
  403. ret = smc911x_initialize_mii(priv);
  404. if (ret)
  405. goto err_mii;
  406. return 1;
  407. err_mii:
  408. eth_unregister(&priv->dev);
  409. err_detect:
  410. free(priv);
  411. return ret;
  412. }
  413. #else /* ifdef CONFIG_DM_ETH */
  414. static int smc911x_start(struct udevice *dev)
  415. {
  416. struct eth_pdata *plat = dev_get_platdata(dev);
  417. struct smc911x_priv *priv = dev_get_priv(dev);
  418. memcpy(priv->enetaddr, plat->enetaddr, sizeof(plat->enetaddr));
  419. return smc911x_init_common(priv);
  420. }
  421. static void smc911x_stop(struct udevice *dev)
  422. {
  423. struct smc911x_priv *priv = dev_get_priv(dev);
  424. smc911x_halt_common(priv);
  425. }
  426. static int smc911x_send(struct udevice *dev, void *packet, int length)
  427. {
  428. struct smc911x_priv *priv = dev_get_priv(dev);
  429. int ret;
  430. ret = smc911x_send_common(priv, packet, length);
  431. return ret ? 0 : -ETIMEDOUT;
  432. }
  433. static int smc911x_recv(struct udevice *dev, int flags, uchar **packetp)
  434. {
  435. struct smc911x_priv *priv = dev_get_priv(dev);
  436. u32 *data = (u32 *)net_rx_packets[0];
  437. int ret;
  438. ret = smc911x_recv_common(priv, data);
  439. if (ret)
  440. *packetp = (void *)data;
  441. return ret ? ret : -EAGAIN;
  442. }
  443. static int smc911x_bind(struct udevice *dev)
  444. {
  445. return device_set_name(dev, dev->name);
  446. }
  447. static int smc911x_probe(struct udevice *dev)
  448. {
  449. struct smc911x_priv *priv = dev_get_priv(dev);
  450. unsigned long addrh, addrl;
  451. int ret;
  452. /* Try to detect chip. Will fail if not present. */
  453. ret = smc911x_detect_chip(priv);
  454. if (ret)
  455. return ret;
  456. addrh = smc911x_get_mac_csr(priv, ADDRH);
  457. addrl = smc911x_get_mac_csr(priv, ADDRL);
  458. if (!(addrl == 0xffffffff && addrh == 0x0000ffff)) {
  459. /* address is obtained from optional eeprom */
  460. priv->enetaddr[0] = addrl;
  461. priv->enetaddr[1] = addrl >> 8;
  462. priv->enetaddr[2] = addrl >> 16;
  463. priv->enetaddr[3] = addrl >> 24;
  464. priv->enetaddr[4] = addrh;
  465. priv->enetaddr[5] = addrh >> 8;
  466. }
  467. return 0;
  468. }
  469. static int smc911x_ofdata_to_platdata(struct udevice *dev)
  470. {
  471. struct smc911x_priv *priv = dev_get_priv(dev);
  472. struct eth_pdata *pdata = dev_get_platdata(dev);
  473. pdata->iobase = devfdt_get_addr(dev);
  474. priv->iobase = pdata->iobase;
  475. return 0;
  476. }
  477. static const struct eth_ops smc911x_ops = {
  478. .start = smc911x_start,
  479. .send = smc911x_send,
  480. .recv = smc911x_recv,
  481. .stop = smc911x_stop,
  482. };
  483. static const struct udevice_id smc911x_ids[] = {
  484. { .compatible = "smsc,lan9115" },
  485. { }
  486. };
  487. U_BOOT_DRIVER(smc911x) = {
  488. .name = "eth_smc911x",
  489. .id = UCLASS_ETH,
  490. .of_match = smc911x_ids,
  491. .bind = smc911x_bind,
  492. .ofdata_to_platdata = smc911x_ofdata_to_platdata,
  493. .probe = smc911x_probe,
  494. .ops = &smc911x_ops,
  495. .priv_auto_alloc_size = sizeof(struct smc911x_priv),
  496. .platdata_auto_alloc_size = sizeof(struct eth_pdata),
  497. .flags = DM_FLAG_ALLOC_PRIV_DMA,
  498. };
  499. #endif