cmd_ide.c 51 KB

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  1. /*
  2. * (C) Copyright 2000-2011
  3. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * IDE support
  26. */
  27. #include <common.h>
  28. #include <config.h>
  29. #include <watchdog.h>
  30. #include <command.h>
  31. #include <image.h>
  32. #include <asm/byteorder.h>
  33. #include <asm/io.h>
  34. #if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
  35. # include <pcmcia.h>
  36. #endif
  37. #ifdef CONFIG_8xx
  38. # include <mpc8xx.h>
  39. #endif
  40. #ifdef CONFIG_MPC5xxx
  41. #include <mpc5xxx.h>
  42. #endif
  43. #include <ide.h>
  44. #include <ata.h>
  45. #ifdef CONFIG_STATUS_LED
  46. # include <status_led.h>
  47. #endif
  48. #ifdef CONFIG_IDE_8xx_DIRECT
  49. DECLARE_GLOBAL_DATA_PTR;
  50. #endif
  51. #ifdef __PPC__
  52. # define EIEIO __asm__ volatile ("eieio")
  53. # define SYNC __asm__ volatile ("sync")
  54. #else
  55. # define EIEIO /* nothing */
  56. # define SYNC /* nothing */
  57. #endif
  58. #ifdef CONFIG_IDE_8xx_DIRECT
  59. /* Timings for IDE Interface
  60. *
  61. * SETUP / LENGTH / HOLD - cycles valid for 50 MHz clk
  62. * 70 165 30 PIO-Mode 0, [ns]
  63. * 4 9 2 [Cycles]
  64. * 50 125 20 PIO-Mode 1, [ns]
  65. * 3 7 2 [Cycles]
  66. * 30 100 15 PIO-Mode 2, [ns]
  67. * 2 6 1 [Cycles]
  68. * 30 80 10 PIO-Mode 3, [ns]
  69. * 2 5 1 [Cycles]
  70. * 25 70 10 PIO-Mode 4, [ns]
  71. * 2 4 1 [Cycles]
  72. */
  73. const static pio_config_t pio_config_ns [IDE_MAX_PIO_MODE+1] =
  74. {
  75. /* Setup Length Hold */
  76. { 70, 165, 30 }, /* PIO-Mode 0, [ns] */
  77. { 50, 125, 20 }, /* PIO-Mode 1, [ns] */
  78. { 30, 101, 15 }, /* PIO-Mode 2, [ns] */
  79. { 30, 80, 10 }, /* PIO-Mode 3, [ns] */
  80. { 25, 70, 10 }, /* PIO-Mode 4, [ns] */
  81. };
  82. static pio_config_t pio_config_clk [IDE_MAX_PIO_MODE+1];
  83. #ifndef CONFIG_SYS_PIO_MODE
  84. #define CONFIG_SYS_PIO_MODE 0 /* use a relaxed default */
  85. #endif
  86. static int pio_mode = CONFIG_SYS_PIO_MODE;
  87. /* Make clock cycles and always round up */
  88. #define PCMCIA_MK_CLKS( t, T ) (( (t) * (T) + 999U ) / 1000U )
  89. #endif /* CONFIG_IDE_8xx_DIRECT */
  90. /* ------------------------------------------------------------------------- */
  91. /* Current I/O Device */
  92. static int curr_device = -1;
  93. /* Current offset for IDE0 / IDE1 bus access */
  94. ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
  95. #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
  96. CONFIG_SYS_ATA_IDE0_OFFSET,
  97. #endif
  98. #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
  99. CONFIG_SYS_ATA_IDE1_OFFSET,
  100. #endif
  101. };
  102. static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
  103. block_dev_desc_t ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
  104. /* ------------------------------------------------------------------------- */
  105. #ifdef CONFIG_IDE_LED
  106. # if !defined(CONFIG_BMS2003) && \
  107. !defined(CONFIG_CPC45) && \
  108. !defined(CONFIG_KUP4K) && \
  109. !defined(CONFIG_KUP4X)
  110. static void ide_led (uchar led, uchar status);
  111. #else
  112. extern void ide_led (uchar led, uchar status);
  113. #endif
  114. #else
  115. #define ide_led(a,b) /* dummy */
  116. #endif
  117. #ifdef CONFIG_IDE_RESET
  118. static void ide_reset (void);
  119. #else
  120. #define ide_reset() /* dummy */
  121. #endif
  122. static void ide_ident (block_dev_desc_t *dev_desc);
  123. static uchar ide_wait (int dev, ulong t);
  124. #define IDE_TIME_OUT 2000 /* 2 sec timeout */
  125. #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
  126. #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
  127. static void input_data(int dev, ulong *sect_buf, int words);
  128. static void output_data(int dev, const ulong *sect_buf, int words);
  129. static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
  130. #ifndef CONFIG_SYS_ATA_PORT_ADDR
  131. #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
  132. #endif
  133. #ifdef CONFIG_ATAPI
  134. static void atapi_inquiry(block_dev_desc_t *dev_desc);
  135. ulong atapi_read (int device, lbaint_t blknr, ulong blkcnt, void *buffer);
  136. #endif
  137. #ifdef CONFIG_IDE_8xx_DIRECT
  138. static void set_pcmcia_timing (int pmode);
  139. #endif
  140. /* ------------------------------------------------------------------------- */
  141. int do_ide(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  142. {
  143. int rcode = 0;
  144. switch (argc) {
  145. case 0:
  146. case 1:
  147. return CMD_RET_USAGE;
  148. case 2:
  149. if (strncmp(argv[1], "res", 3) == 0) {
  150. puts("\nReset IDE"
  151. #ifdef CONFIG_IDE_8xx_DIRECT
  152. " on PCMCIA " PCMCIA_SLOT_MSG
  153. #endif
  154. ": ");
  155. ide_init();
  156. return 0;
  157. } else if (strncmp(argv[1], "inf", 3) == 0) {
  158. int i;
  159. putc('\n');
  160. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  161. if (ide_dev_desc[i].type == DEV_TYPE_UNKNOWN)
  162. continue; /* list only known devices */
  163. printf("IDE device %d: ", i);
  164. dev_print(&ide_dev_desc[i]);
  165. }
  166. return 0;
  167. } else if (strncmp(argv[1], "dev", 3) == 0) {
  168. if ((curr_device < 0)
  169. || (curr_device >= CONFIG_SYS_IDE_MAXDEVICE)) {
  170. puts("\nno IDE devices available\n");
  171. return 1;
  172. }
  173. printf("\nIDE device %d: ", curr_device);
  174. dev_print(&ide_dev_desc[curr_device]);
  175. return 0;
  176. } else if (strncmp(argv[1], "part", 4) == 0) {
  177. int dev, ok;
  178. for (ok = 0, dev = 0;
  179. dev < CONFIG_SYS_IDE_MAXDEVICE;
  180. ++dev) {
  181. if (ide_dev_desc[dev].part_type !=
  182. PART_TYPE_UNKNOWN) {
  183. ++ok;
  184. if (dev)
  185. putc('\n');
  186. print_part(&ide_dev_desc[dev]);
  187. }
  188. }
  189. if (!ok) {
  190. puts("\nno IDE devices available\n");
  191. rcode++;
  192. }
  193. return rcode;
  194. }
  195. return CMD_RET_USAGE;
  196. case 3:
  197. if (strncmp(argv[1], "dev", 3) == 0) {
  198. int dev = (int) simple_strtoul(argv[2], NULL, 10);
  199. printf("\nIDE device %d: ", dev);
  200. if (dev >= CONFIG_SYS_IDE_MAXDEVICE) {
  201. puts("unknown device\n");
  202. return 1;
  203. }
  204. dev_print(&ide_dev_desc[dev]);
  205. /*ide_print (dev); */
  206. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
  207. return 1;
  208. curr_device = dev;
  209. puts("... is now current device\n");
  210. return 0;
  211. } else if (strncmp(argv[1], "part", 4) == 0) {
  212. int dev = (int) simple_strtoul(argv[2], NULL, 10);
  213. if (ide_dev_desc[dev].part_type != PART_TYPE_UNKNOWN) {
  214. print_part(&ide_dev_desc[dev]);
  215. } else {
  216. printf("\nIDE device %d not available\n",
  217. dev);
  218. rcode = 1;
  219. }
  220. return rcode;
  221. }
  222. return CMD_RET_USAGE;
  223. default:
  224. /* at least 4 args */
  225. if (strcmp(argv[1], "read") == 0) {
  226. ulong addr = simple_strtoul(argv[2], NULL, 16);
  227. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  228. ulong n;
  229. #ifdef CONFIG_SYS_64BIT_LBA
  230. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  231. printf("\nIDE read: device %d block # %lld, count %ld ... ",
  232. curr_device, blk, cnt);
  233. #else
  234. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  235. printf("\nIDE read: device %d block # %ld, count %ld ... ",
  236. curr_device, blk, cnt);
  237. #endif
  238. n = ide_dev_desc[curr_device].block_read(curr_device,
  239. blk, cnt,
  240. (ulong *)addr);
  241. /* flush cache after read */
  242. flush_cache(addr,
  243. cnt * ide_dev_desc[curr_device].blksz);
  244. printf("%ld blocks read: %s\n",
  245. n, (n == cnt) ? "OK" : "ERROR");
  246. if (n == cnt)
  247. return 0;
  248. else
  249. return 1;
  250. } else if (strcmp(argv[1], "write") == 0) {
  251. ulong addr = simple_strtoul(argv[2], NULL, 16);
  252. ulong cnt = simple_strtoul(argv[4], NULL, 16);
  253. ulong n;
  254. #ifdef CONFIG_SYS_64BIT_LBA
  255. lbaint_t blk = simple_strtoull(argv[3], NULL, 16);
  256. printf("\nIDE write: device %d block # %lld, count %ld ... ",
  257. curr_device, blk, cnt);
  258. #else
  259. lbaint_t blk = simple_strtoul(argv[3], NULL, 16);
  260. printf("\nIDE write: device %d block # %ld, count %ld ... ",
  261. curr_device, blk, cnt);
  262. #endif
  263. n = ide_write(curr_device, blk, cnt, (ulong *) addr);
  264. printf("%ld blocks written: %s\n",
  265. n, (n == cnt) ? "OK" : "ERROR");
  266. if (n == cnt)
  267. return 0;
  268. else
  269. return 1;
  270. } else {
  271. return CMD_RET_USAGE;
  272. }
  273. return rcode;
  274. }
  275. }
  276. int do_diskboot(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
  277. {
  278. char *boot_device = NULL;
  279. char *ep;
  280. int dev, part = 0;
  281. ulong addr, cnt;
  282. disk_partition_t info;
  283. image_header_t *hdr;
  284. #if defined(CONFIG_FIT)
  285. const void *fit_hdr = NULL;
  286. #endif
  287. bootstage_mark(BOOTSTAGE_ID_IDE_START);
  288. switch (argc) {
  289. case 1:
  290. addr = CONFIG_SYS_LOAD_ADDR;
  291. boot_device = getenv("bootdevice");
  292. break;
  293. case 2:
  294. addr = simple_strtoul(argv[1], NULL, 16);
  295. boot_device = getenv("bootdevice");
  296. break;
  297. case 3:
  298. addr = simple_strtoul(argv[1], NULL, 16);
  299. boot_device = argv[2];
  300. break;
  301. default:
  302. bootstage_error(BOOTSTAGE_ID_IDE_ADDR);
  303. return CMD_RET_USAGE;
  304. }
  305. bootstage_mark(BOOTSTAGE_ID_IDE_ADDR);
  306. if (!boot_device) {
  307. puts("\n** No boot device **\n");
  308. bootstage_error(BOOTSTAGE_ID_IDE_BOOT_DEVICE);
  309. return 1;
  310. }
  311. bootstage_mark(BOOTSTAGE_ID_IDE_BOOT_DEVICE);
  312. dev = simple_strtoul(boot_device, &ep, 16);
  313. if (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN) {
  314. printf("\n** Device %d not available\n", dev);
  315. bootstage_error(BOOTSTAGE_ID_IDE_TYPE);
  316. return 1;
  317. }
  318. bootstage_mark(BOOTSTAGE_ID_IDE_TYPE);
  319. if (*ep) {
  320. if (*ep != ':') {
  321. puts("\n** Invalid boot device, use `dev[:part]' **\n");
  322. bootstage_error(BOOTSTAGE_ID_IDE_PART);
  323. return 1;
  324. }
  325. part = simple_strtoul(++ep, NULL, 16);
  326. }
  327. bootstage_mark(BOOTSTAGE_ID_IDE_PART);
  328. if (get_partition_info(&ide_dev_desc[dev], part, &info)) {
  329. bootstage_error(BOOTSTAGE_ID_IDE_PART_INFO);
  330. return 1;
  331. }
  332. bootstage_mark(BOOTSTAGE_ID_IDE_PART_INFO);
  333. if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0)
  334. &&
  335. (strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)
  336. ) {
  337. printf("\n** Invalid partition type \"%.32s\"" " (expect \""
  338. BOOT_PART_TYPE "\")\n",
  339. info.type);
  340. bootstage_error(BOOTSTAGE_ID_IDE_PART_TYPE);
  341. return 1;
  342. }
  343. bootstage_mark(BOOTSTAGE_ID_IDE_PART_TYPE);
  344. printf("\nLoading from IDE device %d, partition %d: "
  345. "Name: %.32s Type: %.32s\n", dev, part, info.name, info.type);
  346. debug("First Block: %ld, # of blocks: %ld, Block Size: %ld\n",
  347. info.start, info.size, info.blksz);
  348. if (ide_dev_desc[dev].
  349. block_read(dev, info.start, 1, (ulong *) addr) != 1) {
  350. printf("** Read error on %d:%d\n", dev, part);
  351. bootstage_error(BOOTSTAGE_ID_IDE_PART_READ);
  352. return 1;
  353. }
  354. bootstage_mark(BOOTSTAGE_ID_IDE_PART_READ);
  355. switch (genimg_get_format((void *) addr)) {
  356. case IMAGE_FORMAT_LEGACY:
  357. hdr = (image_header_t *) addr;
  358. bootstage_mark(BOOTSTAGE_ID_IDE_FORMAT);
  359. if (!image_check_hcrc(hdr)) {
  360. puts("\n** Bad Header Checksum **\n");
  361. bootstage_error(BOOTSTAGE_ID_IDE_CHECKSUM);
  362. return 1;
  363. }
  364. bootstage_mark(BOOTSTAGE_ID_IDE_CHECKSUM);
  365. image_print_contents(hdr);
  366. cnt = image_get_image_size(hdr);
  367. break;
  368. #if defined(CONFIG_FIT)
  369. case IMAGE_FORMAT_FIT:
  370. fit_hdr = (const void *) addr;
  371. puts("Fit image detected...\n");
  372. cnt = fit_get_size(fit_hdr);
  373. break;
  374. #endif
  375. default:
  376. bootstage_error(BOOTSTAGE_ID_IDE_FORMAT);
  377. puts("** Unknown image type\n");
  378. return 1;
  379. }
  380. cnt += info.blksz - 1;
  381. cnt /= info.blksz;
  382. cnt -= 1;
  383. if (ide_dev_desc[dev].block_read(dev, info.start + 1, cnt,
  384. (ulong *)(addr + info.blksz)) != cnt) {
  385. printf("** Read error on %d:%d\n", dev, part);
  386. bootstage_error(BOOTSTAGE_ID_IDE_READ);
  387. return 1;
  388. }
  389. bootstage_mark(BOOTSTAGE_ID_IDE_READ);
  390. #if defined(CONFIG_FIT)
  391. /* This cannot be done earlier, we need complete FIT image in RAM first */
  392. if (genimg_get_format((void *) addr) == IMAGE_FORMAT_FIT) {
  393. if (!fit_check_format(fit_hdr)) {
  394. bootstage_error(BOOTSTAGE_ID_IDE_FIT_READ);
  395. puts("** Bad FIT image format\n");
  396. return 1;
  397. }
  398. bootstage_mark(BOOTSTAGE_ID_IDE_FIT_READ_OK);
  399. fit_print_contents(fit_hdr);
  400. }
  401. #endif
  402. /* Loading ok, update default load address */
  403. load_addr = addr;
  404. return bootm_maybe_autostart(cmdtp, argv[0]);
  405. }
  406. /* ------------------------------------------------------------------------- */
  407. inline void __ide_outb(int dev, int port, unsigned char val)
  408. {
  409. debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
  410. dev, port, val,
  411. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  412. #if defined(CONFIG_IDE_AHB)
  413. if (port) {
  414. /* write command */
  415. ide_write_register(dev, port, val);
  416. } else {
  417. /* write data */
  418. outb(val, (ATA_CURR_BASE(dev)));
  419. }
  420. #else
  421. outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  422. #endif
  423. }
  424. void ide_outb(int dev, int port, unsigned char val)
  425. __attribute__ ((weak, alias("__ide_outb")));
  426. inline unsigned char __ide_inb(int dev, int port)
  427. {
  428. uchar val;
  429. #if defined(CONFIG_IDE_AHB)
  430. val = ide_read_register(dev, port);
  431. #else
  432. val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
  433. #endif
  434. debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
  435. dev, port,
  436. (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
  437. return val;
  438. }
  439. unsigned char ide_inb(int dev, int port)
  440. __attribute__ ((weak, alias("__ide_inb")));
  441. #ifdef CONFIG_TUNE_PIO
  442. inline int __ide_set_piomode(int pio_mode)
  443. {
  444. return 0;
  445. }
  446. inline int ide_set_piomode(int pio_mode)
  447. __attribute__ ((weak, alias("__ide_set_piomode")));
  448. #endif
  449. void ide_init(void)
  450. {
  451. #ifdef CONFIG_IDE_8xx_DIRECT
  452. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  453. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  454. #endif
  455. unsigned char c;
  456. int i, bus;
  457. #if defined(CONFIG_SC3)
  458. unsigned int ata_reset_time = ATA_RESET_TIME;
  459. #endif
  460. #ifdef CONFIG_IDE_8xx_PCCARD
  461. extern int pcmcia_on(void);
  462. extern int ide_devices_found; /* Initialized in check_ide_device() */
  463. #endif /* CONFIG_IDE_8xx_PCCARD */
  464. #ifdef CONFIG_IDE_PREINIT
  465. extern int ide_preinit(void);
  466. WATCHDOG_RESET();
  467. if (ide_preinit()) {
  468. puts("ide_preinit failed\n");
  469. return;
  470. }
  471. #endif /* CONFIG_IDE_PREINIT */
  472. #ifdef CONFIG_IDE_8xx_PCCARD
  473. extern int pcmcia_on(void);
  474. extern int ide_devices_found; /* Initialized in check_ide_device() */
  475. WATCHDOG_RESET();
  476. ide_devices_found = 0;
  477. /* initialize the PCMCIA IDE adapter card */
  478. pcmcia_on();
  479. if (!ide_devices_found)
  480. return;
  481. udelay(1000000); /* 1 s */
  482. #endif /* CONFIG_IDE_8xx_PCCARD */
  483. WATCHDOG_RESET();
  484. #ifdef CONFIG_IDE_8xx_DIRECT
  485. /* Initialize PIO timing tables */
  486. for (i = 0; i <= IDE_MAX_PIO_MODE; ++i) {
  487. pio_config_clk[i].t_setup =
  488. PCMCIA_MK_CLKS(pio_config_ns[i].t_setup, gd->bus_clk);
  489. pio_config_clk[i].t_length =
  490. PCMCIA_MK_CLKS(pio_config_ns[i].t_length,
  491. gd->bus_clk);
  492. pio_config_clk[i].t_hold =
  493. PCMCIA_MK_CLKS(pio_config_ns[i].t_hold, gd->bus_clk);
  494. debug("PIO Mode %d: setup=%2d ns/%d clk" " len=%3d ns/%d clk"
  495. " hold=%2d ns/%d clk\n", i, pio_config_ns[i].t_setup,
  496. pio_config_clk[i].t_setup, pio_config_ns[i].t_length,
  497. pio_config_clk[i].t_length, pio_config_ns[i].t_hold,
  498. pio_config_clk[i].t_hold);
  499. }
  500. #endif /* CONFIG_IDE_8xx_DIRECT */
  501. /*
  502. * Reset the IDE just to be sure.
  503. * Light LED's to show
  504. */
  505. ide_led((LED_IDE1 | LED_IDE2), 1); /* LED's on */
  506. /* ATAPI Drives seems to need a proper IDE Reset */
  507. ide_reset();
  508. #ifdef CONFIG_IDE_8xx_DIRECT
  509. /* PCMCIA / IDE initialization for common mem space */
  510. pcmp->pcmc_pgcrb = 0;
  511. /* start in PIO mode 0 - most relaxed timings */
  512. pio_mode = 0;
  513. set_pcmcia_timing(pio_mode);
  514. #endif /* CONFIG_IDE_8xx_DIRECT */
  515. /*
  516. * Wait for IDE to get ready.
  517. * According to spec, this can take up to 31 seconds!
  518. */
  519. for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
  520. int dev =
  521. bus * (CONFIG_SYS_IDE_MAXDEVICE /
  522. CONFIG_SYS_IDE_MAXBUS);
  523. #ifdef CONFIG_IDE_8xx_PCCARD
  524. /* Skip non-ide devices from probing */
  525. if ((ide_devices_found & (1 << bus)) == 0) {
  526. ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  527. continue;
  528. }
  529. #endif
  530. printf("Bus %d: ", bus);
  531. ide_bus_ok[bus] = 0;
  532. /* Select device
  533. */
  534. udelay(100000); /* 100 ms */
  535. ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
  536. udelay(100000); /* 100 ms */
  537. i = 0;
  538. do {
  539. udelay(10000); /* 10 ms */
  540. c = ide_inb(dev, ATA_STATUS);
  541. i++;
  542. #if defined(CONFIG_SC3)
  543. if (i > (ata_reset_time * 100)) {
  544. #else
  545. if (i > (ATA_RESET_TIME * 100)) {
  546. #endif
  547. puts("** Timeout **\n");
  548. /* LED's off */
  549. ide_led((LED_IDE1 | LED_IDE2), 0);
  550. return;
  551. }
  552. if ((i >= 100) && ((i % 100) == 0))
  553. putc('.');
  554. } while (c & ATA_STAT_BUSY);
  555. if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
  556. puts("not available ");
  557. debug("Status = 0x%02X ", c);
  558. #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
  559. } else if ((c & ATA_STAT_READY) == 0) {
  560. puts("not available ");
  561. debug("Status = 0x%02X ", c);
  562. #endif
  563. } else {
  564. puts("OK ");
  565. ide_bus_ok[bus] = 1;
  566. }
  567. WATCHDOG_RESET();
  568. }
  569. putc('\n');
  570. ide_led((LED_IDE1 | LED_IDE2), 0); /* LED's off */
  571. curr_device = -1;
  572. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
  573. #ifdef CONFIG_IDE_LED
  574. int led = (IDE_BUS(i) == 0) ? LED_IDE1 : LED_IDE2;
  575. #endif
  576. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  577. ide_dev_desc[i].if_type = IF_TYPE_IDE;
  578. ide_dev_desc[i].dev = i;
  579. ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
  580. ide_dev_desc[i].blksz = 0;
  581. ide_dev_desc[i].lba = 0;
  582. ide_dev_desc[i].block_read = ide_read;
  583. ide_dev_desc[i].block_write = ide_write;
  584. if (!ide_bus_ok[IDE_BUS(i)])
  585. continue;
  586. ide_led(led, 1); /* LED on */
  587. ide_ident(&ide_dev_desc[i]);
  588. ide_led(led, 0); /* LED off */
  589. dev_print(&ide_dev_desc[i]);
  590. if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
  591. /* initialize partition type */
  592. init_part(&ide_dev_desc[i]);
  593. if (curr_device < 0)
  594. curr_device = i;
  595. }
  596. }
  597. WATCHDOG_RESET();
  598. }
  599. /* ------------------------------------------------------------------------- */
  600. #ifdef CONFIG_PARTITIONS
  601. block_dev_desc_t *ide_get_dev(int dev)
  602. {
  603. return (dev < CONFIG_SYS_IDE_MAXDEVICE) ? &ide_dev_desc[dev] : NULL;
  604. }
  605. #endif
  606. #ifdef CONFIG_IDE_8xx_DIRECT
  607. static void set_pcmcia_timing(int pmode)
  608. {
  609. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  610. volatile pcmconf8xx_t *pcmp = &(immr->im_pcmcia);
  611. ulong timings;
  612. debug("Set timing for PIO Mode %d\n", pmode);
  613. timings = PCMCIA_SHT(pio_config_clk[pmode].t_hold)
  614. | PCMCIA_SST(pio_config_clk[pmode].t_setup)
  615. | PCMCIA_SL(pio_config_clk[pmode].t_length);
  616. /*
  617. * IDE 0
  618. */
  619. pcmp->pcmc_pbr0 = CONFIG_SYS_PCMCIA_PBR0;
  620. pcmp->pcmc_por0 = CONFIG_SYS_PCMCIA_POR0
  621. #if (CONFIG_SYS_PCMCIA_POR0 != 0)
  622. | timings
  623. #endif
  624. ;
  625. debug("PBR0: %08x POR0: %08x\n", pcmp->pcmc_pbr0, pcmp->pcmc_por0);
  626. pcmp->pcmc_pbr1 = CONFIG_SYS_PCMCIA_PBR1;
  627. pcmp->pcmc_por1 = CONFIG_SYS_PCMCIA_POR1
  628. #if (CONFIG_SYS_PCMCIA_POR1 != 0)
  629. | timings
  630. #endif
  631. ;
  632. debug("PBR1: %08x POR1: %08x\n", pcmp->pcmc_pbr1, pcmp->pcmc_por1);
  633. pcmp->pcmc_pbr2 = CONFIG_SYS_PCMCIA_PBR2;
  634. pcmp->pcmc_por2 = CONFIG_SYS_PCMCIA_POR2
  635. #if (CONFIG_SYS_PCMCIA_POR2 != 0)
  636. | timings
  637. #endif
  638. ;
  639. debug("PBR2: %08x POR2: %08x\n", pcmp->pcmc_pbr2, pcmp->pcmc_por2);
  640. pcmp->pcmc_pbr3 = CONFIG_SYS_PCMCIA_PBR3;
  641. pcmp->pcmc_por3 = CONFIG_SYS_PCMCIA_POR3
  642. #if (CONFIG_SYS_PCMCIA_POR3 != 0)
  643. | timings
  644. #endif
  645. ;
  646. debug("PBR3: %08x POR3: %08x\n", pcmp->pcmc_pbr3, pcmp->pcmc_por3);
  647. /*
  648. * IDE 1
  649. */
  650. pcmp->pcmc_pbr4 = CONFIG_SYS_PCMCIA_PBR4;
  651. pcmp->pcmc_por4 = CONFIG_SYS_PCMCIA_POR4
  652. #if (CONFIG_SYS_PCMCIA_POR4 != 0)
  653. | timings
  654. #endif
  655. ;
  656. debug("PBR4: %08x POR4: %08x\n", pcmp->pcmc_pbr4, pcmp->pcmc_por4);
  657. pcmp->pcmc_pbr5 = CONFIG_SYS_PCMCIA_PBR5;
  658. pcmp->pcmc_por5 = CONFIG_SYS_PCMCIA_POR5
  659. #if (CONFIG_SYS_PCMCIA_POR5 != 0)
  660. | timings
  661. #endif
  662. ;
  663. debug("PBR5: %08x POR5: %08x\n", pcmp->pcmc_pbr5, pcmp->pcmc_por5);
  664. pcmp->pcmc_pbr6 = CONFIG_SYS_PCMCIA_PBR6;
  665. pcmp->pcmc_por6 = CONFIG_SYS_PCMCIA_POR6
  666. #if (CONFIG_SYS_PCMCIA_POR6 != 0)
  667. | timings
  668. #endif
  669. ;
  670. debug("PBR6: %08x POR6: %08x\n", pcmp->pcmc_pbr6, pcmp->pcmc_por6);
  671. pcmp->pcmc_pbr7 = CONFIG_SYS_PCMCIA_PBR7;
  672. pcmp->pcmc_por7 = CONFIG_SYS_PCMCIA_POR7
  673. #if (CONFIG_SYS_PCMCIA_POR7 != 0)
  674. | timings
  675. #endif
  676. ;
  677. debug("PBR7: %08x POR7: %08x\n", pcmp->pcmc_pbr7, pcmp->pcmc_por7);
  678. }
  679. #endif /* CONFIG_IDE_8xx_DIRECT */
  680. /* ------------------------------------------------------------------------- */
  681. /* We only need to swap data if we are running on a big endian cpu. */
  682. /* But Au1x00 cpu:s already swaps data in big endian mode! */
  683. #if defined(__LITTLE_ENDIAN) || \
  684. (defined(CONFIG_SOC_AU1X00) && !defined(CONFIG_GTH2))
  685. #define input_swap_data(x,y,z) input_data(x,y,z)
  686. #else
  687. static void input_swap_data(int dev, ulong *sect_buf, int words)
  688. {
  689. #if defined(CONFIG_CPC45)
  690. uchar i;
  691. volatile uchar *pbuf_even =
  692. (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  693. volatile uchar *pbuf_odd =
  694. (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  695. ushort *dbuf = (ushort *) sect_buf;
  696. while (words--) {
  697. for (i = 0; i < 2; i++) {
  698. *(((uchar *) (dbuf)) + 1) = *pbuf_even;
  699. *(uchar *) dbuf = *pbuf_odd;
  700. dbuf += 1;
  701. }
  702. }
  703. #else
  704. volatile ushort *pbuf =
  705. (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  706. ushort *dbuf = (ushort *) sect_buf;
  707. debug("in input swap data base for read is %lx\n",
  708. (unsigned long) pbuf);
  709. while (words--) {
  710. #ifdef __MIPS__
  711. *dbuf++ = swab16p((u16 *) pbuf);
  712. *dbuf++ = swab16p((u16 *) pbuf);
  713. #elif defined(CONFIG_PCS440EP)
  714. *dbuf++ = *pbuf;
  715. *dbuf++ = *pbuf;
  716. #else
  717. *dbuf++ = ld_le16(pbuf);
  718. *dbuf++ = ld_le16(pbuf);
  719. #endif /* !MIPS */
  720. }
  721. #endif
  722. }
  723. #endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
  724. #if defined(CONFIG_IDE_SWAP_IO)
  725. static void output_data(int dev, const ulong *sect_buf, int words)
  726. {
  727. #if defined(CONFIG_CPC45)
  728. uchar *dbuf;
  729. volatile uchar *pbuf_even;
  730. volatile uchar *pbuf_odd;
  731. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  732. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  733. dbuf = (uchar *) sect_buf;
  734. while (words--) {
  735. EIEIO;
  736. *pbuf_even = *dbuf++;
  737. EIEIO;
  738. *pbuf_odd = *dbuf++;
  739. EIEIO;
  740. *pbuf_even = *dbuf++;
  741. EIEIO;
  742. *pbuf_odd = *dbuf++;
  743. }
  744. #else
  745. ushort *dbuf;
  746. volatile ushort *pbuf;
  747. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  748. dbuf = (ushort *) sect_buf;
  749. while (words--) {
  750. #if defined(CONFIG_PCS440EP)
  751. /* not tested, because CF was write protected */
  752. EIEIO;
  753. *pbuf = ld_le16(dbuf++);
  754. EIEIO;
  755. *pbuf = ld_le16(dbuf++);
  756. #else
  757. EIEIO;
  758. *pbuf = *dbuf++;
  759. EIEIO;
  760. *pbuf = *dbuf++;
  761. #endif
  762. }
  763. #endif
  764. }
  765. #else /* ! CONFIG_IDE_SWAP_IO */
  766. static void output_data(int dev, const ulong *sect_buf, int words)
  767. {
  768. #if defined(CONFIG_IDE_AHB)
  769. ide_write_data(dev, sect_buf, words);
  770. #else
  771. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  772. #endif
  773. }
  774. #endif /* CONFIG_IDE_SWAP_IO */
  775. #if defined(CONFIG_IDE_SWAP_IO)
  776. static void input_data(int dev, ulong *sect_buf, int words)
  777. {
  778. #if defined(CONFIG_CPC45)
  779. uchar *dbuf;
  780. volatile uchar *pbuf_even;
  781. volatile uchar *pbuf_odd;
  782. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  783. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  784. dbuf = (uchar *) sect_buf;
  785. while (words--) {
  786. *dbuf++ = *pbuf_even;
  787. EIEIO;
  788. SYNC;
  789. *dbuf++ = *pbuf_odd;
  790. EIEIO;
  791. SYNC;
  792. *dbuf++ = *pbuf_even;
  793. EIEIO;
  794. SYNC;
  795. *dbuf++ = *pbuf_odd;
  796. EIEIO;
  797. SYNC;
  798. }
  799. #else
  800. ushort *dbuf;
  801. volatile ushort *pbuf;
  802. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  803. dbuf = (ushort *) sect_buf;
  804. debug("in input data base for read is %lx\n", (unsigned long) pbuf);
  805. while (words--) {
  806. #if defined(CONFIG_PCS440EP)
  807. EIEIO;
  808. *dbuf++ = ld_le16(pbuf);
  809. EIEIO;
  810. *dbuf++ = ld_le16(pbuf);
  811. #else
  812. EIEIO;
  813. *dbuf++ = *pbuf;
  814. EIEIO;
  815. *dbuf++ = *pbuf;
  816. #endif
  817. }
  818. #endif
  819. }
  820. #else /* ! CONFIG_IDE_SWAP_IO */
  821. static void input_data(int dev, ulong *sect_buf, int words)
  822. {
  823. #if defined(CONFIG_IDE_AHB)
  824. ide_read_data(dev, sect_buf, words);
  825. #else
  826. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
  827. #endif
  828. }
  829. #endif /* CONFIG_IDE_SWAP_IO */
  830. /* -------------------------------------------------------------------------
  831. */
  832. static void ide_ident(block_dev_desc_t *dev_desc)
  833. {
  834. unsigned char c;
  835. hd_driveid_t iop;
  836. #ifdef CONFIG_ATAPI
  837. int retries = 0;
  838. #endif
  839. #ifdef CONFIG_TUNE_PIO
  840. int pio_mode;
  841. #endif
  842. #if 0
  843. int mode, cycle_time;
  844. #endif
  845. int device;
  846. device = dev_desc->dev;
  847. printf(" Device %d: ", device);
  848. ide_led(DEVICE_LED(device), 1); /* LED on */
  849. /* Select device
  850. */
  851. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  852. dev_desc->if_type = IF_TYPE_IDE;
  853. #ifdef CONFIG_ATAPI
  854. retries = 0;
  855. /* Warning: This will be tricky to read */
  856. while (retries <= 1) {
  857. /* check signature */
  858. if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
  859. (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
  860. (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
  861. (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
  862. /* ATAPI Signature found */
  863. dev_desc->if_type = IF_TYPE_ATAPI;
  864. /*
  865. * Start Ident Command
  866. */
  867. ide_outb(device, ATA_COMMAND, ATAPI_CMD_IDENT);
  868. /*
  869. * Wait for completion - ATAPI devices need more time
  870. * to become ready
  871. */
  872. c = ide_wait(device, ATAPI_TIME_OUT);
  873. } else
  874. #endif
  875. {
  876. /*
  877. * Start Ident Command
  878. */
  879. ide_outb(device, ATA_COMMAND, ATA_CMD_IDENT);
  880. /*
  881. * Wait for completion
  882. */
  883. c = ide_wait(device, IDE_TIME_OUT);
  884. }
  885. ide_led(DEVICE_LED(device), 0); /* LED off */
  886. if (((c & ATA_STAT_DRQ) == 0) ||
  887. ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
  888. #ifdef CONFIG_ATAPI
  889. {
  890. /*
  891. * Need to soft reset the device
  892. * in case it's an ATAPI...
  893. */
  894. debug("Retrying...\n");
  895. ide_outb(device, ATA_DEV_HD,
  896. ATA_LBA | ATA_DEVICE(device));
  897. udelay(100000);
  898. ide_outb(device, ATA_COMMAND, 0x08);
  899. udelay(500000); /* 500 ms */
  900. }
  901. /*
  902. * Select device
  903. */
  904. ide_outb(device, ATA_DEV_HD,
  905. ATA_LBA | ATA_DEVICE(device));
  906. retries++;
  907. #else
  908. return;
  909. #endif
  910. }
  911. #ifdef CONFIG_ATAPI
  912. else
  913. break;
  914. } /* see above - ugly to read */
  915. if (retries == 2) /* Not found */
  916. return;
  917. #endif
  918. input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
  919. ident_cpy((unsigned char *) dev_desc->revision, iop.fw_rev,
  920. sizeof(dev_desc->revision));
  921. ident_cpy((unsigned char *) dev_desc->vendor, iop.model,
  922. sizeof(dev_desc->vendor));
  923. ident_cpy((unsigned char *) dev_desc->product, iop.serial_no,
  924. sizeof(dev_desc->product));
  925. #ifdef __LITTLE_ENDIAN
  926. /*
  927. * firmware revision, model, and serial number have Big Endian Byte
  928. * order in Word. Convert all three to little endian.
  929. *
  930. * See CF+ and CompactFlash Specification Revision 2.0:
  931. * 6.2.1.6: Identify Drive, Table 39 for more details
  932. */
  933. strswab(dev_desc->revision);
  934. strswab(dev_desc->vendor);
  935. strswab(dev_desc->product);
  936. #endif /* __LITTLE_ENDIAN */
  937. if ((iop.config & 0x0080) == 0x0080)
  938. dev_desc->removable = 1;
  939. else
  940. dev_desc->removable = 0;
  941. #ifdef CONFIG_TUNE_PIO
  942. /* Mode 0 - 2 only, are directly determined by word 51. */
  943. pio_mode = iop.tPIO;
  944. if (pio_mode > 2) {
  945. printf("WARNING: Invalid PIO (word 51 = %d).\n", pio_mode);
  946. /* Force it to dead slow, and hope for the best... */
  947. pio_mode = 0;
  948. }
  949. /* Any CompactFlash Storage Card that supports PIO mode 3 or above
  950. * shall set bit 1 of word 53 to one and support the fields contained
  951. * in words 64 through 70.
  952. */
  953. if (iop.field_valid & 0x02) {
  954. /*
  955. * Mode 3 and above are possible. Check in order from slow
  956. * to fast, so we wind up with the highest mode allowed.
  957. */
  958. if (iop.eide_pio_modes & 0x01)
  959. pio_mode = 3;
  960. if (iop.eide_pio_modes & 0x02)
  961. pio_mode = 4;
  962. if (ata_id_is_cfa((u16 *)&iop)) {
  963. if ((iop.cf_advanced_caps & 0x07) == 0x01)
  964. pio_mode = 5;
  965. if ((iop.cf_advanced_caps & 0x07) == 0x02)
  966. pio_mode = 6;
  967. }
  968. }
  969. /* System-specific, depends on bus speeds, etc. */
  970. ide_set_piomode(pio_mode);
  971. #endif /* CONFIG_TUNE_PIO */
  972. #if 0
  973. /*
  974. * Drive PIO mode autoselection
  975. */
  976. mode = iop.tPIO;
  977. printf("tPIO = 0x%02x = %d\n", mode, mode);
  978. if (mode > 2) { /* 2 is maximum allowed tPIO value */
  979. mode = 2;
  980. debug("Override tPIO -> 2\n");
  981. }
  982. if (iop.field_valid & 2) { /* drive implements ATA2? */
  983. debug("Drive implements ATA2\n");
  984. if (iop.capability & 8) { /* drive supports use_iordy? */
  985. cycle_time = iop.eide_pio_iordy;
  986. } else {
  987. cycle_time = iop.eide_pio;
  988. }
  989. debug("cycle time = %d\n", cycle_time);
  990. mode = 4;
  991. if (cycle_time > 120)
  992. mode = 3; /* 120 ns for PIO mode 4 */
  993. if (cycle_time > 180)
  994. mode = 2; /* 180 ns for PIO mode 3 */
  995. if (cycle_time > 240)
  996. mode = 1; /* 240 ns for PIO mode 4 */
  997. if (cycle_time > 383)
  998. mode = 0; /* 383 ns for PIO mode 4 */
  999. }
  1000. printf("PIO mode to use: PIO %d\n", mode);
  1001. #endif /* 0 */
  1002. #ifdef CONFIG_ATAPI
  1003. if (dev_desc->if_type == IF_TYPE_ATAPI) {
  1004. atapi_inquiry(dev_desc);
  1005. return;
  1006. }
  1007. #endif /* CONFIG_ATAPI */
  1008. #ifdef __BIG_ENDIAN
  1009. /* swap shorts */
  1010. dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
  1011. #else /* ! __BIG_ENDIAN */
  1012. /*
  1013. * do not swap shorts on little endian
  1014. *
  1015. * See CF+ and CompactFlash Specification Revision 2.0:
  1016. * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
  1017. */
  1018. dev_desc->lba = iop.lba_capacity;
  1019. #endif /* __BIG_ENDIAN */
  1020. #ifdef CONFIG_LBA48
  1021. if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
  1022. dev_desc->lba48 = 1;
  1023. dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
  1024. ((unsigned long long) iop.lba48_capacity[1] << 16) |
  1025. ((unsigned long long) iop.lba48_capacity[2] << 32) |
  1026. ((unsigned long long) iop.lba48_capacity[3] << 48);
  1027. } else {
  1028. dev_desc->lba48 = 0;
  1029. }
  1030. #endif /* CONFIG_LBA48 */
  1031. /* assuming HD */
  1032. dev_desc->type = DEV_TYPE_HARDDISK;
  1033. dev_desc->blksz = ATA_BLOCKSIZE;
  1034. dev_desc->lun = 0; /* just to fill something in... */
  1035. #if 0 /* only used to test the powersaving mode,
  1036. * if enabled, the drive goes after 5 sec
  1037. * in standby mode */
  1038. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1039. c = ide_wait(device, IDE_TIME_OUT);
  1040. ide_outb(device, ATA_SECT_CNT, 1);
  1041. ide_outb(device, ATA_LBA_LOW, 0);
  1042. ide_outb(device, ATA_LBA_MID, 0);
  1043. ide_outb(device, ATA_LBA_HIGH, 0);
  1044. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1045. ide_outb(device, ATA_COMMAND, 0xe3);
  1046. udelay(50);
  1047. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  1048. #endif
  1049. }
  1050. /* ------------------------------------------------------------------------- */
  1051. ulong ide_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1052. {
  1053. ulong n = 0;
  1054. unsigned char c;
  1055. unsigned char pwrsave = 0; /* power save */
  1056. #ifdef CONFIG_LBA48
  1057. unsigned char lba48 = 0;
  1058. if (blknr & 0x0000fffff0000000ULL) {
  1059. /* more than 28 bits used, use 48bit mode */
  1060. lba48 = 1;
  1061. }
  1062. #endif
  1063. debug("ide_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1064. device, blknr, blkcnt, (ulong) buffer);
  1065. ide_led(DEVICE_LED(device), 1); /* LED on */
  1066. /* Select device
  1067. */
  1068. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1069. c = ide_wait(device, IDE_TIME_OUT);
  1070. if (c & ATA_STAT_BUSY) {
  1071. printf("IDE read: device %d not ready\n", device);
  1072. goto IDE_READ_E;
  1073. }
  1074. /* first check if the drive is in Powersaving mode, if yes,
  1075. * increase the timeout value */
  1076. ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_PWR);
  1077. udelay(50);
  1078. c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
  1079. if (c & ATA_STAT_BUSY) {
  1080. printf("IDE read: device %d not ready\n", device);
  1081. goto IDE_READ_E;
  1082. }
  1083. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1084. printf("No Powersaving mode %X\n", c);
  1085. } else {
  1086. c = ide_inb(device, ATA_SECT_CNT);
  1087. debug("Powersaving %02X\n", c);
  1088. if (c == 0)
  1089. pwrsave = 1;
  1090. }
  1091. while (blkcnt-- > 0) {
  1092. c = ide_wait(device, IDE_TIME_OUT);
  1093. if (c & ATA_STAT_BUSY) {
  1094. printf("IDE read: device %d not ready\n", device);
  1095. break;
  1096. }
  1097. #ifdef CONFIG_LBA48
  1098. if (lba48) {
  1099. /* write high bits */
  1100. ide_outb(device, ATA_SECT_CNT, 0);
  1101. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1102. #ifdef CONFIG_SYS_64BIT_LBA
  1103. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1104. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1105. #else
  1106. ide_outb(device, ATA_LBA_MID, 0);
  1107. ide_outb(device, ATA_LBA_HIGH, 0);
  1108. #endif
  1109. }
  1110. #endif
  1111. ide_outb(device, ATA_SECT_CNT, 1);
  1112. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1113. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1114. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1115. #ifdef CONFIG_LBA48
  1116. if (lba48) {
  1117. ide_outb(device, ATA_DEV_HD,
  1118. ATA_LBA | ATA_DEVICE(device));
  1119. ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
  1120. } else
  1121. #endif
  1122. {
  1123. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  1124. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  1125. ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
  1126. }
  1127. udelay(50);
  1128. if (pwrsave) {
  1129. /* may take up to 4 sec */
  1130. c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
  1131. pwrsave = 0;
  1132. } else {
  1133. /* can't take over 500 ms */
  1134. c = ide_wait(device, IDE_TIME_OUT);
  1135. }
  1136. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  1137. ATA_STAT_DRQ) {
  1138. #if defined(CONFIG_SYS_64BIT_LBA)
  1139. printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
  1140. device, blknr, c);
  1141. #else
  1142. printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1143. device, (ulong) blknr, c);
  1144. #endif
  1145. break;
  1146. }
  1147. input_data(device, buffer, ATA_SECTORWORDS);
  1148. (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
  1149. ++n;
  1150. ++blknr;
  1151. buffer += ATA_BLOCKSIZE;
  1152. }
  1153. IDE_READ_E:
  1154. ide_led(DEVICE_LED(device), 0); /* LED off */
  1155. return (n);
  1156. }
  1157. /* ------------------------------------------------------------------------- */
  1158. ulong ide_write(int device, lbaint_t blknr, ulong blkcnt, const void *buffer)
  1159. {
  1160. ulong n = 0;
  1161. unsigned char c;
  1162. #ifdef CONFIG_LBA48
  1163. unsigned char lba48 = 0;
  1164. if (blknr & 0x0000fffff0000000ULL) {
  1165. /* more than 28 bits used, use 48bit mode */
  1166. lba48 = 1;
  1167. }
  1168. #endif
  1169. ide_led(DEVICE_LED(device), 1); /* LED on */
  1170. /* Select device
  1171. */
  1172. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1173. while (blkcnt-- > 0) {
  1174. c = ide_wait(device, IDE_TIME_OUT);
  1175. if (c & ATA_STAT_BUSY) {
  1176. printf("IDE read: device %d not ready\n", device);
  1177. goto WR_OUT;
  1178. }
  1179. #ifdef CONFIG_LBA48
  1180. if (lba48) {
  1181. /* write high bits */
  1182. ide_outb(device, ATA_SECT_CNT, 0);
  1183. ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
  1184. #ifdef CONFIG_SYS_64BIT_LBA
  1185. ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
  1186. ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
  1187. #else
  1188. ide_outb(device, ATA_LBA_MID, 0);
  1189. ide_outb(device, ATA_LBA_HIGH, 0);
  1190. #endif
  1191. }
  1192. #endif
  1193. ide_outb(device, ATA_SECT_CNT, 1);
  1194. ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
  1195. ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
  1196. ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
  1197. #ifdef CONFIG_LBA48
  1198. if (lba48) {
  1199. ide_outb(device, ATA_DEV_HD,
  1200. ATA_LBA | ATA_DEVICE(device));
  1201. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
  1202. } else
  1203. #endif
  1204. {
  1205. ide_outb(device, ATA_DEV_HD, ATA_LBA |
  1206. ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
  1207. ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
  1208. }
  1209. udelay(50);
  1210. /* can't take over 500 ms */
  1211. c = ide_wait(device, IDE_TIME_OUT);
  1212. if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
  1213. ATA_STAT_DRQ) {
  1214. #if defined(CONFIG_SYS_64BIT_LBA)
  1215. printf("Error (no IRQ) dev %d blk %lld: status 0x%02x\n",
  1216. device, blknr, c);
  1217. #else
  1218. printf("Error (no IRQ) dev %d blk %ld: status 0x%02x\n",
  1219. device, (ulong) blknr, c);
  1220. #endif
  1221. goto WR_OUT;
  1222. }
  1223. output_data(device, buffer, ATA_SECTORWORDS);
  1224. c = ide_inb(device, ATA_STATUS); /* clear IRQ */
  1225. ++n;
  1226. ++blknr;
  1227. buffer += ATA_BLOCKSIZE;
  1228. }
  1229. WR_OUT:
  1230. ide_led(DEVICE_LED(device), 0); /* LED off */
  1231. return (n);
  1232. }
  1233. /* ------------------------------------------------------------------------- */
  1234. /*
  1235. * copy src to dest, skipping leading and trailing blanks and null
  1236. * terminate the string
  1237. * "len" is the size of available memory including the terminating '\0'
  1238. */
  1239. static void ident_cpy(unsigned char *dst, unsigned char *src,
  1240. unsigned int len)
  1241. {
  1242. unsigned char *end, *last;
  1243. last = dst;
  1244. end = src + len - 1;
  1245. /* reserve space for '\0' */
  1246. if (len < 2)
  1247. goto OUT;
  1248. /* skip leading white space */
  1249. while ((*src) && (src < end) && (*src == ' '))
  1250. ++src;
  1251. /* copy string, omitting trailing white space */
  1252. while ((*src) && (src < end)) {
  1253. *dst++ = *src;
  1254. if (*src++ != ' ')
  1255. last = dst;
  1256. }
  1257. OUT:
  1258. *last = '\0';
  1259. }
  1260. /* ------------------------------------------------------------------------- */
  1261. /*
  1262. * Wait until Busy bit is off, or timeout (in ms)
  1263. * Return last status
  1264. */
  1265. static uchar ide_wait(int dev, ulong t)
  1266. {
  1267. ulong delay = 10 * t; /* poll every 100 us */
  1268. uchar c;
  1269. while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
  1270. udelay(100);
  1271. if (delay-- == 0)
  1272. break;
  1273. }
  1274. return (c);
  1275. }
  1276. /* ------------------------------------------------------------------------- */
  1277. #ifdef CONFIG_IDE_RESET
  1278. extern void ide_set_reset(int idereset);
  1279. static void ide_reset(void)
  1280. {
  1281. #if defined(CONFIG_SYS_PB_12V_ENABLE) || defined(CONFIG_SYS_PB_IDE_MOTOR)
  1282. volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
  1283. #endif
  1284. int i;
  1285. curr_device = -1;
  1286. for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
  1287. ide_bus_ok[i] = 0;
  1288. for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
  1289. ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
  1290. ide_set_reset(1); /* assert reset */
  1291. /* the reset signal shall be asserted for et least 25 us */
  1292. udelay(25);
  1293. WATCHDOG_RESET();
  1294. #ifdef CONFIG_SYS_PB_12V_ENABLE
  1295. /* 12V Enable output OFF */
  1296. immr->im_cpm.cp_pbdat &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1297. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1298. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_12V_ENABLE);
  1299. immr->im_cpm.cp_pbdir |= CONFIG_SYS_PB_12V_ENABLE;
  1300. /* wait 500 ms for the voltage to stabilize */
  1301. for (i = 0; i < 500; ++i)
  1302. udelay(1000);
  1303. /* 12V Enable output ON */
  1304. immr->im_cpm.cp_pbdat |= CONFIG_SYS_PB_12V_ENABLE;
  1305. #endif /* CONFIG_SYS_PB_12V_ENABLE */
  1306. #ifdef CONFIG_SYS_PB_IDE_MOTOR
  1307. /* configure IDE Motor voltage monitor pin as input */
  1308. immr->im_cpm.cp_pbpar &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1309. immr->im_cpm.cp_pbodr &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1310. immr->im_cpm.cp_pbdir &= ~(CONFIG_SYS_PB_IDE_MOTOR);
  1311. /* wait up to 1 s for the motor voltage to stabilize */
  1312. for (i = 0; i < 1000; ++i) {
  1313. if ((immr->im_cpm.cp_pbdat & CONFIG_SYS_PB_IDE_MOTOR) != 0) {
  1314. break;
  1315. }
  1316. udelay(1000);
  1317. }
  1318. if (i == 1000) { /* Timeout */
  1319. printf("\nWarning: 5V for IDE Motor missing\n");
  1320. #ifdef CONFIG_STATUS_LED
  1321. #ifdef STATUS_LED_YELLOW
  1322. status_led_set(STATUS_LED_YELLOW, STATUS_LED_ON);
  1323. #endif
  1324. #ifdef STATUS_LED_GREEN
  1325. status_led_set(STATUS_LED_GREEN, STATUS_LED_OFF);
  1326. #endif
  1327. #endif /* CONFIG_STATUS_LED */
  1328. }
  1329. #endif /* CONFIG_SYS_PB_IDE_MOTOR */
  1330. WATCHDOG_RESET();
  1331. /* de-assert RESET signal */
  1332. ide_set_reset(0);
  1333. /* wait 250 ms */
  1334. for (i = 0; i < 250; ++i)
  1335. udelay(1000);
  1336. }
  1337. #endif /* CONFIG_IDE_RESET */
  1338. /* ------------------------------------------------------------------------- */
  1339. #if defined(CONFIG_IDE_LED) && \
  1340. !defined(CONFIG_CPC45) && \
  1341. !defined(CONFIG_KUP4K) && \
  1342. !defined(CONFIG_KUP4X)
  1343. static uchar led_buffer; /* Buffer for current LED status */
  1344. static void ide_led(uchar led, uchar status)
  1345. {
  1346. uchar *led_port = LED_PORT;
  1347. if (status) /* switch LED on */
  1348. led_buffer |= led;
  1349. else /* switch LED off */
  1350. led_buffer &= ~led;
  1351. *led_port = led_buffer;
  1352. }
  1353. #endif /* CONFIG_IDE_LED */
  1354. #if defined(CONFIG_OF_IDE_FIXUP)
  1355. int ide_device_present(int dev)
  1356. {
  1357. if (dev >= CONFIG_SYS_IDE_MAXBUS)
  1358. return 0;
  1359. return (ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1);
  1360. }
  1361. #endif
  1362. /* ------------------------------------------------------------------------- */
  1363. #ifdef CONFIG_ATAPI
  1364. /****************************************************************************
  1365. * ATAPI Support
  1366. */
  1367. #if defined(CONFIG_IDE_SWAP_IO)
  1368. /* since ATAPI may use commands with not 4 bytes alligned length
  1369. * we have our own transfer functions, 2 bytes alligned */
  1370. static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1371. {
  1372. #if defined(CONFIG_CPC45)
  1373. uchar *dbuf;
  1374. volatile uchar *pbuf_even;
  1375. volatile uchar *pbuf_odd;
  1376. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  1377. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  1378. while (shorts--) {
  1379. EIEIO;
  1380. *pbuf_even = *dbuf++;
  1381. EIEIO;
  1382. *pbuf_odd = *dbuf++;
  1383. }
  1384. #else
  1385. ushort *dbuf;
  1386. volatile ushort *pbuf;
  1387. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  1388. dbuf = (ushort *) sect_buf;
  1389. debug("in output data shorts base for read is %lx\n",
  1390. (unsigned long) pbuf);
  1391. while (shorts--) {
  1392. EIEIO;
  1393. *pbuf = *dbuf++;
  1394. }
  1395. #endif
  1396. }
  1397. static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1398. {
  1399. #if defined(CONFIG_CPC45)
  1400. uchar *dbuf;
  1401. volatile uchar *pbuf_even;
  1402. volatile uchar *pbuf_odd;
  1403. pbuf_even = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_EVEN);
  1404. pbuf_odd = (uchar *) (ATA_CURR_BASE(dev) + ATA_DATA_ODD);
  1405. while (shorts--) {
  1406. EIEIO;
  1407. *dbuf++ = *pbuf_even;
  1408. EIEIO;
  1409. *dbuf++ = *pbuf_odd;
  1410. }
  1411. #else
  1412. ushort *dbuf;
  1413. volatile ushort *pbuf;
  1414. pbuf = (ushort *) (ATA_CURR_BASE(dev) + ATA_DATA_REG);
  1415. dbuf = (ushort *) sect_buf;
  1416. debug("in input data shorts base for read is %lx\n",
  1417. (unsigned long) pbuf);
  1418. while (shorts--) {
  1419. EIEIO;
  1420. *dbuf++ = *pbuf;
  1421. }
  1422. #endif
  1423. }
  1424. #else /* ! CONFIG_IDE_SWAP_IO */
  1425. static void output_data_shorts(int dev, ushort *sect_buf, int shorts)
  1426. {
  1427. outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  1428. }
  1429. static void input_data_shorts(int dev, ushort *sect_buf, int shorts)
  1430. {
  1431. insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
  1432. }
  1433. #endif /* CONFIG_IDE_SWAP_IO */
  1434. /*
  1435. * Wait until (Status & mask) == res, or timeout (in ms)
  1436. * Return last status
  1437. * This is used since some ATAPI CD ROMs clears their Busy Bit first
  1438. * and then they set their DRQ Bit
  1439. */
  1440. static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
  1441. {
  1442. ulong delay = 10 * t; /* poll every 100 us */
  1443. uchar c;
  1444. /* prevents to read the status before valid */
  1445. c = ide_inb(dev, ATA_DEV_CTL);
  1446. while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
  1447. /* break if error occurs (doesn't make sense to wait more) */
  1448. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
  1449. break;
  1450. udelay(100);
  1451. if (delay-- == 0)
  1452. break;
  1453. }
  1454. return (c);
  1455. }
  1456. /*
  1457. * issue an atapi command
  1458. */
  1459. unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
  1460. unsigned char *buffer, int buflen)
  1461. {
  1462. unsigned char c, err, mask, res;
  1463. int n;
  1464. ide_led(DEVICE_LED(device), 1); /* LED on */
  1465. /* Select device
  1466. */
  1467. mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
  1468. res = 0;
  1469. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1470. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1471. if ((c & mask) != res) {
  1472. printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
  1473. c);
  1474. err = 0xFF;
  1475. goto AI_OUT;
  1476. }
  1477. /* write taskfile */
  1478. ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
  1479. ide_outb(device, ATA_SECT_CNT, 0);
  1480. ide_outb(device, ATA_SECT_NUM, 0);
  1481. ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
  1482. ide_outb(device, ATA_CYL_HIGH,
  1483. (unsigned char) ((buflen >> 8) & 0xFF));
  1484. ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
  1485. ide_outb(device, ATA_COMMAND, ATAPI_CMD_PACKET);
  1486. udelay(50);
  1487. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  1488. res = ATA_STAT_DRQ;
  1489. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1490. if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
  1491. printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
  1492. device, c);
  1493. err = 0xFF;
  1494. goto AI_OUT;
  1495. }
  1496. /* write command block */
  1497. output_data_shorts(device, (unsigned short *) ccb, ccblen / 2);
  1498. /* ATAPI Command written wait for completition */
  1499. udelay(5000); /* device must set bsy */
  1500. mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
  1501. /*
  1502. * if no data wait for DRQ = 0 BSY = 0
  1503. * if data wait for DRQ = 1 BSY = 0
  1504. */
  1505. res = 0;
  1506. if (buflen)
  1507. res = ATA_STAT_DRQ;
  1508. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1509. if ((c & mask) != res) {
  1510. if (c & ATA_STAT_ERR) {
  1511. err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
  1512. debug("atapi_issue 1 returned sense key %X status %02X\n",
  1513. err, c);
  1514. } else {
  1515. printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
  1516. ccb[0], c);
  1517. err = 0xFF;
  1518. }
  1519. goto AI_OUT;
  1520. }
  1521. n = ide_inb(device, ATA_CYL_HIGH);
  1522. n <<= 8;
  1523. n += ide_inb(device, ATA_CYL_LOW);
  1524. if (n > buflen) {
  1525. printf("ERROR, transfer bytes %d requested only %d\n", n,
  1526. buflen);
  1527. err = 0xff;
  1528. goto AI_OUT;
  1529. }
  1530. if ((n == 0) && (buflen < 0)) {
  1531. printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
  1532. err = 0xff;
  1533. goto AI_OUT;
  1534. }
  1535. if (n != buflen) {
  1536. debug("WARNING, transfer bytes %d not equal with requested %d\n",
  1537. n, buflen);
  1538. }
  1539. if (n != 0) { /* data transfer */
  1540. debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
  1541. /* we transfer shorts */
  1542. n >>= 1;
  1543. /* ok now decide if it is an in or output */
  1544. if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
  1545. debug("Write to device\n");
  1546. output_data_shorts(device, (unsigned short *) buffer,
  1547. n);
  1548. } else {
  1549. debug("Read from device @ %p shorts %d\n", buffer, n);
  1550. input_data_shorts(device, (unsigned short *) buffer,
  1551. n);
  1552. }
  1553. }
  1554. udelay(5000); /* seems that some CD ROMs need this... */
  1555. mask = ATA_STAT_BUSY | ATA_STAT_ERR;
  1556. res = 0;
  1557. c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
  1558. if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
  1559. err = (ide_inb(device, ATA_ERROR_REG) >> 4);
  1560. debug("atapi_issue 2 returned sense key %X status %X\n", err,
  1561. c);
  1562. } else {
  1563. err = 0;
  1564. }
  1565. AI_OUT:
  1566. ide_led(DEVICE_LED(device), 0); /* LED off */
  1567. return (err);
  1568. }
  1569. /*
  1570. * sending the command to atapi_issue. If an status other than good
  1571. * returns, an request_sense will be issued
  1572. */
  1573. #define ATAPI_DRIVE_NOT_READY 100
  1574. #define ATAPI_UNIT_ATTN 10
  1575. unsigned char atapi_issue_autoreq(int device,
  1576. unsigned char *ccb,
  1577. int ccblen,
  1578. unsigned char *buffer, int buflen)
  1579. {
  1580. unsigned char sense_data[18], sense_ccb[12];
  1581. unsigned char res, key, asc, ascq;
  1582. int notready, unitattn;
  1583. unitattn = ATAPI_UNIT_ATTN;
  1584. notready = ATAPI_DRIVE_NOT_READY;
  1585. retry:
  1586. res = atapi_issue(device, ccb, ccblen, buffer, buflen);
  1587. if (res == 0)
  1588. return 0; /* Ok */
  1589. if (res == 0xFF)
  1590. return 0xFF; /* error */
  1591. debug("(auto_req)atapi_issue returned sense key %X\n", res);
  1592. memset(sense_ccb, 0, sizeof(sense_ccb));
  1593. memset(sense_data, 0, sizeof(sense_data));
  1594. sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
  1595. sense_ccb[4] = 18; /* allocation Length */
  1596. res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
  1597. key = (sense_data[2] & 0xF);
  1598. asc = (sense_data[12]);
  1599. ascq = (sense_data[13]);
  1600. debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
  1601. debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
  1602. sense_data[0], key, asc, ascq);
  1603. if ((key == 0))
  1604. return 0; /* ok device ready */
  1605. if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
  1606. if (unitattn-- > 0) {
  1607. udelay(200 * 1000);
  1608. goto retry;
  1609. }
  1610. printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
  1611. goto error;
  1612. }
  1613. if ((asc == 0x4) && (ascq == 0x1)) {
  1614. /* not ready, but will be ready soon */
  1615. if (notready-- > 0) {
  1616. udelay(200 * 1000);
  1617. goto retry;
  1618. }
  1619. printf("Drive not ready, tried %d times\n",
  1620. ATAPI_DRIVE_NOT_READY);
  1621. goto error;
  1622. }
  1623. if (asc == 0x3a) {
  1624. debug("Media not present\n");
  1625. goto error;
  1626. }
  1627. printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
  1628. ascq);
  1629. error:
  1630. debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
  1631. return (0xFF);
  1632. }
  1633. static void atapi_inquiry(block_dev_desc_t *dev_desc)
  1634. {
  1635. unsigned char ccb[12]; /* Command descriptor block */
  1636. unsigned char iobuf[64]; /* temp buf */
  1637. unsigned char c;
  1638. int device;
  1639. device = dev_desc->dev;
  1640. dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
  1641. dev_desc->block_read = atapi_read;
  1642. memset(ccb, 0, sizeof(ccb));
  1643. memset(iobuf, 0, sizeof(iobuf));
  1644. ccb[0] = ATAPI_CMD_INQUIRY;
  1645. ccb[4] = 40; /* allocation Legnth */
  1646. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 40);
  1647. debug("ATAPI_CMD_INQUIRY returned %x\n", c);
  1648. if (c != 0)
  1649. return;
  1650. /* copy device ident strings */
  1651. ident_cpy((unsigned char *) dev_desc->vendor, &iobuf[8], 8);
  1652. ident_cpy((unsigned char *) dev_desc->product, &iobuf[16], 16);
  1653. ident_cpy((unsigned char *) dev_desc->revision, &iobuf[32], 5);
  1654. dev_desc->lun = 0;
  1655. dev_desc->lba = 0;
  1656. dev_desc->blksz = 0;
  1657. dev_desc->type = iobuf[0] & 0x1f;
  1658. if ((iobuf[1] & 0x80) == 0x80)
  1659. dev_desc->removable = 1;
  1660. else
  1661. dev_desc->removable = 0;
  1662. memset(ccb, 0, sizeof(ccb));
  1663. memset(iobuf, 0, sizeof(iobuf));
  1664. ccb[0] = ATAPI_CMD_START_STOP;
  1665. ccb[4] = 0x03; /* start */
  1666. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
  1667. debug("ATAPI_CMD_START_STOP returned %x\n", c);
  1668. if (c != 0)
  1669. return;
  1670. memset(ccb, 0, sizeof(ccb));
  1671. memset(iobuf, 0, sizeof(iobuf));
  1672. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 0);
  1673. debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
  1674. if (c != 0)
  1675. return;
  1676. memset(ccb, 0, sizeof(ccb));
  1677. memset(iobuf, 0, sizeof(iobuf));
  1678. ccb[0] = ATAPI_CMD_READ_CAP;
  1679. c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *) iobuf, 8);
  1680. debug("ATAPI_CMD_READ_CAP returned %x\n", c);
  1681. if (c != 0)
  1682. return;
  1683. debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
  1684. iobuf[0], iobuf[1], iobuf[2], iobuf[3],
  1685. iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
  1686. dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
  1687. ((unsigned long) iobuf[1] << 16) +
  1688. ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
  1689. dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
  1690. ((unsigned long) iobuf[5] << 16) +
  1691. ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
  1692. #ifdef CONFIG_LBA48
  1693. /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
  1694. dev_desc->lba48 = 0;
  1695. #endif
  1696. return;
  1697. }
  1698. /*
  1699. * atapi_read:
  1700. * we transfer only one block per command, since the multiple DRQ per
  1701. * command is not yet implemented
  1702. */
  1703. #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
  1704. #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
  1705. #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
  1706. ulong atapi_read(int device, lbaint_t blknr, ulong blkcnt, void *buffer)
  1707. {
  1708. ulong n = 0;
  1709. unsigned char ccb[12]; /* Command descriptor block */
  1710. ulong cnt;
  1711. debug("atapi_read dev %d start %lX, blocks %lX buffer at %lX\n",
  1712. device, blknr, blkcnt, (ulong) buffer);
  1713. do {
  1714. if (blkcnt > ATAPI_READ_MAX_BLOCK)
  1715. cnt = ATAPI_READ_MAX_BLOCK;
  1716. else
  1717. cnt = blkcnt;
  1718. ccb[0] = ATAPI_CMD_READ_12;
  1719. ccb[1] = 0; /* reserved */
  1720. ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
  1721. ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
  1722. ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
  1723. ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
  1724. ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
  1725. ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
  1726. ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
  1727. ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
  1728. ccb[10] = 0; /* reserved */
  1729. ccb[11] = 0; /* reserved */
  1730. if (atapi_issue_autoreq(device, ccb, 12,
  1731. (unsigned char *) buffer,
  1732. cnt * ATAPI_READ_BLOCK_SIZE)
  1733. == 0xFF) {
  1734. return (n);
  1735. }
  1736. n += cnt;
  1737. blkcnt -= cnt;
  1738. blknr += cnt;
  1739. buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
  1740. } while (blkcnt > 0);
  1741. return (n);
  1742. }
  1743. /* ------------------------------------------------------------------------- */
  1744. #endif /* CONFIG_ATAPI */
  1745. U_BOOT_CMD(ide, 5, 1, do_ide,
  1746. "IDE sub-system",
  1747. "reset - reset IDE controller\n"
  1748. "ide info - show available IDE devices\n"
  1749. "ide device [dev] - show or set current device\n"
  1750. "ide part [dev] - print partition table of one or all IDE devices\n"
  1751. "ide read addr blk# cnt\n"
  1752. "ide write addr blk# cnt - read/write `cnt'"
  1753. " blocks starting at block `blk#'\n"
  1754. " to/from memory address `addr'");
  1755. U_BOOT_CMD(diskboot, 3, 1, do_diskboot,
  1756. "boot from IDE device", "loadAddr dev:part");