cmd_fpga.c 9.4 KB

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  1. /*
  2. * (C) Copyright 2000, 2001
  3. * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. *
  23. */
  24. /*
  25. * FPGA support
  26. */
  27. #include <common.h>
  28. #include <command.h>
  29. #if defined(CONFIG_CMD_NET)
  30. #include <net.h>
  31. #endif
  32. #include <fpga.h>
  33. #include <malloc.h>
  34. /* Local functions */
  35. static int fpga_get_op (char *opstr);
  36. /* Local defines */
  37. #define FPGA_NONE -1
  38. #define FPGA_INFO 0
  39. #define FPGA_LOAD 1
  40. #define FPGA_LOADB 2
  41. #define FPGA_DUMP 3
  42. #define FPGA_LOADMK 4
  43. /* Convert bitstream data and load into the fpga */
  44. int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
  45. {
  46. #if defined(CONFIG_FPGA_XILINX)
  47. unsigned int length;
  48. unsigned int swapsize;
  49. char buffer[80];
  50. unsigned char *dataptr;
  51. unsigned int i;
  52. int rc;
  53. dataptr = (unsigned char *)fpgadata;
  54. /* skip the first bytes of the bitsteam, their meaning is unknown */
  55. length = (*dataptr << 8) + *(dataptr+1);
  56. dataptr+=2;
  57. dataptr+=length;
  58. /* get design name (identifier, length, string) */
  59. length = (*dataptr << 8) + *(dataptr+1);
  60. dataptr+=2;
  61. if (*dataptr++ != 0x61) {
  62. debug("%s: Design name identifier not recognized "
  63. "in bitstream\n",
  64. __func__);
  65. return FPGA_FAIL;
  66. }
  67. length = (*dataptr << 8) + *(dataptr+1);
  68. dataptr+=2;
  69. for(i=0;i<length;i++)
  70. buffer[i] = *dataptr++;
  71. printf(" design filename = \"%s\"\n", buffer);
  72. /* get part number (identifier, length, string) */
  73. if (*dataptr++ != 0x62) {
  74. printf("%s: Part number identifier not recognized "
  75. "in bitstream\n",
  76. __func__);
  77. return FPGA_FAIL;
  78. }
  79. length = (*dataptr << 8) + *(dataptr+1);
  80. dataptr+=2;
  81. for(i=0;i<length;i++)
  82. buffer[i] = *dataptr++;
  83. printf(" part number = \"%s\"\n", buffer);
  84. /* get date (identifier, length, string) */
  85. if (*dataptr++ != 0x63) {
  86. printf("%s: Date identifier not recognized in bitstream\n",
  87. __func__);
  88. return FPGA_FAIL;
  89. }
  90. length = (*dataptr << 8) + *(dataptr+1);
  91. dataptr+=2;
  92. for(i=0;i<length;i++)
  93. buffer[i] = *dataptr++;
  94. printf(" date = \"%s\"\n", buffer);
  95. /* get time (identifier, length, string) */
  96. if (*dataptr++ != 0x64) {
  97. printf("%s: Time identifier not recognized in bitstream\n",
  98. __func__);
  99. return FPGA_FAIL;
  100. }
  101. length = (*dataptr << 8) + *(dataptr+1);
  102. dataptr+=2;
  103. for(i=0;i<length;i++)
  104. buffer[i] = *dataptr++;
  105. printf(" time = \"%s\"\n", buffer);
  106. /* get fpga data length (identifier, length) */
  107. if (*dataptr++ != 0x65) {
  108. printf("%s: Data length identifier not recognized in bitstream\n",
  109. __func__);
  110. return FPGA_FAIL;
  111. }
  112. swapsize = ((unsigned int) *dataptr <<24) +
  113. ((unsigned int) *(dataptr+1) <<16) +
  114. ((unsigned int) *(dataptr+2) <<8 ) +
  115. ((unsigned int) *(dataptr+3) ) ;
  116. dataptr+=4;
  117. printf(" bytes in bitstream = %d\n", swapsize);
  118. rc = fpga_load(dev, dataptr, swapsize);
  119. return rc;
  120. #else
  121. printf("Bitstream support only for Xilinx devices\n");
  122. return FPGA_FAIL;
  123. #endif
  124. }
  125. /* ------------------------------------------------------------------------- */
  126. /* command form:
  127. * fpga <op> <device number> <data addr> <datasize>
  128. * where op is 'load', 'dump', or 'info'
  129. * If there is no device number field, the fpga environment variable is used.
  130. * If there is no data addr field, the fpgadata environment variable is used.
  131. * The info command requires no data address field.
  132. */
  133. int do_fpga (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  134. {
  135. int op, dev = FPGA_INVALID_DEVICE;
  136. size_t data_size = 0;
  137. void *fpga_data = NULL;
  138. char *devstr = getenv ("fpga");
  139. char *datastr = getenv ("fpgadata");
  140. int rc = FPGA_FAIL;
  141. int wrong_parms = 0;
  142. #if defined (CONFIG_FIT)
  143. const char *fit_uname = NULL;
  144. ulong fit_addr;
  145. #endif
  146. if (devstr)
  147. dev = (int) simple_strtoul (devstr, NULL, 16);
  148. if (datastr)
  149. fpga_data = (void *) simple_strtoul (datastr, NULL, 16);
  150. switch (argc) {
  151. case 5: /* fpga <op> <dev> <data> <datasize> */
  152. data_size = simple_strtoul (argv[4], NULL, 16);
  153. case 4: /* fpga <op> <dev> <data> */
  154. #if defined(CONFIG_FIT)
  155. if (fit_parse_subimage (argv[3], (ulong)fpga_data,
  156. &fit_addr, &fit_uname)) {
  157. fpga_data = (void *)fit_addr;
  158. debug("* fpga: subimage '%s' from FIT image "
  159. "at 0x%08lx\n",
  160. fit_uname, fit_addr);
  161. } else
  162. #endif
  163. {
  164. fpga_data = (void *) simple_strtoul (argv[3], NULL, 16);
  165. debug("* fpga: cmdline image address = 0x%08lx\n",
  166. (ulong)fpga_data);
  167. }
  168. debug("%s: fpga_data = 0x%x\n", __func__, (uint) fpga_data);
  169. case 3: /* fpga <op> <dev | data addr> */
  170. dev = (int) simple_strtoul (argv[2], NULL, 16);
  171. debug("%s: device = %d\n", __func__, dev);
  172. /* FIXME - this is a really weak test */
  173. if ((argc == 3) && (dev > fpga_count ())) { /* must be buffer ptr */
  174. debug("%s: Assuming buffer pointer in arg 3\n",
  175. __func__);
  176. #if defined(CONFIG_FIT)
  177. if (fit_parse_subimage (argv[2], (ulong)fpga_data,
  178. &fit_addr, &fit_uname)) {
  179. fpga_data = (void *)fit_addr;
  180. debug("* fpga: subimage '%s' from FIT image "
  181. "at 0x%08lx\n",
  182. fit_uname, fit_addr);
  183. } else
  184. #endif
  185. {
  186. fpga_data = (void *) dev;
  187. debug("* fpga: cmdline image address = "
  188. "0x%08lx\n", (ulong)fpga_data);
  189. }
  190. debug("%s: fpga_data = 0x%x\n",
  191. __func__, (uint) fpga_data);
  192. dev = FPGA_INVALID_DEVICE; /* reset device num */
  193. }
  194. case 2: /* fpga <op> */
  195. op = (int) fpga_get_op (argv[1]);
  196. break;
  197. default:
  198. debug("%s: Too many or too few args (%d)\n",
  199. __func__, argc);
  200. op = FPGA_NONE; /* force usage display */
  201. break;
  202. }
  203. if (dev == FPGA_INVALID_DEVICE) {
  204. puts("FPGA device not specified\n");
  205. op = FPGA_NONE;
  206. }
  207. switch (op) {
  208. case FPGA_NONE:
  209. case FPGA_INFO:
  210. break;
  211. case FPGA_LOAD:
  212. case FPGA_LOADB:
  213. case FPGA_DUMP:
  214. if (!fpga_data || !data_size)
  215. wrong_parms = 1;
  216. break;
  217. case FPGA_LOADMK:
  218. if (!fpga_data)
  219. wrong_parms = 1;
  220. break;
  221. }
  222. if (wrong_parms) {
  223. puts("Wrong parameters for FPGA request\n");
  224. op = FPGA_NONE;
  225. }
  226. switch (op) {
  227. case FPGA_NONE:
  228. return CMD_RET_USAGE;
  229. case FPGA_INFO:
  230. rc = fpga_info (dev);
  231. break;
  232. case FPGA_LOAD:
  233. rc = fpga_load (dev, fpga_data, data_size);
  234. break;
  235. case FPGA_LOADB:
  236. rc = fpga_loadbitstream(dev, fpga_data, data_size);
  237. break;
  238. case FPGA_LOADMK:
  239. switch (genimg_get_format (fpga_data)) {
  240. case IMAGE_FORMAT_LEGACY:
  241. {
  242. image_header_t *hdr = (image_header_t *)fpga_data;
  243. ulong data;
  244. data = (ulong)image_get_data (hdr);
  245. data_size = image_get_data_size (hdr);
  246. rc = fpga_load (dev, (void *)data, data_size);
  247. }
  248. break;
  249. #if defined(CONFIG_FIT)
  250. case IMAGE_FORMAT_FIT:
  251. {
  252. const void *fit_hdr = (const void *)fpga_data;
  253. int noffset;
  254. const void *fit_data;
  255. if (fit_uname == NULL) {
  256. puts ("No FIT subimage unit name\n");
  257. return 1;
  258. }
  259. if (!fit_check_format (fit_hdr)) {
  260. puts ("Bad FIT image format\n");
  261. return 1;
  262. }
  263. /* get fpga component image node offset */
  264. noffset = fit_image_get_node (fit_hdr, fit_uname);
  265. if (noffset < 0) {
  266. printf ("Can't find '%s' FIT subimage\n", fit_uname);
  267. return 1;
  268. }
  269. /* verify integrity */
  270. if (!fit_image_check_hashes (fit_hdr, noffset)) {
  271. puts ("Bad Data Hash\n");
  272. return 1;
  273. }
  274. /* get fpga subimage data address and length */
  275. if (fit_image_get_data (fit_hdr, noffset, &fit_data, &data_size)) {
  276. puts ("Could not find fpga subimage data\n");
  277. return 1;
  278. }
  279. rc = fpga_load (dev, fit_data, data_size);
  280. }
  281. break;
  282. #endif
  283. default:
  284. puts ("** Unknown image type\n");
  285. rc = FPGA_FAIL;
  286. break;
  287. }
  288. break;
  289. case FPGA_DUMP:
  290. rc = fpga_dump (dev, fpga_data, data_size);
  291. break;
  292. default:
  293. printf ("Unknown operation\n");
  294. return CMD_RET_USAGE;
  295. }
  296. return (rc);
  297. }
  298. /*
  299. * Map op to supported operations. We don't use a table since we
  300. * would just have to relocate it from flash anyway.
  301. */
  302. static int fpga_get_op (char *opstr)
  303. {
  304. int op = FPGA_NONE;
  305. if (!strcmp ("info", opstr)) {
  306. op = FPGA_INFO;
  307. } else if (!strcmp ("loadb", opstr)) {
  308. op = FPGA_LOADB;
  309. } else if (!strcmp ("load", opstr)) {
  310. op = FPGA_LOAD;
  311. } else if (!strcmp ("loadmk", opstr)) {
  312. op = FPGA_LOADMK;
  313. } else if (!strcmp ("dump", opstr)) {
  314. op = FPGA_DUMP;
  315. }
  316. if (op == FPGA_NONE) {
  317. printf ("Unknown fpga operation \"%s\"\n", opstr);
  318. }
  319. return op;
  320. }
  321. U_BOOT_CMD (fpga, 6, 1, do_fpga,
  322. "loadable FPGA image support",
  323. "[operation type] [device number] [image address] [image size]\n"
  324. "fpga operations:\n"
  325. " dump\t[dev]\t\t\tLoad device to memory buffer\n"
  326. " info\t[dev]\t\t\tlist known device information\n"
  327. " load\t[dev] [address] [size]\tLoad device from memory buffer\n"
  328. " loadb\t[dev] [address] [size]\t"
  329. "Load device from bitstream buffer (Xilinx only)\n"
  330. " loadmk [dev] [address]\tLoad device generated with mkimage"
  331. #if defined(CONFIG_FIT)
  332. "\n"
  333. "\tFor loadmk operating on FIT format uImage address must include\n"
  334. "\tsubimage unit name in the form of addr:<subimg_uname>"
  335. #endif
  336. );