fdt.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2014-2015 Freescale Semiconductor, Inc.
  4. * Copyright 2020-2021 NXP
  5. */
  6. #include <common.h>
  7. #include <clock_legacy.h>
  8. #include <efi_loader.h>
  9. #include <log.h>
  10. #include <asm/cache.h>
  11. #include <linux/libfdt.h>
  12. #include <fdt_support.h>
  13. #include <phy.h>
  14. #ifdef CONFIG_FSL_LSCH3
  15. #include <asm/arch/fdt.h>
  16. #endif
  17. #ifdef CONFIG_FSL_ESDHC
  18. #include <fsl_esdhc.h>
  19. #endif
  20. #ifdef CONFIG_SYS_DPAA_FMAN
  21. #include <fsl_fman.h>
  22. #endif
  23. #ifdef CONFIG_MP
  24. #include <asm/arch/mp.h>
  25. #endif
  26. #include <fsl_sec.h>
  27. #include <asm/arch-fsl-layerscape/soc.h>
  28. #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
  29. #include <asm/armv8/sec_firmware.h>
  30. #endif
  31. #include <asm/arch/speed.h>
  32. #include <fsl_qbman.h>
  33. int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
  34. {
  35. const char *conn;
  36. /* Do NOT apply fixup for backplane modes specified in DT */
  37. if (phyc == PHY_INTERFACE_MODE_XGMII) {
  38. conn = fdt_getprop(blob, offset, "phy-connection-type", NULL);
  39. if (is_backplane_mode(conn))
  40. return 0;
  41. }
  42. return fdt_setprop_string(blob, offset, "phy-connection-type",
  43. phy_string_for_interface(phyc));
  44. }
  45. #ifdef CONFIG_MP
  46. void ft_fixup_cpu(void *blob)
  47. {
  48. int off;
  49. __maybe_unused u64 spin_tbl_addr = (u64)get_spin_tbl_addr();
  50. fdt32_t *reg;
  51. int addr_cells;
  52. u64 val, core_id;
  53. u32 mask = cpu_pos_mask();
  54. int off_prev = -1;
  55. off = fdt_path_offset(blob, "/cpus");
  56. if (off < 0) {
  57. puts("couldn't find /cpus node\n");
  58. return;
  59. }
  60. fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
  61. off = fdt_node_offset_by_prop_value(blob, off_prev, "device_type",
  62. "cpu", 4);
  63. while (off != -FDT_ERR_NOTFOUND) {
  64. reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  65. if (reg) {
  66. core_id = fdt_read_number(reg, addr_cells);
  67. if (!test_bit(id_to_core(core_id), &mask)) {
  68. fdt_del_node(blob, off);
  69. off = off_prev;
  70. }
  71. }
  72. off_prev = off;
  73. off = fdt_node_offset_by_prop_value(blob, off_prev,
  74. "device_type", "cpu", 4);
  75. }
  76. #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT) && \
  77. defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI)
  78. int node;
  79. u32 psci_ver;
  80. /* Check the psci version to determine if the psci is supported */
  81. psci_ver = sec_firmware_support_psci_version();
  82. if (psci_ver == 0xffffffff) {
  83. /* remove psci DT node */
  84. node = fdt_path_offset(blob, "/psci");
  85. if (node >= 0)
  86. goto remove_psci_node;
  87. node = fdt_node_offset_by_compatible(blob, -1, "arm,psci");
  88. if (node >= 0)
  89. goto remove_psci_node;
  90. node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-0.2");
  91. if (node >= 0)
  92. goto remove_psci_node;
  93. node = fdt_node_offset_by_compatible(blob, -1, "arm,psci-1.0");
  94. if (node >= 0)
  95. goto remove_psci_node;
  96. remove_psci_node:
  97. if (node >= 0)
  98. fdt_del_node(blob, node);
  99. } else {
  100. return;
  101. }
  102. #endif
  103. off = fdt_path_offset(blob, "/cpus");
  104. if (off < 0) {
  105. puts("couldn't find /cpus node\n");
  106. return;
  107. }
  108. fdt_support_default_count_cells(blob, off, &addr_cells, NULL);
  109. off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
  110. while (off != -FDT_ERR_NOTFOUND) {
  111. reg = (fdt32_t *)fdt_getprop(blob, off, "reg", 0);
  112. if (reg) {
  113. core_id = fdt_read_number(reg, addr_cells);
  114. if (core_id == 0 || (is_core_online(core_id))) {
  115. val = spin_tbl_addr;
  116. val += id_to_core(core_id) *
  117. SPIN_TABLE_ELEM_SIZE;
  118. val = cpu_to_fdt64(val);
  119. fdt_setprop_string(blob, off, "enable-method",
  120. "spin-table");
  121. fdt_setprop(blob, off, "cpu-release-addr",
  122. &val, sizeof(val));
  123. } else {
  124. debug("skipping offline core\n");
  125. }
  126. } else {
  127. puts("Warning: found cpu node without reg property\n");
  128. }
  129. off = fdt_node_offset_by_prop_value(blob, off, "device_type",
  130. "cpu", 4);
  131. }
  132. fdt_add_mem_rsv(blob, (uintptr_t)secondary_boot_code_start,
  133. secondary_boot_code_size);
  134. #if CONFIG_IS_ENABLED(EFI_LOADER)
  135. efi_add_memory_map((uintptr_t)secondary_boot_code_start,
  136. secondary_boot_code_size, EFI_RESERVED_MEMORY_TYPE);
  137. #endif
  138. }
  139. #endif
  140. void fsl_fdt_disable_usb(void *blob)
  141. {
  142. int off;
  143. /*
  144. * SYSCLK is used as a reference clock for USB. When the USB
  145. * controller is used, SYSCLK must meet the additional requirement
  146. * of 100 MHz.
  147. */
  148. if (CONFIG_SYS_CLK_FREQ != 100000000) {
  149. off = fdt_node_offset_by_compatible(blob, -1, "snps,dwc3");
  150. while (off != -FDT_ERR_NOTFOUND) {
  151. fdt_status_disabled(blob, off);
  152. off = fdt_node_offset_by_compatible(blob, off,
  153. "snps,dwc3");
  154. }
  155. }
  156. }
  157. #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
  158. static void fdt_fixup_gic(void *blob)
  159. {
  160. int offset, err;
  161. u64 reg[8];
  162. struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  163. unsigned int val;
  164. struct ccsr_scfg __iomem *scfg = (void *)CONFIG_SYS_FSL_SCFG_ADDR;
  165. int align_64k = 0;
  166. val = gur_in32(&gur->svr);
  167. if (!IS_SVR_DEV(val, SVR_DEV(SVR_LS1043A))) {
  168. align_64k = 1;
  169. } else if (SVR_REV(val) != REV1_0) {
  170. val = scfg_in32(&scfg->gic_align) & (0x01 << GIC_ADDR_BIT);
  171. if (!val)
  172. align_64k = 1;
  173. }
  174. offset = fdt_subnode_offset(blob, 0, "interrupt-controller@1400000");
  175. if (offset < 0) {
  176. printf("WARNING: fdt_subnode_offset can't find node %s: %s\n",
  177. "interrupt-controller@1400000", fdt_strerror(offset));
  178. return;
  179. }
  180. /* Fixup gic node align with 64K */
  181. if (align_64k) {
  182. reg[0] = cpu_to_fdt64(GICD_BASE_64K);
  183. reg[1] = cpu_to_fdt64(GICD_SIZE_64K);
  184. reg[2] = cpu_to_fdt64(GICC_BASE_64K);
  185. reg[3] = cpu_to_fdt64(GICC_SIZE_64K);
  186. reg[4] = cpu_to_fdt64(GICH_BASE_64K);
  187. reg[5] = cpu_to_fdt64(GICH_SIZE_64K);
  188. reg[6] = cpu_to_fdt64(GICV_BASE_64K);
  189. reg[7] = cpu_to_fdt64(GICV_SIZE_64K);
  190. } else {
  191. /* Fixup gic node align with default */
  192. reg[0] = cpu_to_fdt64(GICD_BASE);
  193. reg[1] = cpu_to_fdt64(GICD_SIZE);
  194. reg[2] = cpu_to_fdt64(GICC_BASE);
  195. reg[3] = cpu_to_fdt64(GICC_SIZE);
  196. reg[4] = cpu_to_fdt64(GICH_BASE);
  197. reg[5] = cpu_to_fdt64(GICH_SIZE);
  198. reg[6] = cpu_to_fdt64(GICV_BASE);
  199. reg[7] = cpu_to_fdt64(GICV_SIZE);
  200. }
  201. err = fdt_setprop(blob, offset, "reg", reg, sizeof(reg));
  202. if (err < 0) {
  203. printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
  204. "reg", "interrupt-controller@1400000",
  205. fdt_strerror(err));
  206. return;
  207. }
  208. return;
  209. }
  210. #endif
  211. #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
  212. static int _fdt_fixup_msi_node(void *blob, const char *name,
  213. int irq_0, int irq_1, int rev)
  214. {
  215. int err, offset, len;
  216. u32 tmp[4][3];
  217. void *p;
  218. offset = fdt_path_offset(blob, name);
  219. if (offset < 0) {
  220. printf("WARNING: fdt_path_offset can't find path %s: %s\n",
  221. name, fdt_strerror(offset));
  222. return 0;
  223. }
  224. /*fixup the property of interrupts*/
  225. tmp[0][0] = cpu_to_fdt32(0x0);
  226. tmp[0][1] = cpu_to_fdt32(irq_0);
  227. tmp[0][2] = cpu_to_fdt32(0x4);
  228. if (rev > REV1_0) {
  229. tmp[1][0] = cpu_to_fdt32(0x0);
  230. tmp[1][1] = cpu_to_fdt32(irq_1);
  231. tmp[1][2] = cpu_to_fdt32(0x4);
  232. tmp[2][0] = cpu_to_fdt32(0x0);
  233. tmp[2][1] = cpu_to_fdt32(irq_1 + 1);
  234. tmp[2][2] = cpu_to_fdt32(0x4);
  235. tmp[3][0] = cpu_to_fdt32(0x0);
  236. tmp[3][1] = cpu_to_fdt32(irq_1 + 2);
  237. tmp[3][2] = cpu_to_fdt32(0x4);
  238. len = sizeof(tmp);
  239. } else {
  240. len = sizeof(tmp[0]);
  241. }
  242. err = fdt_setprop(blob, offset, "interrupts", tmp, len);
  243. if (err < 0) {
  244. printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
  245. "interrupts", name, fdt_strerror(err));
  246. return 0;
  247. }
  248. /*fixup the property of reg*/
  249. p = (char *)fdt_getprop(blob, offset, "reg", &len);
  250. if (!p) {
  251. printf("WARNING: fdt_getprop can't get %s from node %s\n",
  252. "reg", name);
  253. return 0;
  254. }
  255. memcpy((char *)tmp, p, len);
  256. if (rev > REV1_0)
  257. *((u32 *)tmp + 3) = cpu_to_fdt32(0x1000);
  258. else
  259. *((u32 *)tmp + 3) = cpu_to_fdt32(0x8);
  260. err = fdt_setprop(blob, offset, "reg", tmp, len);
  261. if (err < 0) {
  262. printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
  263. "reg", name, fdt_strerror(err));
  264. return 0;
  265. }
  266. /*fixup the property of compatible*/
  267. if (rev > REV1_0)
  268. err = fdt_setprop_string(blob, offset, "compatible",
  269. "fsl,ls1043a-v1.1-msi");
  270. else
  271. err = fdt_setprop_string(blob, offset, "compatible",
  272. "fsl,ls1043a-msi");
  273. if (err < 0) {
  274. printf("WARNING: fdt_setprop can't set %s from node %s: %s\n",
  275. "compatible", name, fdt_strerror(err));
  276. return 0;
  277. }
  278. return 1;
  279. }
  280. static int _fdt_fixup_pci_msi(void *blob, const char *name, int rev)
  281. {
  282. int offset, len, err;
  283. void *p;
  284. int val;
  285. u32 tmp[4][8];
  286. offset = fdt_path_offset(blob, name);
  287. if (offset < 0) {
  288. printf("WARNING: fdt_path_offset can't find path %s: %s\n",
  289. name, fdt_strerror(offset));
  290. return 0;
  291. }
  292. p = (char *)fdt_getprop(blob, offset, "interrupt-map", &len);
  293. if (!p || len != sizeof(tmp)) {
  294. printf("WARNING: fdt_getprop can't get %s from node %s\n",
  295. "interrupt-map", name);
  296. return 0;
  297. }
  298. memcpy((char *)tmp, p, len);
  299. val = fdt32_to_cpu(tmp[0][6]);
  300. if (rev == REV1_0) {
  301. tmp[1][6] = cpu_to_fdt32(val + 1);
  302. tmp[2][6] = cpu_to_fdt32(val + 2);
  303. tmp[3][6] = cpu_to_fdt32(val + 3);
  304. } else {
  305. tmp[1][6] = cpu_to_fdt32(val);
  306. tmp[2][6] = cpu_to_fdt32(val);
  307. tmp[3][6] = cpu_to_fdt32(val);
  308. }
  309. err = fdt_setprop(blob, offset, "interrupt-map", tmp, sizeof(tmp));
  310. if (err < 0) {
  311. printf("WARNING: fdt_setprop can't set %s from node %s: %s.\n",
  312. "interrupt-map", name, fdt_strerror(err));
  313. return 0;
  314. }
  315. return 1;
  316. }
  317. /* Fixup msi node for ls1043a rev1.1*/
  318. static void fdt_fixup_msi(void *blob)
  319. {
  320. struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  321. unsigned int rev;
  322. rev = gur_in32(&gur->svr);
  323. if (!IS_SVR_DEV(rev, SVR_DEV(SVR_LS1043A)))
  324. return;
  325. rev = SVR_REV(rev);
  326. _fdt_fixup_msi_node(blob, "/soc/msi-controller1@1571000",
  327. 116, 111, rev);
  328. _fdt_fixup_msi_node(blob, "/soc/msi-controller2@1572000",
  329. 126, 121, rev);
  330. _fdt_fixup_msi_node(blob, "/soc/msi-controller3@1573000",
  331. 160, 155, rev);
  332. _fdt_fixup_pci_msi(blob, "/soc/pcie@3400000", rev);
  333. _fdt_fixup_pci_msi(blob, "/soc/pcie@3500000", rev);
  334. _fdt_fixup_pci_msi(blob, "/soc/pcie@3600000", rev);
  335. }
  336. #endif
  337. #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
  338. /* Remove JR node used by SEC firmware */
  339. void fdt_fixup_remove_jr(void *blob)
  340. {
  341. int jr_node, addr_cells, len;
  342. int crypto_node = fdt_path_offset(blob, "crypto");
  343. u64 jr_offset, used_jr;
  344. fdt32_t *reg;
  345. used_jr = sec_firmware_used_jobring_offset();
  346. fdt_support_default_count_cells(blob, crypto_node, &addr_cells, NULL);
  347. jr_node = fdt_node_offset_by_compatible(blob, crypto_node,
  348. "fsl,sec-v4.0-job-ring");
  349. while (jr_node != -FDT_ERR_NOTFOUND) {
  350. reg = (fdt32_t *)fdt_getprop(blob, jr_node, "reg", &len);
  351. if (reg) {
  352. jr_offset = fdt_read_number(reg, addr_cells);
  353. if (jr_offset == used_jr) {
  354. fdt_del_node(blob, jr_node);
  355. break;
  356. }
  357. }
  358. jr_node = fdt_node_offset_by_compatible(blob, jr_node,
  359. "fsl,sec-v4.0-job-ring");
  360. }
  361. }
  362. #endif
  363. #ifdef CONFIG_ARCH_LS1028A
  364. static void fdt_disable_multimedia(void *blob, unsigned int svr)
  365. {
  366. int off;
  367. if (IS_MULTIMEDIA_EN(svr))
  368. return;
  369. /* Disable eDP/LCD node */
  370. off = fdt_node_offset_by_compatible(blob, -1, "arm,mali-dp500");
  371. if (off != -FDT_ERR_NOTFOUND)
  372. fdt_status_disabled(blob, off);
  373. /* Disable GPU node */
  374. off = fdt_node_offset_by_compatible(blob, -1, "fsl,ls1028a-gpu");
  375. if (off != -FDT_ERR_NOTFOUND)
  376. fdt_status_disabled(blob, off);
  377. }
  378. #endif
  379. #ifdef CONFIG_PCIE_ECAM_GENERIC
  380. __weak void fdt_fixup_ecam(void *blob)
  381. {
  382. }
  383. #endif
  384. /*
  385. * If it is a non-E part the crypto is disabled on the following SoCs:
  386. * - LS1043A
  387. * - LS1088A
  388. * - LS2080A
  389. * - LS2088A
  390. * and their personalities.
  391. *
  392. * On all other SoCs just the export-controlled ciphers are disabled, that
  393. * means that the following is still working:
  394. * - hashing (using MDHA - message digest hash accelerator)
  395. * - random number generation (using RNG4)
  396. * - cyclic redundancy checking (using CRCA)
  397. * - runtime integrity checker (RTIC)
  398. *
  399. * The linux driver will figure out what is available and what is not.
  400. * Therefore, we just remove the crypto node on the SoCs which have no crypto
  401. * support at all.
  402. */
  403. static bool crypto_is_disabled(unsigned int svr)
  404. {
  405. if (IS_E_PROCESSOR(svr))
  406. return false;
  407. if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1043A)))
  408. return true;
  409. if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS1088A)))
  410. return true;
  411. if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2080A)))
  412. return true;
  413. if (IS_SVR_DEV(svr, SVR_DEV(SVR_LS2088A)))
  414. return true;
  415. return false;
  416. }
  417. #ifdef CONFIG_FSL_PFE
  418. void pfe_set_firmware_in_fdt(void *blob, int pfenode, void *pfw, char *pename,
  419. unsigned int len)
  420. {
  421. int rc, fwnode;
  422. unsigned int phandle;
  423. char subnode_str[32], prop_str[32], phandle_str[32], s[64];
  424. sprintf(subnode_str, "pfe-%s-firmware", pename);
  425. sprintf(prop_str, "fsl,pfe-%s-firmware", pename);
  426. sprintf(phandle_str, "fsl,%s-firmware", pename);
  427. /*Add PE FW to fdt.*/
  428. /* Increase the size of the fdt to make room for the node. */
  429. rc = fdt_increase_size(blob, len);
  430. if (rc < 0) {
  431. printf("Unable to make room for %s firmware: %s\n", pename,
  432. fdt_strerror(rc));
  433. return;
  434. }
  435. /* Create the firmware node. */
  436. fwnode = fdt_add_subnode(blob, pfenode, subnode_str);
  437. if (fwnode < 0) {
  438. fdt_get_path(blob, pfenode, s, sizeof(s));
  439. printf("Could not add firmware node to %s: %s\n", s,
  440. fdt_strerror(fwnode));
  441. return;
  442. }
  443. rc = fdt_setprop_string(blob, fwnode, "compatible", prop_str);
  444. if (rc < 0) {
  445. fdt_get_path(blob, fwnode, s, sizeof(s));
  446. printf("Could not add compatible property to node %s: %s\n", s,
  447. fdt_strerror(rc));
  448. return;
  449. }
  450. rc = fdt_setprop_u32(blob, fwnode, "length", len);
  451. if (rc < 0) {
  452. fdt_get_path(blob, fwnode, s, sizeof(s));
  453. printf("Could not add compatible property to node %s: %s\n", s,
  454. fdt_strerror(rc));
  455. return;
  456. }
  457. /*create phandle and set the property*/
  458. phandle = fdt_create_phandle(blob, fwnode);
  459. if (!phandle) {
  460. fdt_get_path(blob, fwnode, s, sizeof(s));
  461. printf("Could not add phandle property to node %s: %s\n", s,
  462. fdt_strerror(rc));
  463. return;
  464. }
  465. rc = fdt_setprop(blob, fwnode, phandle_str, pfw, len);
  466. if (rc < 0) {
  467. fdt_get_path(blob, fwnode, s, sizeof(s));
  468. printf("Could not add firmware property to node %s: %s\n", s,
  469. fdt_strerror(rc));
  470. return;
  471. }
  472. }
  473. void fdt_fixup_pfe_firmware(void *blob)
  474. {
  475. int pfenode;
  476. unsigned int len_class = 0, len_tmu = 0, len_util = 0;
  477. const char *p;
  478. void *pclassfw, *ptmufw, *putilfw;
  479. /* The first PFE we find, will contain the actual firmware. */
  480. pfenode = fdt_node_offset_by_compatible(blob, -1, "fsl,pfe");
  481. if (pfenode < 0)
  482. /* Exit silently if there are no PFE devices */
  483. return;
  484. /* If we already have a firmware node, then also exit silently. */
  485. if (fdt_node_offset_by_compatible(blob, -1,
  486. "fsl,pfe-class-firmware") > 0)
  487. return;
  488. /* If the environment variable is not set, then exit silently */
  489. p = env_get("class_elf_firmware");
  490. if (!p)
  491. return;
  492. pclassfw = (void *)hextoul(p, NULL);
  493. if (!pclassfw)
  494. return;
  495. p = env_get("class_elf_size");
  496. if (!p)
  497. return;
  498. len_class = hextoul(p, NULL);
  499. /* If the environment variable is not set, then exit silently */
  500. p = env_get("tmu_elf_firmware");
  501. if (!p)
  502. return;
  503. ptmufw = (void *)hextoul(p, NULL);
  504. if (!ptmufw)
  505. return;
  506. p = env_get("tmu_elf_size");
  507. if (!p)
  508. return;
  509. len_tmu = hextoul(p, NULL);
  510. if (len_class == 0 || len_tmu == 0) {
  511. printf("PFE FW corrupted. CLASS FW size %d, TMU FW size %d\n",
  512. len_class, len_tmu);
  513. return;
  514. }
  515. /*Add CLASS FW to fdt.*/
  516. pfe_set_firmware_in_fdt(blob, pfenode, pclassfw, "class", len_class);
  517. /*Add TMU FW to fdt.*/
  518. pfe_set_firmware_in_fdt(blob, pfenode, ptmufw, "tmu", len_tmu);
  519. /* Util PE firmware is handled separately as it is not a usual case*/
  520. p = env_get("util_elf_firmware");
  521. if (!p)
  522. return;
  523. putilfw = (void *)hextoul(p, NULL);
  524. if (!putilfw)
  525. return;
  526. p = env_get("util_elf_size");
  527. if (!p)
  528. return;
  529. len_util = hextoul(p, NULL);
  530. if (len_util) {
  531. printf("PFE Util PE firmware is not added to FDT.\n");
  532. return;
  533. }
  534. pfe_set_firmware_in_fdt(blob, pfenode, putilfw, "util", len_util);
  535. }
  536. #endif
  537. void ft_cpu_setup(void *blob, struct bd_info *bd)
  538. {
  539. struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
  540. unsigned int svr = gur_in32(&gur->svr);
  541. /* delete crypto node if not on an E-processor */
  542. if (crypto_is_disabled(svr))
  543. fdt_fixup_crypto_node(blob, 0);
  544. #if CONFIG_SYS_FSL_SEC_COMPAT >= 4
  545. else {
  546. ccsr_sec_t __iomem *sec;
  547. #if CONFIG_IS_ENABLED(ARMV8_SEC_FIRMWARE_SUPPORT)
  548. fdt_fixup_remove_jr(blob);
  549. fdt_fixup_kaslr(blob);
  550. #endif
  551. sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR;
  552. fdt_fixup_crypto_node(blob, sec_in32(&sec->secvid_ms));
  553. }
  554. #endif
  555. #ifdef CONFIG_MP
  556. ft_fixup_cpu(blob);
  557. #endif
  558. #ifdef CONFIG_SYS_NS16550
  559. do_fixup_by_compat_u32(blob, "fsl,ns16550",
  560. "clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
  561. #endif
  562. do_fixup_by_path_u32(blob, "/sysclk", "clock-frequency",
  563. CONFIG_SYS_CLK_FREQ, 1);
  564. #ifdef CONFIG_GIC_V3_ITS
  565. ls_gic_rd_tables_init(blob);
  566. #endif
  567. #if defined(CONFIG_PCIE_LAYERSCAPE) || defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
  568. ft_pci_setup(blob, bd);
  569. #endif
  570. #ifdef CONFIG_FSL_ESDHC
  571. fdt_fixup_esdhc(blob, bd);
  572. #endif
  573. #ifdef CONFIG_SYS_DPAA_QBMAN
  574. fdt_fixup_bportals(blob);
  575. fdt_fixup_qportals(blob);
  576. do_fixup_by_compat_u32(blob, "fsl,qman",
  577. "clock-frequency", get_qman_freq(), 1);
  578. #endif
  579. #ifdef CONFIG_SYS_DPAA_FMAN
  580. fdt_fixup_fman_firmware(blob);
  581. #endif
  582. #ifdef CONFIG_FSL_PFE
  583. fdt_fixup_pfe_firmware(blob);
  584. #endif
  585. #ifndef CONFIG_ARCH_LS1012A
  586. fsl_fdt_disable_usb(blob);
  587. #endif
  588. #ifdef CONFIG_HAS_FEATURE_GIC64K_ALIGN
  589. fdt_fixup_gic(blob);
  590. #endif
  591. #ifdef CONFIG_HAS_FEATURE_ENHANCED_MSI
  592. fdt_fixup_msi(blob);
  593. #endif
  594. #ifdef CONFIG_ARCH_LS1028A
  595. fdt_disable_multimedia(blob, svr);
  596. #endif
  597. #ifdef CONFIG_PCIE_ECAM_GENERIC
  598. fdt_fixup_ecam(blob);
  599. #endif
  600. }