i2c-uclass.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Google, Inc
  4. */
  5. #define LOG_CATEGORY UCLASS_I2C
  6. #include <common.h>
  7. #include <dm.h>
  8. #include <errno.h>
  9. #include <i2c.h>
  10. #include <log.h>
  11. #include <malloc.h>
  12. #include <acpi/acpi_device.h>
  13. #include <dm/acpi.h>
  14. #include <dm/device-internal.h>
  15. #include <dm/lists.h>
  16. #include <dm/pinctrl.h>
  17. #if CONFIG_IS_ENABLED(DM_GPIO)
  18. #include <asm/gpio.h>
  19. #endif
  20. #include <linux/delay.h>
  21. #include "acpi_i2c.h"
  22. #define I2C_MAX_OFFSET_LEN 4
  23. enum {
  24. PIN_SDA = 0,
  25. PIN_SCL,
  26. PIN_COUNT,
  27. };
  28. /* Useful debugging function */
  29. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  30. {
  31. int i;
  32. for (i = 0; i < nmsgs; i++) {
  33. struct i2c_msg *m = &msg[i];
  34. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  35. msg->addr, msg->len);
  36. if (!(m->flags & I2C_M_RD))
  37. printf(": %x", m->buf[0]);
  38. printf("\n");
  39. }
  40. }
  41. /**
  42. * i2c_setup_offset() - Set up a new message with a chip offset
  43. *
  44. * @chip: Chip to use
  45. * @offset: Byte offset within chip
  46. * @offset_buf: Place to put byte offset
  47. * @msg: Message buffer
  48. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  49. * message is still set up but will not contain an offset.
  50. */
  51. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  52. uint8_t offset_buf[], struct i2c_msg *msg)
  53. {
  54. int offset_len = chip->offset_len;
  55. msg->addr = chip->chip_addr;
  56. if (chip->chip_addr_offset_mask)
  57. msg->addr |= (offset >> (8 * offset_len)) &
  58. chip->chip_addr_offset_mask;
  59. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  60. msg->len = chip->offset_len;
  61. msg->buf = offset_buf;
  62. if (!offset_len)
  63. return -EADDRNOTAVAIL;
  64. assert(offset_len <= I2C_MAX_OFFSET_LEN);
  65. while (offset_len--)
  66. *offset_buf++ = offset >> (8 * offset_len);
  67. return 0;
  68. }
  69. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  70. uint8_t *buffer, int len)
  71. {
  72. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  73. struct udevice *bus = dev_get_parent(dev);
  74. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  75. struct i2c_msg msg[2], *ptr;
  76. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  77. int ret;
  78. int i;
  79. for (i = 0; i < len; i++) {
  80. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  81. return -EINVAL;
  82. ptr = msg + 1;
  83. ptr->addr = msg->addr;
  84. ptr->flags = msg->flags | I2C_M_RD;
  85. ptr->len = 1;
  86. ptr->buf = &buffer[i];
  87. ptr++;
  88. ret = ops->xfer(bus, msg, ptr - msg);
  89. if (ret)
  90. return ret;
  91. }
  92. return 0;
  93. }
  94. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  95. const uint8_t *buffer, int len)
  96. {
  97. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  98. struct udevice *bus = dev_get_parent(dev);
  99. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  100. struct i2c_msg msg[1];
  101. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  102. int ret;
  103. int i;
  104. for (i = 0; i < len; i++) {
  105. if (i2c_setup_offset(chip, offset + i, buf, msg))
  106. return -EINVAL;
  107. buf[msg->len++] = buffer[i];
  108. ret = ops->xfer(bus, msg, 1);
  109. if (ret)
  110. return ret;
  111. }
  112. return 0;
  113. }
  114. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  115. {
  116. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  117. struct udevice *bus = dev_get_parent(dev);
  118. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  119. struct i2c_msg msg[2], *ptr;
  120. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  121. int msg_count;
  122. if (!ops->xfer)
  123. return -ENOSYS;
  124. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  125. return i2c_read_bytewise(dev, offset, buffer, len);
  126. ptr = msg;
  127. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  128. ptr++;
  129. if (len) {
  130. ptr->addr = msg->addr;
  131. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  132. ptr->flags |= I2C_M_RD;
  133. ptr->len = len;
  134. ptr->buf = buffer;
  135. ptr++;
  136. }
  137. msg_count = ptr - msg;
  138. return ops->xfer(bus, msg, msg_count);
  139. }
  140. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  141. int len)
  142. {
  143. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  144. struct udevice *bus = dev_get_parent(dev);
  145. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  146. struct i2c_msg msg[1];
  147. if (!ops->xfer)
  148. return -ENOSYS;
  149. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  150. return i2c_write_bytewise(dev, offset, buffer, len);
  151. /*
  152. * The simple approach would be to send two messages here: one to
  153. * set the offset and one to write the bytes. However some drivers
  154. * will not be expecting this, and some chips won't like how the
  155. * driver presents this on the I2C bus.
  156. *
  157. * The API does not support separate offset and data. We could extend
  158. * it with a flag indicating that there is data in the next message
  159. * that needs to be processed in the same transaction. We could
  160. * instead add an additional buffer to each message. For now, handle
  161. * this in the uclass since it isn't clear what the impact on drivers
  162. * would be with this extra complication. Unfortunately this means
  163. * copying the message.
  164. *
  165. * Use the stack for small messages, malloc() for larger ones. We
  166. * need to allow space for the offset (up to 4 bytes) and the message
  167. * itself.
  168. */
  169. if (len < 64) {
  170. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  171. i2c_setup_offset(chip, offset, buf, msg);
  172. msg->len += len;
  173. memcpy(buf + chip->offset_len, buffer, len);
  174. return ops->xfer(bus, msg, 1);
  175. } else {
  176. uint8_t *buf;
  177. int ret;
  178. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  179. if (!buf)
  180. return -ENOMEM;
  181. i2c_setup_offset(chip, offset, buf, msg);
  182. msg->len += len;
  183. memcpy(buf + chip->offset_len, buffer, len);
  184. ret = ops->xfer(bus, msg, 1);
  185. free(buf);
  186. return ret;
  187. }
  188. }
  189. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  190. {
  191. struct udevice *bus = dev_get_parent(dev);
  192. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  193. if (!ops->xfer)
  194. return -ENOSYS;
  195. return ops->xfer(bus, msg, nmsgs);
  196. }
  197. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  198. {
  199. uint8_t val;
  200. int ret;
  201. ret = dm_i2c_read(dev, offset, &val, 1);
  202. if (ret < 0)
  203. return ret;
  204. return val;
  205. }
  206. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  207. {
  208. uint8_t val = value;
  209. return dm_i2c_write(dev, offset, &val, 1);
  210. }
  211. /**
  212. * i2c_probe_chip() - probe for a chip on a bus
  213. *
  214. * @bus: Bus to probe
  215. * @chip_addr: Chip address to probe
  216. * @flags: Flags for the chip
  217. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  218. * does not respond to probe
  219. */
  220. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  221. enum dm_i2c_chip_flags chip_flags)
  222. {
  223. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  224. struct i2c_msg msg[1];
  225. int ret;
  226. if (ops->probe_chip) {
  227. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  228. if (!ret || ret != -ENOSYS)
  229. return ret;
  230. }
  231. if (!ops->xfer)
  232. return -ENOSYS;
  233. /* Probe with a zero-length message */
  234. msg->addr = chip_addr;
  235. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  236. msg->len = 0;
  237. msg->buf = NULL;
  238. return ops->xfer(bus, msg, 1);
  239. }
  240. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  241. struct udevice **devp)
  242. {
  243. struct dm_i2c_chip *chip;
  244. char name[30], *str;
  245. struct udevice *dev;
  246. int ret;
  247. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  248. str = strdup(name);
  249. if (!str)
  250. return -ENOMEM;
  251. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  252. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  253. if (ret)
  254. goto err_bind;
  255. /* Tell the device what we know about it */
  256. chip = dev_get_parent_plat(dev);
  257. chip->chip_addr = chip_addr;
  258. chip->offset_len = offset_len;
  259. ret = device_probe(dev);
  260. debug("%s: device_probe: ret=%d\n", __func__, ret);
  261. if (ret)
  262. goto err_probe;
  263. *devp = dev;
  264. return 0;
  265. err_probe:
  266. /*
  267. * If the device failed to probe, unbind it. There is nothing there
  268. * on the bus so we don't want to leave it lying around
  269. */
  270. device_unbind(dev);
  271. err_bind:
  272. free(str);
  273. return ret;
  274. }
  275. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  276. struct udevice **devp)
  277. {
  278. struct udevice *dev;
  279. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  280. bus->name, chip_addr);
  281. for (device_find_first_child(bus, &dev); dev;
  282. device_find_next_child(&dev)) {
  283. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  284. int ret;
  285. if (chip->chip_addr == (chip_addr &
  286. ~chip->chip_addr_offset_mask)) {
  287. ret = device_probe(dev);
  288. debug("found, ret=%d\n", ret);
  289. if (ret)
  290. return ret;
  291. *devp = dev;
  292. return 0;
  293. }
  294. }
  295. debug("not found\n");
  296. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  297. }
  298. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  299. struct udevice **devp)
  300. {
  301. struct udevice *bus;
  302. int ret;
  303. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  304. if (ret) {
  305. debug("Cannot find I2C bus %d\n", busnum);
  306. return ret;
  307. }
  308. /* detect the presence of the chip on the bus */
  309. ret = i2c_probe_chip(bus, chip_addr, 0);
  310. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  311. chip_addr, ret);
  312. if (ret) {
  313. debug("Cannot detect I2C chip %02x on bus %d\n", chip_addr,
  314. busnum);
  315. return ret;
  316. }
  317. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  318. if (ret) {
  319. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  320. busnum);
  321. return ret;
  322. }
  323. return 0;
  324. }
  325. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  326. struct udevice **devp)
  327. {
  328. int ret;
  329. *devp = NULL;
  330. /* First probe that chip */
  331. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  332. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  333. chip_addr, ret);
  334. if (ret)
  335. return ret;
  336. /* The chip was found, see if we have a driver, and probe it */
  337. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  338. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  339. return ret;
  340. }
  341. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  342. {
  343. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  344. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  345. int ret;
  346. /*
  347. * If we have a method, call it. If not then the driver probably wants
  348. * to deal with speed changes on the next transfer. It can easily read
  349. * the current speed from this uclass
  350. */
  351. if (ops->set_bus_speed) {
  352. ret = ops->set_bus_speed(bus, speed);
  353. if (ret)
  354. return ret;
  355. }
  356. i2c->speed_hz = speed;
  357. return 0;
  358. }
  359. int dm_i2c_get_bus_speed(struct udevice *bus)
  360. {
  361. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  362. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  363. if (!ops->get_bus_speed)
  364. return i2c->speed_hz;
  365. return ops->get_bus_speed(bus);
  366. }
  367. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  368. {
  369. struct udevice *bus = dev->parent;
  370. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  371. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  372. int ret;
  373. if (ops->set_flags) {
  374. ret = ops->set_flags(dev, flags);
  375. if (ret)
  376. return ret;
  377. }
  378. chip->flags = flags;
  379. return 0;
  380. }
  381. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  382. {
  383. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  384. *flagsp = chip->flags;
  385. return 0;
  386. }
  387. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  388. {
  389. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  390. if (offset_len > I2C_MAX_OFFSET_LEN)
  391. return log_ret(-EINVAL);
  392. chip->offset_len = offset_len;
  393. return 0;
  394. }
  395. int i2c_get_chip_offset_len(struct udevice *dev)
  396. {
  397. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  398. return chip->offset_len;
  399. }
  400. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask)
  401. {
  402. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  403. chip->chip_addr_offset_mask = mask;
  404. return 0;
  405. }
  406. uint i2c_get_chip_addr_offset_mask(struct udevice *dev)
  407. {
  408. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  409. return chip->chip_addr_offset_mask;
  410. }
  411. #if CONFIG_IS_ENABLED(DM_GPIO)
  412. static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
  413. {
  414. if (bit)
  415. dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
  416. else
  417. dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
  418. GPIOD_ACTIVE_LOW |
  419. GPIOD_IS_OUT_ACTIVE);
  420. }
  421. static int i2c_gpio_get_pin(struct gpio_desc *pin)
  422. {
  423. return dm_gpio_get_value(pin);
  424. }
  425. int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
  426. struct gpio_desc *scl_pin,
  427. unsigned int scl_count,
  428. unsigned int start_count,
  429. unsigned int delay)
  430. {
  431. int i, ret = -EREMOTEIO;
  432. i2c_gpio_set_pin(sda_pin, 1);
  433. i2c_gpio_set_pin(scl_pin, 1);
  434. udelay(delay);
  435. /* Toggle SCL until slave release SDA */
  436. for (; scl_count; --scl_count) {
  437. i2c_gpio_set_pin(scl_pin, 1);
  438. udelay(delay);
  439. i2c_gpio_set_pin(scl_pin, 0);
  440. udelay(delay);
  441. if (i2c_gpio_get_pin(sda_pin)) {
  442. ret = 0;
  443. break;
  444. }
  445. }
  446. if (!ret && start_count) {
  447. for (i = 0; i < start_count; i++) {
  448. /* Send start condition */
  449. udelay(delay);
  450. i2c_gpio_set_pin(sda_pin, 1);
  451. udelay(delay);
  452. i2c_gpio_set_pin(scl_pin, 1);
  453. udelay(delay);
  454. i2c_gpio_set_pin(sda_pin, 0);
  455. udelay(delay);
  456. i2c_gpio_set_pin(scl_pin, 0);
  457. }
  458. }
  459. /* Then, send I2C stop */
  460. i2c_gpio_set_pin(sda_pin, 0);
  461. udelay(delay);
  462. i2c_gpio_set_pin(scl_pin, 1);
  463. udelay(delay);
  464. i2c_gpio_set_pin(sda_pin, 1);
  465. udelay(delay);
  466. if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
  467. ret = -EREMOTEIO;
  468. return ret;
  469. }
  470. static int i2c_deblock_gpio(struct udevice *bus)
  471. {
  472. struct gpio_desc gpios[PIN_COUNT];
  473. int ret, ret0;
  474. ret = gpio_request_list_by_name(bus, "gpios", gpios,
  475. ARRAY_SIZE(gpios), GPIOD_IS_IN);
  476. if (ret != ARRAY_SIZE(gpios)) {
  477. debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
  478. __func__, dev_read_name(bus), bus->name);
  479. if (ret >= 0) {
  480. gpio_free_list(bus, gpios, ret);
  481. ret = -ENOENT;
  482. }
  483. goto out;
  484. }
  485. ret = pinctrl_select_state(bus, "gpio");
  486. if (ret) {
  487. debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
  488. __func__, dev_read_name(bus), bus->name);
  489. goto out_no_pinctrl;
  490. }
  491. ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL], 9, 0, 5);
  492. ret = pinctrl_select_state(bus, "default");
  493. if (ret) {
  494. debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
  495. __func__, dev_read_name(bus), bus->name);
  496. }
  497. ret = !ret ? ret0 : ret;
  498. out_no_pinctrl:
  499. gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
  500. out:
  501. return ret;
  502. }
  503. #else
  504. static int i2c_deblock_gpio(struct udevice *bus)
  505. {
  506. return -ENOSYS;
  507. }
  508. #endif /* DM_GPIO */
  509. int i2c_deblock(struct udevice *bus)
  510. {
  511. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  512. if (!ops->deblock)
  513. return i2c_deblock_gpio(bus);
  514. return ops->deblock(bus);
  515. }
  516. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  517. int i2c_chip_of_to_plat(struct udevice *dev, struct dm_i2c_chip *chip)
  518. {
  519. int addr;
  520. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  521. 1);
  522. chip->flags = 0;
  523. addr = dev_read_u32_default(dev, "reg", -1);
  524. if (addr == -1) {
  525. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  526. dev_read_name(dev), dev->name);
  527. return log_ret(-EINVAL);
  528. }
  529. chip->chip_addr = addr;
  530. return 0;
  531. }
  532. #endif
  533. static int i2c_pre_probe(struct udevice *dev)
  534. {
  535. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  536. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  537. unsigned int max = 0;
  538. ofnode node;
  539. int ret;
  540. i2c->max_transaction_bytes = 0;
  541. dev_for_each_subnode(node, dev) {
  542. ret = ofnode_read_u32(node,
  543. "u-boot,i2c-transaction-bytes",
  544. &max);
  545. if (!ret && max > i2c->max_transaction_bytes)
  546. i2c->max_transaction_bytes = max;
  547. }
  548. debug("%s: I2C bus: %s max transaction bytes: %d\n", __func__,
  549. dev->name, i2c->max_transaction_bytes);
  550. #endif
  551. return 0;
  552. }
  553. static int i2c_post_probe(struct udevice *dev)
  554. {
  555. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  556. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  557. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency",
  558. I2C_SPEED_STANDARD_RATE);
  559. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  560. #else
  561. return 0;
  562. #endif
  563. }
  564. static int i2c_child_post_bind(struct udevice *dev)
  565. {
  566. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  567. struct dm_i2c_chip *plat = dev_get_parent_plat(dev);
  568. if (!dev_has_ofnode(dev))
  569. return 0;
  570. return i2c_chip_of_to_plat(dev, plat);
  571. #else
  572. return 0;
  573. #endif
  574. }
  575. static int i2c_post_bind(struct udevice *dev)
  576. {
  577. int ret = 0;
  578. debug("%s: %s, seq=%d\n", __func__, dev->name, dev_seq(dev));
  579. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  580. ret = dm_scan_fdt_dev(dev);
  581. #endif
  582. return ret;
  583. }
  584. UCLASS_DRIVER(i2c) = {
  585. .id = UCLASS_I2C,
  586. .name = "i2c",
  587. .flags = DM_UC_FLAG_SEQ_ALIAS,
  588. .post_bind = i2c_post_bind,
  589. .pre_probe = i2c_pre_probe,
  590. .post_probe = i2c_post_probe,
  591. .per_device_auto = sizeof(struct dm_i2c_bus),
  592. .per_child_plat_auto = sizeof(struct dm_i2c_chip),
  593. .child_post_bind = i2c_child_post_bind,
  594. };
  595. UCLASS_DRIVER(i2c_generic) = {
  596. .id = UCLASS_I2C_GENERIC,
  597. .name = "i2c_generic",
  598. };
  599. static const struct udevice_id generic_chip_i2c_ids[] = {
  600. { .compatible = "i2c-chip", .data = I2C_DEVICE_GENERIC },
  601. #if CONFIG_IS_ENABLED(ACPIGEN)
  602. { .compatible = "hid-over-i2c", .data = I2C_DEVICE_HID_OVER_I2C },
  603. #endif
  604. { }
  605. };
  606. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  607. .name = "i2c_generic_chip_drv",
  608. .id = UCLASS_I2C_GENERIC,
  609. .of_match = generic_chip_i2c_ids,
  610. #if CONFIG_IS_ENABLED(ACPIGEN)
  611. .of_to_plat = acpi_i2c_of_to_plat,
  612. .priv_auto = sizeof(struct acpi_i2c_priv),
  613. #endif
  614. ACPI_OPS_PTR(&acpi_i2c_ops)
  615. };