jh7100-beaglev-starlight.dts 21 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /* Copyright (c) 2021 StarFive Technology Co., Ltd. */
  3. /dts-v1/;
  4. #include "jh7100.dtsi"
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/leds/common.h>
  7. #include <dt-bindings/pinctrl/pinctrl-starfive.h>
  8. #include <dt-bindings/starfive_fb.h>
  9. / {
  10. model = "BeagleV Starlight Beta";
  11. compatible = "beagle,beaglev-starlight-jh7100", "starfive,jh7100";
  12. aliases {
  13. mshc0 = &sdio0;
  14. mshc1 = &sdio1;
  15. serial0 = &uart3;
  16. serial1 = &uart0;
  17. };
  18. chosen {
  19. stdout-path = "serial0:115200n8";
  20. };
  21. cpus {
  22. timebase-frequency = <6250000>;
  23. };
  24. memory@80000000 {
  25. device_type = "memory";
  26. reg = <0x0 0x80000000 0x2 0x0>;
  27. };
  28. leds {
  29. compatible = "gpio-leds";
  30. led-ack {
  31. gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
  32. color = <LED_COLOR_ID_GREEN>;
  33. function = LED_FUNCTION_HEARTBEAT;
  34. linux,default-trigger = "heartbeat";
  35. label = "ack";
  36. };
  37. };
  38. reserved-memory {
  39. #address-cells = <2>;
  40. #size-cells = <2>;
  41. ranges;
  42. linux,cma {
  43. compatible = "shared-dma-pool";
  44. reusable;
  45. size = <0x0 0x28000000>;
  46. alignment = <0x0 0x1000>;
  47. alloc-ranges = <0x0 0xa0000000 0x0 0x28000000>;
  48. linux,cma-default;
  49. };
  50. jpu_reserved: framebuffer@c9000000 {
  51. reg = <0x0 0xc9000000 0x0 0x4000000>;
  52. };
  53. nvdla_reserved: framebuffer@d0000000 {
  54. no-map;
  55. reg = <0x0 0xd0000000 0x0 0x28000000>;
  56. };
  57. vin_reserved: framebuffer@f9000000 {
  58. compatible = "shared-dma-pool";
  59. no-map;
  60. reg = <0x0 0xf9000000 0x0 0x1000000>;
  61. };
  62. sffb_reserved: framebuffer@fb000000 {
  63. compatible = "shared-dma-pool";
  64. no-map;
  65. reg = <0x0 0xfb000000 0x0 0x2000000>;
  66. };
  67. };
  68. wifi_pwrseq: wifi-pwrseq {
  69. compatible = "mmc-pwrseq-simple";
  70. reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  71. };
  72. };
  73. &gmac {
  74. snps,reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&gmac_pins>;
  77. };
  78. &gpio {
  79. /* don't reset gpio mux for serial console on uart3 */
  80. starfive,keep-gpiomux = <13 14 0 2 3 45>;
  81. gmac_pins: gmac-0 {
  82. gtxclk-pins {
  83. pins = <PAD_FUNC_SHARE(115)>;
  84. bias-pull-up;
  85. drive-strength = <35>;
  86. input-enable;
  87. input-schmitt-enable;
  88. slew-rate = <0>;
  89. };
  90. miitxclk-pins {
  91. pins = <PAD_FUNC_SHARE(116)>;
  92. bias-pull-up;
  93. drive-strength = <14>;
  94. input-enable;
  95. input-schmitt-disable;
  96. slew-rate = <0>;
  97. };
  98. tx-pins {
  99. pins = <PAD_FUNC_SHARE(117)>,
  100. <PAD_FUNC_SHARE(119)>,
  101. <PAD_FUNC_SHARE(120)>,
  102. <PAD_FUNC_SHARE(121)>,
  103. <PAD_FUNC_SHARE(122)>,
  104. <PAD_FUNC_SHARE(123)>,
  105. <PAD_FUNC_SHARE(124)>,
  106. <PAD_FUNC_SHARE(125)>,
  107. <PAD_FUNC_SHARE(126)>;
  108. bias-pull-up;
  109. drive-strength = <35>;
  110. input-disable;
  111. input-schmitt-disable;
  112. slew-rate = <0>;
  113. };
  114. rxclk-pins {
  115. pins = <PAD_FUNC_SHARE(127)>;
  116. bias-pull-up;
  117. drive-strength = <14>;
  118. input-enable;
  119. input-schmitt-disable;
  120. slew-rate = <6>;
  121. };
  122. rxer-pins {
  123. pins = <PAD_FUNC_SHARE(129)>;
  124. bias-pull-up;
  125. drive-strength = <14>;
  126. input-enable;
  127. input-schmitt-disable;
  128. slew-rate = <0>;
  129. };
  130. rx-pins {
  131. pins = <PAD_FUNC_SHARE(128)>,
  132. <PAD_FUNC_SHARE(130)>,
  133. <PAD_FUNC_SHARE(131)>,
  134. <PAD_FUNC_SHARE(132)>,
  135. <PAD_FUNC_SHARE(133)>,
  136. <PAD_FUNC_SHARE(134)>,
  137. <PAD_FUNC_SHARE(135)>,
  138. <PAD_FUNC_SHARE(136)>,
  139. <PAD_FUNC_SHARE(137)>,
  140. <PAD_FUNC_SHARE(138)>,
  141. <PAD_FUNC_SHARE(139)>,
  142. <PAD_FUNC_SHARE(140)>,
  143. <PAD_FUNC_SHARE(141)>;
  144. bias-pull-up;
  145. drive-strength = <14>;
  146. input-enable;
  147. input-schmitt-enable;
  148. slew-rate = <0>;
  149. };
  150. };
  151. i2c0_pins: i2c0-0 {
  152. i2c-pins {
  153. pinmux = <GPIOMUX(62, GPO_LOW,
  154. GPO_I2C0_PAD_SCK_OEN,
  155. GPI_I2C0_PAD_SCK_IN)>,
  156. <GPIOMUX(61, GPO_LOW,
  157. GPO_I2C0_PAD_SDA_OEN,
  158. GPI_I2C0_PAD_SDA_IN)>;
  159. bias-disable; /* external pull-up */
  160. input-enable;
  161. input-schmitt-enable;
  162. };
  163. };
  164. i2c1_pins: i2c1-0 {
  165. i2c-pins {
  166. pinmux = <GPIOMUX(47, GPO_LOW,
  167. GPO_I2C1_PAD_SCK_OEN,
  168. GPI_I2C1_PAD_SCK_IN)>,
  169. <GPIOMUX(48, GPO_LOW,
  170. GPO_I2C1_PAD_SDA_OEN,
  171. GPI_I2C1_PAD_SDA_IN)>;
  172. bias-pull-up;
  173. input-enable;
  174. input-schmitt-enable;
  175. };
  176. };
  177. i2c2_pins: i2c2-0 {
  178. i2c-pins {
  179. pinmux = <GPIOMUX(60, GPO_LOW,
  180. GPO_I2C2_PAD_SCK_OEN,
  181. GPI_I2C2_PAD_SCK_IN)>,
  182. <GPIOMUX(59, GPO_LOW,
  183. GPO_I2C2_PAD_SDA_OEN,
  184. GPI_I2C2_PAD_SDA_IN)>;
  185. bias-disable; /* external pull-up */
  186. input-enable;
  187. input-schmitt-enable;
  188. };
  189. };
  190. pwm_pins: pwm-0 {
  191. pwm-pins {
  192. pinmux = <GPIOMUX(7,
  193. GPO_PWM_PAD_OUT_BIT0,
  194. GPO_PWM_PAD_OE_N_BIT0,
  195. GPI_NONE)>,
  196. <GPIOMUX(5,
  197. GPO_PWM_PAD_OUT_BIT1,
  198. GPO_PWM_PAD_OE_N_BIT1,
  199. GPI_NONE)>;
  200. // <GPIOMUX(45,
  201. // GPO_PWM_PAD_OUT_BIT2,
  202. // GPO_PWM_PAD_OE_N_BIT2,
  203. // GPI_NONE)>;
  204. bias-disable;
  205. drive-strength = <35>;
  206. input-disable;
  207. input-schmitt-disable;
  208. slew-rate = <0>;
  209. };
  210. };
  211. sdio0_pins: sdio0-0 {
  212. clk-pins {
  213. pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
  214. GPO_ENABLE, GPI_NONE)>;
  215. bias-disable;
  216. input-disable;
  217. input-schmitt-disable;
  218. };
  219. sdio-pins {
  220. pinmux = <GPIOMUX(55, GPO_LOW, GPO_DISABLE,
  221. GPI_SDIO0_PAD_CARD_DETECT_N)>,
  222. <GPIOMUX(53,
  223. GPO_SDIO0_PAD_CCMD_OUT,
  224. GPO_SDIO0_PAD_CCMD_OEN,
  225. GPI_SDIO0_PAD_CCMD_IN)>,
  226. <GPIOMUX(49,
  227. GPO_SDIO0_PAD_CDATA_OUT_BIT0,
  228. GPO_SDIO0_PAD_CDATA_OEN_BIT0,
  229. GPI_SDIO0_PAD_CDATA_IN_BIT0)>,
  230. <GPIOMUX(50,
  231. GPO_SDIO0_PAD_CDATA_OUT_BIT1,
  232. GPO_SDIO0_PAD_CDATA_OEN_BIT1,
  233. GPI_SDIO0_PAD_CDATA_IN_BIT1)>,
  234. <GPIOMUX(51,
  235. GPO_SDIO0_PAD_CDATA_OUT_BIT2,
  236. GPO_SDIO0_PAD_CDATA_OEN_BIT2,
  237. GPI_SDIO0_PAD_CDATA_IN_BIT2)>,
  238. <GPIOMUX(52,
  239. GPO_SDIO0_PAD_CDATA_OUT_BIT3,
  240. GPO_SDIO0_PAD_CDATA_OEN_BIT3,
  241. GPI_SDIO0_PAD_CDATA_IN_BIT3)>;
  242. bias-pull-up;
  243. input-enable;
  244. input-schmitt-enable;
  245. };
  246. };
  247. sdio1_pins: sdio1-0 {
  248. clk-pins {
  249. pinmux = <GPIOMUX(33, GPO_SDIO1_PAD_CCLK_OUT,
  250. GPO_ENABLE, GPI_NONE)>;
  251. bias-disable;
  252. input-disable;
  253. input-schmitt-disable;
  254. };
  255. sdio-pins {
  256. pinmux = <GPIOMUX(29,
  257. GPO_SDIO1_PAD_CCMD_OUT,
  258. GPO_SDIO1_PAD_CCMD_OEN,
  259. GPI_SDIO1_PAD_CCMD_IN)>,
  260. <GPIOMUX(36,
  261. GPO_SDIO1_PAD_CDATA_OUT_BIT0,
  262. GPO_SDIO1_PAD_CDATA_OEN_BIT0,
  263. GPI_SDIO1_PAD_CDATA_IN_BIT0)>,
  264. <GPIOMUX(30,
  265. GPO_SDIO1_PAD_CDATA_OUT_BIT1,
  266. GPO_SDIO1_PAD_CDATA_OEN_BIT1,
  267. GPI_SDIO1_PAD_CDATA_IN_BIT1)>,
  268. <GPIOMUX(34,
  269. GPO_SDIO1_PAD_CDATA_OUT_BIT2,
  270. GPO_SDIO1_PAD_CDATA_OEN_BIT2,
  271. GPI_SDIO1_PAD_CDATA_IN_BIT2)>,
  272. <GPIOMUX(31,
  273. GPO_SDIO1_PAD_CDATA_OUT_BIT3,
  274. GPO_SDIO1_PAD_CDATA_OEN_BIT3,
  275. GPI_SDIO1_PAD_CDATA_IN_BIT3)>;
  276. bias-pull-up;
  277. input-enable;
  278. input-schmitt-enable;
  279. };
  280. };
  281. spi2_pins: spi2-0 {
  282. mosi-pin {
  283. pinmux = <GPIOMUX(18, GPO_SPI2_PAD_TXD,
  284. GPO_ENABLE, GPI_NONE)>;
  285. bias-disable;
  286. input-disable;
  287. input-schmitt-disable;
  288. };
  289. miso-pin {
  290. pinmux = <GPIOMUX(16, GPO_LOW, GPO_DISABLE,
  291. GPI_SPI2_PAD_RXD)>;
  292. bias-pull-up;
  293. input-enable;
  294. input-schmitt-enable;
  295. };
  296. sck-pin {
  297. pinmux = <GPIOMUX(12, GPO_SPI2_PAD_SCK_OUT,
  298. GPO_ENABLE, GPI_NONE)>;
  299. bias-disable;
  300. input-disable;
  301. input-schmitt-disable;
  302. };
  303. ss-pins {
  304. pinmux = <GPIOMUX(15, GPO_SPI2_PAD_SS_0_N,
  305. GPO_ENABLE, GPI_NONE)>,
  306. <GPIOMUX(11, GPO_SPI2_PAD_SS_1_N,
  307. GPO_ENABLE, GPI_NONE)>;
  308. bias-disable;
  309. input-disable;
  310. input-schmitt-disable;
  311. };
  312. };
  313. uart0_pins: uart0-0 {
  314. rx-pins {
  315. pinmux = <GPIOMUX(40, GPO_LOW, GPO_DISABLE,
  316. GPI_UART0_PAD_SIN)>,
  317. <GPIOMUX(39, GPO_LOW, GPO_DISABLE,
  318. GPI_UART0_PAD_CTSN)>;
  319. bias-pull-up;
  320. input-enable;
  321. input-schmitt-enable;
  322. };
  323. tx-pins {
  324. pinmux = <GPIOMUX(41, GPO_UART0_PAD_SOUT,
  325. GPO_ENABLE, GPI_NONE)>,
  326. <GPIOMUX(42, GPO_UART0_PAD_RTSN,
  327. GPO_ENABLE, GPI_NONE)>;
  328. bias-disable;
  329. input-disable;
  330. input-schmitt-disable;
  331. };
  332. };
  333. uart3_pins: uart3-0 {
  334. rx-pins {
  335. pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
  336. GPI_UART3_PAD_SIN)>;
  337. bias-pull-up;
  338. drive-strength = <14>;
  339. input-enable;
  340. input-schmitt-enable;
  341. slew-rate = <0>;
  342. };
  343. tx-pins {
  344. pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
  345. GPO_ENABLE, GPI_NONE)>;
  346. bias-disable;
  347. drive-strength = <35>;
  348. input-disable;
  349. input-schmitt-disable;
  350. slew-rate = <0>;
  351. };
  352. };
  353. dvpsensor_pins: dvp0 {
  354. signal-pins {
  355. pins = <PAD_FUNC_SHARE(98)>,
  356. <PAD_FUNC_SHARE(99)>,
  357. <PAD_FUNC_SHARE(100)>,
  358. <PAD_FUNC_SHARE(101)>,
  359. <PAD_FUNC_SHARE(102)>,
  360. <PAD_FUNC_SHARE(103)>,
  361. <PAD_FUNC_SHARE(104)>,
  362. <PAD_FUNC_SHARE(105)>,
  363. <PAD_FUNC_SHARE(106)>,
  364. <PAD_FUNC_SHARE(107)>,
  365. <PAD_FUNC_SHARE(108)>,
  366. <PAD_FUNC_SHARE(109)>,
  367. <PAD_FUNC_SHARE(110)>,
  368. <PAD_FUNC_SHARE(111)>,
  369. <PAD_FUNC_SHARE(112)>,
  370. <PAD_FUNC_SHARE(113)>,
  371. <PAD_FUNC_SHARE(114)>;
  372. input-enable;
  373. };
  374. };
  375. sensor0_default: sensor0 {
  376. reset-pins {
  377. pinmux = <GPIOMUX(58, GPO_LOW,
  378. GPO_ENABLE, GPI_NONE)>;
  379. bias-disable;
  380. drive-strength = <35>;
  381. input-disable;
  382. input-schmitt-disable;
  383. slew-rate = <0>;
  384. };
  385. };
  386. sensor0_reset_low: sensor0 {
  387. reset-pins {
  388. pinmux = <GPIOMUX(58, GPO_LOW,
  389. GPO_ENABLE, GPI_NONE)>;
  390. bias-disable;
  391. drive-strength = <35>;
  392. input-disable;
  393. input-schmitt-disable;
  394. slew-rate = <0>;
  395. };
  396. };
  397. sensor0_reset_high: sensor0 {
  398. reset-pins {
  399. pinmux = <GPIOMUX(58, GPO_HIGH,
  400. GPO_ENABLE, GPI_NONE)>;
  401. bias-disable;
  402. drive-strength = <35>;
  403. input-disable;
  404. input-schmitt-disable;
  405. slew-rate = <0>;
  406. };
  407. };
  408. sensor1_default: sensor1 {
  409. reset-pins {
  410. pinmux = <GPIOMUX(57, GPO_LOW,
  411. GPO_ENABLE, GPI_NONE)>;
  412. bias-disable;
  413. drive-strength = <35>;
  414. input-disable;
  415. input-schmitt-disable;
  416. slew-rate = <0>;
  417. };
  418. };
  419. sensor1_reset_low: sensor1 {
  420. reset-pins {
  421. pinmux = <GPIOMUX(57, GPO_LOW,
  422. GPO_ENABLE, GPI_NONE)>;
  423. bias-disable;
  424. drive-strength = <35>;
  425. input-disable;
  426. input-schmitt-disable;
  427. slew-rate = <0>;
  428. };
  429. };
  430. sensor1_reset_high: sensor1 {
  431. reset-pins {
  432. pinmux = <GPIOMUX(57, GPO_HIGH,
  433. GPO_ENABLE, GPI_NONE)>;
  434. bias-disable;
  435. drive-strength = <35>;
  436. input-disable;
  437. input-schmitt-disable;
  438. slew-rate = <0>;
  439. };
  440. };
  441. pwmdac_pins: pwmdac_0 {
  442. pwmdac_pins {
  443. pinmux = <GPIOMUX(23, GPO_PWMDAC_LEFT_OUT,
  444. GPO_ENABLE, GPI_NONE)>,
  445. <GPIOMUX(24, GPO_PWMDAC_RIGHT_OUT,
  446. GPO_ENABLE, GPI_NONE)>;
  447. bias-disable;
  448. drive-strength = <35>;
  449. input-disable;
  450. input-schmitt-disable;
  451. slew-rate = <0>;
  452. };
  453. };
  454. };
  455. &i2c0 {
  456. clock-frequency = <100000>;
  457. i2c-sda-hold-time-ns = <300>;
  458. i2c-sda-falling-time-ns = <500>;
  459. i2c-scl-falling-time-ns = <500>;
  460. pinctrl-names = "default";
  461. pinctrl-0 = <&i2c0_pins>;
  462. status = "okay";
  463. imx219@10 {
  464. compatible = "imx219";
  465. reg = <0x10>;
  466. clocks = <&clk_ext_camera>;
  467. clock-names = "xclk";
  468. // powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
  469. // reset-gpio = <&gpio 58 GPIO_ACTIVE_HIGH>;
  470. pinctrl-names = "default", "reset_low", "reset_high";
  471. pinctrl-0 = <&sensor0_default>;
  472. pinctrl-1 = <&sensor0_reset_low>;
  473. pinctrl-2 = <&sensor0_reset_high>;
  474. //DOVDD-supply = <&v2v8>;
  475. rotation = <0>;
  476. port {
  477. /* CSI2 bus endpoint */
  478. imx219_to_csi2rx0: endpoint {
  479. remote-endpoint = <&csi2rx0_from_imx219>;
  480. bus-type = <4>; /* MIPI CSI-2 D-PHY */
  481. clock-lanes = <0>;
  482. data-lanes = <1 2>;
  483. link-frequencies = /bits/ 64 <456000000>;
  484. };
  485. };
  486. };
  487. pmic@5e {
  488. compatible = "ti,tps65086";
  489. reg = <0x5e>;
  490. gpio-controller;
  491. #gpio-cells = <2>;
  492. regulators {
  493. };
  494. };
  495. tda998x@70 {
  496. compatible = "nxp,tda998x";
  497. reg = <0x70>;
  498. port {
  499. tda998x_0_input: endpoint {
  500. remote-endpoint = <&hdmi_out>;
  501. };
  502. };
  503. };
  504. };
  505. &i2c1 {
  506. clock-frequency = <400000>;
  507. i2c-sda-hold-time-ns = <300>;
  508. i2c-sda-falling-time-ns = <100>;
  509. i2c-scl-falling-time-ns = <100>;
  510. pinctrl-names = "default";
  511. pinctrl-0 = <&i2c1_pins>;
  512. status = "okay";
  513. ac108_a: ac108@3b {
  514. compatible = "x-power,ac108_0";
  515. reg = <0x3b>;
  516. #sound-dai-cells = <0>;
  517. data-protocol = <0>;
  518. };
  519. wm8960: codec@1a {
  520. compatible = "wlf,wm8960";
  521. reg = <0x1a>;
  522. #sound-dai-cells = <0>;
  523. wlf,shared-lrclk;
  524. };
  525. seeed_plane_i2c@45 {
  526. compatible = "seeed_panel";
  527. reg = <0x45>;
  528. };
  529. /* TODO: ov5640 and sc2235 used on EVB board, not support on starlight board, remove it here?*/
  530. ov5640: ov5640@3c {
  531. compatible = "ovti,ov5640";
  532. reg = <0x3c>;
  533. clocks = <&clk_ext_camera>;
  534. clock-names = "xclk";
  535. powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
  536. reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
  537. //DOVDD-supply = <&v2v8>;
  538. rotation = <180>;
  539. port {
  540. // Parallel bus endpoint
  541. ov5640_to_parallel: endpoint {
  542. remote-endpoint = <&parallel_from_ov5640>;
  543. bus-type = <5>; // Parallel
  544. bus-width = <8>;
  545. data-shift = <2>; // lines 9:2 are used
  546. hsync-active = <0>;
  547. vsync-active = <1>;
  548. pclk-sample = <1>;
  549. };
  550. };
  551. };
  552. sc2235@30 {
  553. compatible = "sc2235";
  554. reg = <0x30>;
  555. clocks = <&clk_ext_camera>;
  556. clock-names = "xclk";
  557. powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
  558. reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
  559. //DOVDD-supply = <&v2v8>;
  560. port {
  561. // Parallel bus endpoint
  562. sc2235_to_parallel: endpoint {
  563. remote-endpoint = <&parallel_from_sc2235>;
  564. bus-type = <5>; // Parallel
  565. bus-width = <8>;
  566. data-shift = <2>; // lines 13:6 are used
  567. hsync-active = <1>;
  568. vsync-active = <1>;
  569. pclk-sample = <1>;
  570. };
  571. };
  572. };
  573. };
  574. &i2c2 {
  575. clock-frequency = <100000>;
  576. i2c-sda-hold-time-ns = <300>;
  577. i2c-sda-falling-time-ns = <500>;
  578. i2c-scl-falling-time-ns = <500>;
  579. pinctrl-names = "default";
  580. pinctrl-0 = <&i2c2_pins>;
  581. status = "okay";
  582. seeed_plane_i2c@45 {
  583. compatible = "seeed_panel";
  584. reg = <0x45>;
  585. port {
  586. panel_dsi_port: endpoint {
  587. remote-endpoint = <&dsi_out_port>;
  588. };
  589. };
  590. };
  591. imx219sub@10 {
  592. compatible = "imx219";
  593. reg = <0x10>;
  594. clocks = <&clk_ext_camera>;
  595. clock-names = "xclk";
  596. // powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
  597. // reset-gpio = <&gpio 57 GPIO_ACTIVE_HIGH>;
  598. pinctrl-names = "default", "reset_low", "reset_high";
  599. pinctrl-0 = <&sensor1_default>;
  600. pinctrl-1 = <&sensor1_reset_low>;
  601. pinctrl-2 = <&sensor1_reset_high>;
  602. //DOVDD-supply = <&v2v8>;
  603. rotation = <0>;
  604. port {
  605. /* CSI2 bus endpoint */
  606. imx219_to_csi2rx1: endpoint {
  607. remote-endpoint = <&csi2rx1_from_imx219>;
  608. bus-type = <4>; /* MIPI CSI-2 D-PHY */
  609. clock-lanes = <0>;
  610. data-lanes = <1 2>;
  611. link-frequencies = /bits/ 64 <456000000>;
  612. };
  613. };
  614. };
  615. };
  616. &osc_sys {
  617. clock-frequency = <25000000>;
  618. };
  619. &osc_aud {
  620. clock-frequency = <27000000>;
  621. };
  622. &ptc {
  623. pinctrl-names = "default";
  624. pinctrl-0 = <&pwm_pins>;
  625. status = "okay";
  626. };
  627. &qspi {
  628. nor_flash: nor-flash@0 {
  629. compatible = "spi-flash";
  630. reg = <0>;
  631. spi-max-frequency = <31250000>;
  632. page-size = <256>;
  633. block-size = <16>;
  634. cdns,read-delay = <4>;
  635. cdns,tshsl-ns = <1>;
  636. cdns,tsd2d-ns = <1>;
  637. cdns,tchsh-ns = <1>;
  638. cdns,tslch-ns = <1>;
  639. spi-tx-bus-width = <1>;
  640. spi-rx-bus-width = <1>;
  641. };
  642. nand_flash: nand-flash@1 {
  643. compatible = "spi-flash-nand";
  644. reg = <1>;
  645. spi-max-frequency = <31250000>;
  646. page-size = <2048>;
  647. block-size = <17>;
  648. cdns,read-delay = <4>;
  649. cdns,tshsl-ns = <1>;
  650. cdns,tsd2d-ns = <1>;
  651. cdns,tchsh-ns = <1>;
  652. cdns,tslch-ns = <1>;
  653. spi-tx-bus-width = <1>;
  654. spi-rx-bus-width = <1>;
  655. };
  656. };
  657. &sdio0 {
  658. broken-cd;
  659. bus-width = <4>;
  660. cap-sd-highspeed;
  661. pinctrl-names = "default";
  662. pinctrl-0 = <&sdio0_pins>;
  663. status = "okay";
  664. };
  665. &sdio1 {
  666. #address-cells = <1>;
  667. #size-cells = <0>;
  668. bus-width = <4>;
  669. cap-sd-highspeed;
  670. cap-sdio-irq;
  671. cap-power-off-card;
  672. max-frequency = <10000000>;
  673. mmc-pwrseq = <&wifi_pwrseq>;
  674. non-removable;
  675. pinctrl-names = "default";
  676. pinctrl-0 = <&sdio1_pins>;
  677. status = "okay";
  678. wifi@1 {
  679. compatible = "brcm,bcm4329-fmac";
  680. reg = <1>;
  681. };
  682. };
  683. &sfivefb {
  684. status = "okay";
  685. pp1 {
  686. pp-id = <1>;
  687. fifo-out;
  688. src-format = <COLOR_YUV420_NV21>;
  689. src-width = <1920>;
  690. src-height = <1080>;
  691. dst-format = <COLOR_RGB888_ARGB>;
  692. dst-width = <1920>;
  693. dst-height = <1080>;
  694. };
  695. tda_998x_1080p {
  696. compatible = "starfive,display-dev";
  697. panel_name = "tda_998x_1080p";
  698. panel_lcd_id = <22>; /* 1080p */
  699. interface_info = "rgb_interface";
  700. refresh_en = <1>;
  701. bits-per-pixel = <16>;
  702. physical-width = <62>;
  703. physical-height = <114>;
  704. panel-width = <1920>;
  705. panel-height = <1080>;
  706. pixel-clock = <78000000>;
  707. /*dyn_fps;*/ /*dynamic frame rate support*/
  708. /*.flags = PREFER_CMD_SEND_MONOLITHIC | CE_CMD_SEND_MONOLITHIC | RESUME_WITH_PREFER | RESUME_WITH_CE*/
  709. /*gamma-command-monolithic;*/
  710. /*ce-command-monolithic;*/
  711. /*resume-with-gamma;*/
  712. /*resume-with-ce;*/
  713. /*mipi info*/
  714. mipi-byte-clock = <78000>;
  715. mipi-escape-clock = <13000>;
  716. lane-no = <4>;
  717. display_mode = "video_mode"; /*video_mode, command_mode*/
  718. /*
  719. auto_stop_clklane_en;
  720. im_pin_val;*/
  721. color_bits = <COLOR_CODE_24BIT>;
  722. /*is_18bit_loosely;*/
  723. /*video mode info*/
  724. h-pulse-width = <44>;
  725. h-back-porch = <148>;
  726. h-front-porch = <88>;
  727. v-pulse-width = <5>;
  728. v-back-porch = <36>;
  729. v-front-porch = <4>;
  730. status = "okay";
  731. sync_pol = "vsync_high_act"; /*vsync_high_act, hsync_high_act*/
  732. lp_cmd_en;
  733. /*lp_hfp_en;*/
  734. /*lp_hbp_en;*/
  735. /*lp_vact_en;*/
  736. lp_vfp_en;
  737. lp_vbp_en;
  738. lp_vsa_en;
  739. traffic-mode = "burst_with_sync_pulses"; /*non_burst_with_sync_pulses, non_burst_with_sync_events*/
  740. /*phy info*/
  741. data_tprepare = /bits/ 8 <0>;
  742. data_hs_zero = /bits/ 8 <0>;
  743. data_hs_exit = /bits/ 8 <0>;
  744. data_hs_trail = /bits/ 8 <0>;
  745. /*te info*/
  746. te_source = "external_pin"; /*external_pin, dsi_te_trigger*/
  747. te_trigger_mode = "rising_edge"; /*rising_edge, high_1000us*/
  748. te_enable = <0>;
  749. cm_te_effect_sync_enable = <0>; /*used in command mode*/
  750. te_count_per_sec = <64>; /*used in esd*/
  751. /*ext info*/
  752. /*
  753. crc_rx_en;
  754. ecc_rx_en;
  755. eotp_rx_en;
  756. */
  757. eotp_tx_en;
  758. dev_read_time = <0x7fff>;
  759. /*type cmd return_count return_code*/
  760. /*id_read_cmd_info = [];*/
  761. /*pre_id_cmd = [];*/
  762. /*esd_read_cmd_info = [DCS_CMD 0A 01 9C];*/
  763. /*pre_esd_cmd = [];*/
  764. /*panel-on-command = [];*/
  765. /*panel-off-command = [];*/
  766. /*reset-sequence = <1 5>, <0 10>, <1 30>;*/
  767. /*
  768. panel-gamma-warm-command = [
  769. ];
  770. panel-gamma-nature-command = [
  771. ];
  772. panel-gamma-cool-command = [
  773. ];
  774. panel-ce-std-command = [
  775. ];
  776. panel-ce-vivid-command = [
  777. ];
  778. */
  779. };
  780. seeed_5_inch {
  781. compatible = "starfive,display-dev";
  782. panel_name = "seeed_5_inch";
  783. panel_lcd_id = <22>; /* 480p */
  784. interface_info = "mipi_interface";
  785. refresh_en = <1>;
  786. bits-per-pixel = <24>;
  787. physical-width = <62>;
  788. physical-height = <114>;
  789. panel-width = <800>;
  790. panel-height = <480>;
  791. pixel-clock = <27500000>;
  792. /*dyn_fps;*/ /*dynamic frame rate support*/
  793. fps = <50>;
  794. /*.flags = PREFER_CMD_SEND_MONOLITHIC | CE_CMD_SEND_MONOLITHIC | RESUME_WITH_PREFER | RESUME_WITH_CE*/
  795. /*gamma-command-monolithic;*/
  796. /*ce-command-monolithic;*/
  797. /*resume-with-gamma;*/
  798. /*resume-with-ce;*/
  799. /*mipi info*/
  800. mipi-byte-clock = <78000>;
  801. mipi-escape-clock = <13000>;
  802. lane-no = <1>;
  803. display_mode = "video_mode"; /*video_mode, command_mode*/
  804. /*
  805. auto_stop_clklane_en;
  806. im_pin_val;
  807. */
  808. color_bits = <COLOR_CODE_24BIT>;
  809. /*is_18bit_loosely;*/
  810. /*video mode info*/
  811. h-pulse-width = <10>;
  812. h-back-porch = <20>;
  813. h-front-porch = <50>;
  814. v-pulse-width = <5>;
  815. v-back-porch = <5>;
  816. v-front-porch = <135>;
  817. /*seeed panel mode info*/
  818. dphy_bps = <700000000>;
  819. dsi_burst_mode = <0>;
  820. dsi_sync_pulse = <1>;
  821. // bytes
  822. dsi_hsa = <30>;
  823. dsi_hbp = <211>;
  824. dsi_hfp = <159>;
  825. // lines
  826. dsi_vsa = <5>;
  827. dsi_vbp = <5>;
  828. dsi_vfp = <134>;
  829. status = "okay";
  830. sync_pol = "vsync_high_act"; /*vsync_high_act, hsync_high_act*/
  831. lp_cmd_en;
  832. /*lp_hfp_en;*/
  833. /*lp_hbp_en;*/
  834. /*lp_vact_en;*/
  835. lp_vfp_en;
  836. lp_vbp_en;
  837. lp_vsa_en;
  838. traffic-mode = "burst_with_sync_pulses"; /*non_burst_with_sync_pulses, non_burst_with_sync_events*/
  839. /*phy info*/
  840. data_tprepare = /bits/ 8 <0>;
  841. data_hs_zero = /bits/ 8 <0>;
  842. data_hs_exit = /bits/ 8 <0>;
  843. data_hs_trail = /bits/ 8 <0>;
  844. /*te info*/
  845. te_source = "external_pin"; /*external_pin, dsi_te_trigger*/
  846. te_trigger_mode = "rising_edge"; /*rising_edge, high_1000us*/
  847. te_enable = <0>;
  848. cm_te_effect_sync_enable = <0>; /*used in command mode*/
  849. te_count_per_sec = <64>; /*used in esd*/
  850. /*ext info*/
  851. /*
  852. crc_rx_en;
  853. ecc_rx_en;
  854. eotp_rx_en;
  855. */
  856. eotp_tx_en;
  857. dev_read_time = <0x7fff>;
  858. /*type cmd return_count return_code*/
  859. /*id_read_cmd_info = [];*/
  860. /*pre_id_cmd = [];*/
  861. /*esd_read_cmd_info = [DCS_CMD 0A 01 9C];*/
  862. /*pre_esd_cmd = [];*/
  863. /*panel-on-command = [];*/
  864. /*panel-off-command = [];*/
  865. /*reset-sequence = <1 5>, <0 10>, <1 30>;*/
  866. /*
  867. panel-gamma-warm-command = [
  868. ];
  869. panel-gamma-nature-command = [
  870. ];
  871. panel-gamma-cool-command = [
  872. ];
  873. panel-ce-std-command = [
  874. ];
  875. panel-ce-vivid-command = [
  876. ];
  877. */
  878. };
  879. };
  880. &spi2 {
  881. pinctrl-names = "default";
  882. pinctrl-0 = <&spi2_pins>;
  883. status = "okay";
  884. spi_dev0: spi@0 {
  885. compatible = "rohm,dh2228fv";
  886. spi-max-frequency = <10000000>;
  887. reg = <0>;
  888. };
  889. };
  890. &uart0 {
  891. pinctrl-names = "default";
  892. pinctrl-0 = <&uart0_pins>;
  893. status = "okay";
  894. };
  895. &uart3 {
  896. pinctrl-names = "default";
  897. pinctrl-0 = <&uart3_pins>;
  898. status = "okay";
  899. };
  900. &usb3 {
  901. dr_mode = "host";
  902. status = "okay";
  903. };
  904. &pwmdac {
  905. pinctrl-names = "default";
  906. pinctrl-0 = <&pwmdac_pins>;
  907. status = "okay";
  908. };
  909. /* #include "codecs/sf_pdm.dtsi" */
  910. /* #include "codecs/sf_spdif.dtsi" */
  911. /* #include "codecs/sf_ac108.dtsi" */
  912. /* #include "codecs/sf_wm8960.dtsi" */
  913. /* #include "codecs/sf_vad.dtsi" */