jh7100-beaglev-starlight.dts 21 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /* Copyright (c) 2021 StarFive Technology Co., Ltd. */
  3. /dts-v1/;
  4. #include "jh7100.dtsi"
  5. #include <dt-bindings/gpio/gpio.h>
  6. #include <dt-bindings/leds/common.h>
  7. #include <dt-bindings/pinctrl/pinctrl-starfive.h>
  8. #include <dt-bindings/starfive_fb.h>
  9. / {
  10. model = "BeagleV Starlight Beta";
  11. compatible = "beagle,beaglev-starlight-jh7100", "starfive,jh7100";
  12. aliases {
  13. mshc0 = &sdio0;
  14. mshc1 = &sdio1;
  15. serial0 = &uart3;
  16. serial1 = &uart0;
  17. };
  18. chosen {
  19. stdout-path = "serial0:115200n8";
  20. };
  21. cpus {
  22. timebase-frequency = <6250000>;
  23. };
  24. memory@80000000 {
  25. device_type = "memory";
  26. reg = <0x0 0x80000000 0x2 0x0>;
  27. };
  28. leds {
  29. compatible = "gpio-leds";
  30. led-ack {
  31. gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
  32. color = <LED_COLOR_ID_GREEN>;
  33. function = LED_FUNCTION_HEARTBEAT;
  34. linux,default-trigger = "heartbeat";
  35. label = "ack";
  36. };
  37. };
  38. reserved-memory {
  39. #address-cells = <2>;
  40. #size-cells = <2>;
  41. ranges;
  42. linux,cma {
  43. compatible = "shared-dma-pool";
  44. reusable;
  45. size = <0x0 0x28000000>;
  46. alignment = <0x0 0x1000>;
  47. alloc-ranges = <0x0 0xa0000000 0x0 0x28000000>;
  48. linux,cma-default;
  49. };
  50. jpu_reserved: framebuffer@c9000000 {
  51. reg = <0x0 0xc9000000 0x0 0x4000000>;
  52. };
  53. nvdla_reserved: framebuffer@d0000000 {
  54. no-map;
  55. reg = <0x0 0xd0000000 0x0 0x28000000>;
  56. };
  57. vin_reserved: framebuffer@f9000000 {
  58. compatible = "shared-dma-pool";
  59. no-map;
  60. reg = <0x0 0xf9000000 0x0 0x1000000>;
  61. };
  62. sffb_reserved: framebuffer@fb000000 {
  63. compatible = "shared-dma-pool";
  64. no-map;
  65. reg = <0x0 0xfb000000 0x0 0x2000000>;
  66. };
  67. };
  68. wifi_pwrseq: wifi-pwrseq {
  69. compatible = "mmc-pwrseq-simple";
  70. reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
  71. };
  72. };
  73. &gmac {
  74. snps,reset-gpios = <&gpio 63 GPIO_ACTIVE_LOW>;
  75. pinctrl-names = "default";
  76. pinctrl-0 = <&gmac_pins>;
  77. };
  78. &gpio {
  79. /* don't reset gpio mux for serial console on uart3 */
  80. starfive,keep-gpiomux = <13 14>;
  81. gmac_pins: gmac-0 {
  82. gtxclk-pins {
  83. pins = <PAD_FUNC_SHARE(115)>;
  84. bias-pull-up;
  85. drive-strength = <35>;
  86. input-enable;
  87. input-schmitt-enable;
  88. slew-rate = <0>;
  89. };
  90. miitxclk-pins {
  91. pins = <PAD_FUNC_SHARE(116)>;
  92. bias-pull-up;
  93. drive-strength = <14>;
  94. input-enable;
  95. input-schmitt-disable;
  96. slew-rate = <0>;
  97. };
  98. tx-pins {
  99. pins = <PAD_FUNC_SHARE(117)>,
  100. <PAD_FUNC_SHARE(119)>,
  101. <PAD_FUNC_SHARE(120)>,
  102. <PAD_FUNC_SHARE(121)>,
  103. <PAD_FUNC_SHARE(122)>,
  104. <PAD_FUNC_SHARE(123)>,
  105. <PAD_FUNC_SHARE(124)>,
  106. <PAD_FUNC_SHARE(125)>,
  107. <PAD_FUNC_SHARE(126)>;
  108. bias-pull-up;
  109. drive-strength = <35>;
  110. input-disable;
  111. input-schmitt-disable;
  112. slew-rate = <0>;
  113. };
  114. rxclk-pins {
  115. pins = <PAD_FUNC_SHARE(127)>;
  116. bias-pull-up;
  117. drive-strength = <14>;
  118. input-enable;
  119. input-schmitt-disable;
  120. slew-rate = <6>;
  121. };
  122. rxer-pins {
  123. pins = <PAD_FUNC_SHARE(129)>;
  124. bias-pull-up;
  125. drive-strength = <14>;
  126. input-enable;
  127. input-schmitt-disable;
  128. slew-rate = <0>;
  129. };
  130. rx-pins {
  131. pins = <PAD_FUNC_SHARE(128)>,
  132. <PAD_FUNC_SHARE(130)>,
  133. <PAD_FUNC_SHARE(131)>,
  134. <PAD_FUNC_SHARE(132)>,
  135. <PAD_FUNC_SHARE(133)>,
  136. <PAD_FUNC_SHARE(134)>,
  137. <PAD_FUNC_SHARE(135)>,
  138. <PAD_FUNC_SHARE(136)>,
  139. <PAD_FUNC_SHARE(137)>,
  140. <PAD_FUNC_SHARE(138)>,
  141. <PAD_FUNC_SHARE(139)>,
  142. <PAD_FUNC_SHARE(140)>,
  143. <PAD_FUNC_SHARE(141)>;
  144. bias-pull-up;
  145. drive-strength = <14>;
  146. input-enable;
  147. input-schmitt-enable;
  148. slew-rate = <0>;
  149. };
  150. };
  151. i2c0_pins: i2c0-0 {
  152. i2c-pins {
  153. pinmux = <GPIOMUX(62, GPO_LOW,
  154. GPO_I2C0_PAD_SCK_OEN,
  155. GPI_I2C0_PAD_SCK_IN)>,
  156. <GPIOMUX(61, GPO_LOW,
  157. GPO_I2C0_PAD_SDA_OEN,
  158. GPI_I2C0_PAD_SDA_IN)>;
  159. bias-disable; /* external pull-up */
  160. input-enable;
  161. input-schmitt-enable;
  162. };
  163. };
  164. i2c1_pins: i2c1-0 {
  165. i2c-pins {
  166. pinmux = <GPIOMUX(47, GPO_LOW,
  167. GPO_I2C1_PAD_SCK_OEN,
  168. GPI_I2C1_PAD_SCK_IN)>,
  169. <GPIOMUX(48, GPO_LOW,
  170. GPO_I2C1_PAD_SDA_OEN,
  171. GPI_I2C1_PAD_SDA_IN)>;
  172. bias-pull-up;
  173. input-enable;
  174. input-schmitt-enable;
  175. };
  176. };
  177. i2c2_pins: i2c2-0 {
  178. i2c-pins {
  179. pinmux = <GPIOMUX(60, GPO_LOW,
  180. GPO_I2C2_PAD_SCK_OEN,
  181. GPI_I2C2_PAD_SCK_IN)>,
  182. <GPIOMUX(59, GPO_LOW,
  183. GPO_I2C2_PAD_SDA_OEN,
  184. GPI_I2C2_PAD_SDA_IN)>;
  185. bias-disable; /* external pull-up */
  186. input-enable;
  187. input-schmitt-enable;
  188. };
  189. };
  190. pwm_pins: pwm-0 {
  191. pwm-pins {
  192. pinmux = <GPIOMUX(7,
  193. GPO_PWM_PAD_OUT_BIT0,
  194. GPO_PWM_PAD_OE_N_BIT0,
  195. GPI_NONE)>,
  196. <GPIOMUX(5,
  197. GPO_PWM_PAD_OUT_BIT1,
  198. GPO_PWM_PAD_OE_N_BIT1,
  199. GPI_NONE)>,
  200. <GPIOMUX(45,
  201. GPO_PWM_PAD_OUT_BIT2,
  202. GPO_PWM_PAD_OE_N_BIT2,
  203. GPI_NONE)>;
  204. bias-disable;
  205. drive-strength = <35>;
  206. input-disable;
  207. input-schmitt-disable;
  208. slew-rate = <0>;
  209. };
  210. };
  211. sdio0_pins: sdio0-0 {
  212. clk-pins {
  213. pinmux = <GPIOMUX(54, GPO_SDIO0_PAD_CCLK_OUT,
  214. GPO_ENABLE, GPI_NONE)>;
  215. bias-disable;
  216. input-disable;
  217. input-schmitt-disable;
  218. };
  219. sdio-pins {
  220. pinmux = <GPIOMUX(55, GPO_LOW, GPO_DISABLE,
  221. GPI_SDIO0_PAD_CARD_DETECT_N)>,
  222. <GPIOMUX(53,
  223. GPO_SDIO0_PAD_CCMD_OUT,
  224. GPO_SDIO0_PAD_CCMD_OEN,
  225. GPI_SDIO0_PAD_CCMD_IN)>,
  226. <GPIOMUX(49,
  227. GPO_SDIO0_PAD_CDATA_OUT_BIT0,
  228. GPO_SDIO0_PAD_CDATA_OEN_BIT0,
  229. GPI_SDIO0_PAD_CDATA_IN_BIT0)>,
  230. <GPIOMUX(50,
  231. GPO_SDIO0_PAD_CDATA_OUT_BIT1,
  232. GPO_SDIO0_PAD_CDATA_OEN_BIT1,
  233. GPI_SDIO0_PAD_CDATA_IN_BIT1)>,
  234. <GPIOMUX(51,
  235. GPO_SDIO0_PAD_CDATA_OUT_BIT2,
  236. GPO_SDIO0_PAD_CDATA_OEN_BIT2,
  237. GPI_SDIO0_PAD_CDATA_IN_BIT2)>,
  238. <GPIOMUX(52,
  239. GPO_SDIO0_PAD_CDATA_OUT_BIT3,
  240. GPO_SDIO0_PAD_CDATA_OEN_BIT3,
  241. GPI_SDIO0_PAD_CDATA_IN_BIT3)>;
  242. bias-pull-up;
  243. input-enable;
  244. input-schmitt-enable;
  245. };
  246. };
  247. sdio1_pins: sdio1-0 {
  248. clk-pins {
  249. pinmux = <GPIOMUX(33, GPO_SDIO1_PAD_CCLK_OUT,
  250. GPO_ENABLE, GPI_NONE)>;
  251. bias-disable;
  252. input-disable;
  253. input-schmitt-disable;
  254. };
  255. sdio-pins {
  256. pinmux = <GPIOMUX(29,
  257. GPO_SDIO1_PAD_CCMD_OUT,
  258. GPO_SDIO1_PAD_CCMD_OEN,
  259. GPI_SDIO1_PAD_CCMD_IN)>,
  260. <GPIOMUX(36,
  261. GPO_SDIO1_PAD_CDATA_OUT_BIT0,
  262. GPO_SDIO1_PAD_CDATA_OEN_BIT0,
  263. GPI_SDIO1_PAD_CDATA_IN_BIT0)>,
  264. <GPIOMUX(30,
  265. GPO_SDIO1_PAD_CDATA_OUT_BIT1,
  266. GPO_SDIO1_PAD_CDATA_OEN_BIT1,
  267. GPI_SDIO1_PAD_CDATA_IN_BIT1)>,
  268. <GPIOMUX(34,
  269. GPO_SDIO1_PAD_CDATA_OUT_BIT2,
  270. GPO_SDIO1_PAD_CDATA_OEN_BIT2,
  271. GPI_SDIO1_PAD_CDATA_IN_BIT2)>,
  272. <GPIOMUX(31,
  273. GPO_SDIO1_PAD_CDATA_OUT_BIT3,
  274. GPO_SDIO1_PAD_CDATA_OEN_BIT3,
  275. GPI_SDIO1_PAD_CDATA_IN_BIT3)>;
  276. bias-pull-up;
  277. input-enable;
  278. input-schmitt-enable;
  279. };
  280. };
  281. spi2_pins: spi2-0 {
  282. mosi-pin {
  283. pinmux = <GPIOMUX(18, GPO_SPI2_PAD_TXD,
  284. GPO_ENABLE, GPI_NONE)>;
  285. bias-disable;
  286. input-disable;
  287. input-schmitt-disable;
  288. };
  289. miso-pin {
  290. pinmux = <GPIOMUX(16, GPO_LOW, GPO_DISABLE,
  291. GPI_SPI2_PAD_RXD)>;
  292. bias-pull-up;
  293. input-enable;
  294. input-schmitt-enable;
  295. };
  296. sck-pin {
  297. pinmux = <GPIOMUX(12, GPO_SPI2_PAD_SCK_OUT,
  298. GPO_ENABLE, GPI_NONE)>;
  299. bias-disable;
  300. input-disable;
  301. input-schmitt-disable;
  302. };
  303. ss-pins {
  304. pinmux = <GPIOMUX(15, GPO_SPI2_PAD_SS_0_N,
  305. GPO_ENABLE, GPI_NONE)>,
  306. <GPIOMUX(11, GPO_SPI2_PAD_SS_1_N,
  307. GPO_ENABLE, GPI_NONE)>;
  308. bias-disable;
  309. input-disable;
  310. input-schmitt-disable;
  311. };
  312. };
  313. uart0_pins: uart0-0 {
  314. rx-pins {
  315. pinmux = <GPIOMUX(40, GPO_LOW, GPO_DISABLE,
  316. GPI_UART0_PAD_SIN)>,
  317. <GPIOMUX(39, GPO_LOW, GPO_DISABLE,
  318. GPI_UART0_PAD_CTSN)>;
  319. bias-pull-up;
  320. input-enable;
  321. input-schmitt-enable;
  322. };
  323. tx-pins {
  324. pinmux = <GPIOMUX(41, GPO_UART0_PAD_SOUT,
  325. GPO_ENABLE, GPI_NONE)>,
  326. <GPIOMUX(42, GPO_UART0_PAD_RTSN,
  327. GPO_ENABLE, GPI_NONE)>;
  328. bias-disable;
  329. input-disable;
  330. input-schmitt-disable;
  331. };
  332. };
  333. uart3_pins: uart3-0 {
  334. rx-pins {
  335. pinmux = <GPIOMUX(13, GPO_LOW, GPO_DISABLE,
  336. GPI_UART3_PAD_SIN)>;
  337. bias-pull-up;
  338. drive-strength = <14>;
  339. input-enable;
  340. input-schmitt-enable;
  341. slew-rate = <0>;
  342. };
  343. tx-pins {
  344. pinmux = <GPIOMUX(14, GPO_UART3_PAD_SOUT,
  345. GPO_ENABLE, GPI_NONE)>;
  346. bias-disable;
  347. drive-strength = <35>;
  348. input-disable;
  349. input-schmitt-disable;
  350. slew-rate = <0>;
  351. };
  352. };
  353. dvpsensor_pins: dvp0 {
  354. signal-pins {
  355. pins = <PAD_FUNC_SHARE(98)>,
  356. <PAD_FUNC_SHARE(99)>,
  357. <PAD_FUNC_SHARE(100)>,
  358. <PAD_FUNC_SHARE(101)>,
  359. <PAD_FUNC_SHARE(102)>,
  360. <PAD_FUNC_SHARE(103)>,
  361. <PAD_FUNC_SHARE(104)>,
  362. <PAD_FUNC_SHARE(105)>,
  363. <PAD_FUNC_SHARE(106)>,
  364. <PAD_FUNC_SHARE(107)>,
  365. <PAD_FUNC_SHARE(108)>,
  366. <PAD_FUNC_SHARE(109)>,
  367. <PAD_FUNC_SHARE(110)>,
  368. <PAD_FUNC_SHARE(111)>,
  369. <PAD_FUNC_SHARE(112)>,
  370. <PAD_FUNC_SHARE(113)>,
  371. <PAD_FUNC_SHARE(114)>;
  372. input-enable;
  373. };
  374. };
  375. sensor0_default: sensor0 {
  376. reset-pins {
  377. pinmux = <GPIOMUX(58, GPO_LOW,
  378. GPO_ENABLE, GPI_NONE)>;
  379. bias-disable;
  380. drive-strength = <35>;
  381. input-disable;
  382. input-schmitt-disable;
  383. slew-rate = <0>;
  384. };
  385. };
  386. sensor0_reset_low: sensor0 {
  387. reset-pins {
  388. pinmux = <GPIOMUX(58, GPO_LOW,
  389. GPO_ENABLE, GPI_NONE)>;
  390. bias-disable;
  391. drive-strength = <35>;
  392. input-disable;
  393. input-schmitt-disable;
  394. slew-rate = <0>;
  395. };
  396. };
  397. sensor0_reset_high: sensor0 {
  398. reset-pins {
  399. pinmux = <GPIOMUX(58, GPO_HIGH,
  400. GPO_ENABLE, GPI_NONE)>;
  401. bias-disable;
  402. drive-strength = <35>;
  403. input-disable;
  404. input-schmitt-disable;
  405. slew-rate = <0>;
  406. };
  407. };
  408. sensor1_default: sensor1 {
  409. reset-pins {
  410. pinmux = <GPIOMUX(57, GPO_LOW,
  411. GPO_ENABLE, GPI_NONE)>;
  412. bias-disable;
  413. drive-strength = <35>;
  414. input-disable;
  415. input-schmitt-disable;
  416. slew-rate = <0>;
  417. };
  418. };
  419. sensor1_reset_low: sensor1 {
  420. reset-pins {
  421. pinmux = <GPIOMUX(57, GPO_LOW,
  422. GPO_ENABLE, GPI_NONE)>;
  423. bias-disable;
  424. drive-strength = <35>;
  425. input-disable;
  426. input-schmitt-disable;
  427. slew-rate = <0>;
  428. };
  429. };
  430. sensor1_reset_high: sensor1 {
  431. reset-pins {
  432. pinmux = <GPIOMUX(57, GPO_HIGH,
  433. GPO_ENABLE, GPI_NONE)>;
  434. bias-disable;
  435. drive-strength = <35>;
  436. input-disable;
  437. input-schmitt-disable;
  438. slew-rate = <0>;
  439. };
  440. };
  441. };
  442. &i2c0 {
  443. clock-frequency = <100000>;
  444. i2c-sda-hold-time-ns = <300>;
  445. i2c-sda-falling-time-ns = <500>;
  446. i2c-scl-falling-time-ns = <500>;
  447. pinctrl-names = "default";
  448. pinctrl-0 = <&i2c0_pins>;
  449. status = "okay";
  450. imx219@10 {
  451. compatible = "imx219";
  452. reg = <0x10>;
  453. clocks = <&clk_ext_camera>;
  454. clock-names = "xclk";
  455. // powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
  456. // reset-gpio = <&gpio 58 GPIO_ACTIVE_HIGH>;
  457. pinctrl-names = "default", "reset_low", "reset_high";
  458. pinctrl-0 = <&sensor0_default>;
  459. pinctrl-1 = <&sensor0_reset_low>;
  460. pinctrl-2 = <&sensor0_reset_high>;
  461. //DOVDD-supply = <&v2v8>;
  462. rotation = <0>;
  463. port {
  464. /* CSI2 bus endpoint */
  465. imx219_to_csi2rx0: endpoint {
  466. remote-endpoint = <&csi2rx0_from_imx219>;
  467. bus-type = <4>; /* MIPI CSI-2 D-PHY */
  468. clock-lanes = <0>;
  469. data-lanes = <1 2>;
  470. link-frequencies = /bits/ 64 <456000000>;
  471. };
  472. };
  473. };
  474. pmic@5e {
  475. compatible = "ti,tps65086";
  476. reg = <0x5e>;
  477. gpio-controller;
  478. #gpio-cells = <2>;
  479. regulators {
  480. };
  481. };
  482. tda998x@70 {
  483. compatible = "nxp,tda998x";
  484. reg = <0x70>;
  485. port {
  486. tda998x_0_input: endpoint {
  487. remote-endpoint = <&hdmi_out>;
  488. };
  489. };
  490. };
  491. };
  492. &i2c1 {
  493. clock-frequency = <400000>;
  494. i2c-sda-hold-time-ns = <300>;
  495. i2c-sda-falling-time-ns = <100>;
  496. i2c-scl-falling-time-ns = <100>;
  497. pinctrl-names = "default";
  498. pinctrl-0 = <&i2c1_pins>;
  499. status = "okay";
  500. ac108_a: ac108@3b {
  501. compatible = "x-power,ac108_0";
  502. reg = <0x3b>;
  503. #sound-dai-cells = <0>;
  504. data-protocol = <0>;
  505. };
  506. wm8960: codec@1a {
  507. compatible = "wlf,wm8960";
  508. reg = <0x1a>;
  509. #sound-dai-cells = <0>;
  510. wlf,shared-lrclk;
  511. };
  512. seeed_plane_i2c@45 {
  513. compatible = "seeed_panel";
  514. reg = <0x45>;
  515. };
  516. /* TODO: ov5640 and sc2235 used on EVB board, not support on starlight board, remove it here?*/
  517. ov5640: ov5640@3c {
  518. compatible = "ovti,ov5640";
  519. reg = <0x3c>;
  520. clocks = <&clk_ext_camera>;
  521. clock-names = "xclk";
  522. powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
  523. reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
  524. //DOVDD-supply = <&v2v8>;
  525. rotation = <180>;
  526. port {
  527. // Parallel bus endpoint
  528. ov5640_to_parallel: endpoint {
  529. remote-endpoint = <&parallel_from_ov5640>;
  530. bus-type = <5>; // Parallel
  531. bus-width = <8>;
  532. data-shift = <2>; // lines 9:2 are used
  533. hsync-active = <0>;
  534. vsync-active = <1>;
  535. pclk-sample = <1>;
  536. };
  537. };
  538. };
  539. sc2235@30 {
  540. compatible = "sc2235";
  541. reg = <0x30>;
  542. clocks = <&clk_ext_camera>;
  543. clock-names = "xclk";
  544. powerdown-gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
  545. reset-gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
  546. //DOVDD-supply = <&v2v8>;
  547. port {
  548. // Parallel bus endpoint
  549. sc2235_to_parallel: endpoint {
  550. remote-endpoint = <&parallel_from_sc2235>;
  551. bus-type = <5>; // Parallel
  552. bus-width = <8>;
  553. data-shift = <2>; // lines 13:6 are used
  554. hsync-active = <1>;
  555. vsync-active = <1>;
  556. pclk-sample = <1>;
  557. };
  558. };
  559. };
  560. };
  561. &i2c2 {
  562. clock-frequency = <100000>;
  563. i2c-sda-hold-time-ns = <300>;
  564. i2c-sda-falling-time-ns = <500>;
  565. i2c-scl-falling-time-ns = <500>;
  566. pinctrl-names = "default";
  567. pinctrl-0 = <&i2c2_pins>;
  568. status = "okay";
  569. seeed_plane_i2c@45 {
  570. compatible = "seeed_panel";
  571. reg = <0x45>;
  572. port {
  573. panel_dsi_port: endpoint {
  574. remote-endpoint = <&dsi_out_port>;
  575. };
  576. };
  577. };
  578. imx219sub@10 {
  579. compatible = "imx219";
  580. reg = <0x10>;
  581. clocks = <&clk_ext_camera>;
  582. clock-names = "xclk";
  583. // powerdown-gpio = <&gpio 21 GPIO_ACTIVE_HIGH>;
  584. // reset-gpio = <&gpio 57 GPIO_ACTIVE_HIGH>;
  585. pinctrl-names = "default", "reset_low", "reset_high";
  586. pinctrl-0 = <&sensor1_default>;
  587. pinctrl-1 = <&sensor1_reset_low>;
  588. pinctrl-2 = <&sensor1_reset_high>;
  589. //DOVDD-supply = <&v2v8>;
  590. rotation = <0>;
  591. port {
  592. /* CSI2 bus endpoint */
  593. imx219_to_csi2rx1: endpoint {
  594. remote-endpoint = <&csi2rx1_from_imx219>;
  595. bus-type = <4>; /* MIPI CSI-2 D-PHY */
  596. clock-lanes = <0>;
  597. data-lanes = <1 2>;
  598. link-frequencies = /bits/ 64 <456000000>;
  599. };
  600. };
  601. };
  602. };
  603. &osc_sys {
  604. clock-frequency = <25000000>;
  605. };
  606. &osc_aud {
  607. clock-frequency = <27000000>;
  608. };
  609. &ptc {
  610. pinctrl-names = "default";
  611. pinctrl-0 = <&pwm_pins>;
  612. status = "okay";
  613. };
  614. &qspi {
  615. nor_flash: nor-flash@0 {
  616. compatible = "spi-flash";
  617. reg = <0>;
  618. spi-max-frequency = <31250000>;
  619. page-size = <256>;
  620. block-size = <16>;
  621. cdns,read-delay = <4>;
  622. cdns,tshsl-ns = <1>;
  623. cdns,tsd2d-ns = <1>;
  624. cdns,tchsh-ns = <1>;
  625. cdns,tslch-ns = <1>;
  626. spi-tx-bus-width = <1>;
  627. spi-rx-bus-width = <1>;
  628. };
  629. nand_flash: nand-flash@1 {
  630. compatible = "spi-flash-nand";
  631. reg = <1>;
  632. spi-max-frequency = <31250000>;
  633. page-size = <2048>;
  634. block-size = <17>;
  635. cdns,read-delay = <4>;
  636. cdns,tshsl-ns = <1>;
  637. cdns,tsd2d-ns = <1>;
  638. cdns,tchsh-ns = <1>;
  639. cdns,tslch-ns = <1>;
  640. spi-tx-bus-width = <1>;
  641. spi-rx-bus-width = <1>;
  642. };
  643. };
  644. &sdio0 {
  645. broken-cd;
  646. bus-width = <4>;
  647. cap-sd-highspeed;
  648. pinctrl-names = "default";
  649. pinctrl-0 = <&sdio0_pins>;
  650. status = "okay";
  651. };
  652. &sdio1 {
  653. #address-cells = <1>;
  654. #size-cells = <0>;
  655. bus-width = <4>;
  656. cap-sd-highspeed;
  657. cap-sdio-irq;
  658. cap-power-off-card;
  659. max-frequency = <10000000>;
  660. mmc-pwrseq = <&wifi_pwrseq>;
  661. non-removable;
  662. pinctrl-names = "default";
  663. pinctrl-0 = <&sdio1_pins>;
  664. status = "okay";
  665. wifi@1 {
  666. compatible = "brcm,bcm4329-fmac";
  667. reg = <1>;
  668. };
  669. };
  670. &sfivefb {
  671. status = "okay";
  672. pp1 {
  673. pp-id = <1>;
  674. fifo-out;
  675. src-format = <COLOR_YUV420_NV21>;
  676. src-width = <1920>;
  677. src-height = <1080>;
  678. dst-format = <COLOR_RGB888_ARGB>;
  679. dst-width = <1920>;
  680. dst-height = <1080>;
  681. };
  682. tda_998x_1080p {
  683. compatible = "starfive,display-dev";
  684. panel_name = "tda_998x_1080p";
  685. panel_lcd_id = <22>; /* 1080p */
  686. interface_info = "rgb_interface";
  687. refresh_en = <1>;
  688. bits-per-pixel = <16>;
  689. physical-width = <62>;
  690. physical-height = <114>;
  691. panel-width = <1920>;
  692. panel-height = <1080>;
  693. pixel-clock = <78000000>;
  694. /*dyn_fps;*/ /*dynamic frame rate support*/
  695. /*.flags = PREFER_CMD_SEND_MONOLITHIC | CE_CMD_SEND_MONOLITHIC | RESUME_WITH_PREFER | RESUME_WITH_CE*/
  696. /*gamma-command-monolithic;*/
  697. /*ce-command-monolithic;*/
  698. /*resume-with-gamma;*/
  699. /*resume-with-ce;*/
  700. /*mipi info*/
  701. mipi-byte-clock = <78000>;
  702. mipi-escape-clock = <13000>;
  703. lane-no = <4>;
  704. display_mode = "video_mode"; /*video_mode, command_mode*/
  705. /*
  706. auto_stop_clklane_en;
  707. im_pin_val;*/
  708. color_bits = <COLOR_CODE_24BIT>;
  709. /*is_18bit_loosely;*/
  710. /*video mode info*/
  711. h-pulse-width = <44>;
  712. h-back-porch = <148>;
  713. h-front-porch = <88>;
  714. v-pulse-width = <5>;
  715. v-back-porch = <36>;
  716. v-front-porch = <4>;
  717. status = "okay";
  718. sync_pol = "vsync_high_act"; /*vsync_high_act, hsync_high_act*/
  719. lp_cmd_en;
  720. /*lp_hfp_en;*/
  721. /*lp_hbp_en;*/
  722. /*lp_vact_en;*/
  723. lp_vfp_en;
  724. lp_vbp_en;
  725. lp_vsa_en;
  726. traffic-mode = "burst_with_sync_pulses"; /*non_burst_with_sync_pulses, non_burst_with_sync_events*/
  727. /*phy info*/
  728. data_tprepare = /bits/ 8 <0>;
  729. data_hs_zero = /bits/ 8 <0>;
  730. data_hs_exit = /bits/ 8 <0>;
  731. data_hs_trail = /bits/ 8 <0>;
  732. /*te info*/
  733. te_source = "external_pin"; /*external_pin, dsi_te_trigger*/
  734. te_trigger_mode = "rising_edge"; /*rising_edge, high_1000us*/
  735. te_enable = <0>;
  736. cm_te_effect_sync_enable = <0>; /*used in command mode*/
  737. te_count_per_sec = <64>; /*used in esd*/
  738. /*ext info*/
  739. /*
  740. crc_rx_en;
  741. ecc_rx_en;
  742. eotp_rx_en;
  743. */
  744. eotp_tx_en;
  745. dev_read_time = <0x7fff>;
  746. /*type cmd return_count return_code*/
  747. /*id_read_cmd_info = [];*/
  748. /*pre_id_cmd = [];*/
  749. /*esd_read_cmd_info = [DCS_CMD 0A 01 9C];*/
  750. /*pre_esd_cmd = [];*/
  751. /*panel-on-command = [];*/
  752. /*panel-off-command = [];*/
  753. /*reset-sequence = <1 5>, <0 10>, <1 30>;*/
  754. /*
  755. panel-gamma-warm-command = [
  756. ];
  757. panel-gamma-nature-command = [
  758. ];
  759. panel-gamma-cool-command = [
  760. ];
  761. panel-ce-std-command = [
  762. ];
  763. panel-ce-vivid-command = [
  764. ];
  765. */
  766. };
  767. seeed_5_inch {
  768. compatible = "starfive,display-dev";
  769. panel_name = "seeed_5_inch";
  770. panel_lcd_id = <22>; /* 480p */
  771. interface_info = "mipi_interface";
  772. refresh_en = <1>;
  773. bits-per-pixel = <24>;
  774. physical-width = <62>;
  775. physical-height = <114>;
  776. panel-width = <800>;
  777. panel-height = <480>;
  778. pixel-clock = <27500000>;
  779. /*dyn_fps;*/ /*dynamic frame rate support*/
  780. fps = <50>;
  781. /*.flags = PREFER_CMD_SEND_MONOLITHIC | CE_CMD_SEND_MONOLITHIC | RESUME_WITH_PREFER | RESUME_WITH_CE*/
  782. /*gamma-command-monolithic;*/
  783. /*ce-command-monolithic;*/
  784. /*resume-with-gamma;*/
  785. /*resume-with-ce;*/
  786. /*mipi info*/
  787. mipi-byte-clock = <78000>;
  788. mipi-escape-clock = <13000>;
  789. lane-no = <1>;
  790. display_mode = "video_mode"; /*video_mode, command_mode*/
  791. /*
  792. auto_stop_clklane_en;
  793. im_pin_val;
  794. */
  795. color_bits = <COLOR_CODE_24BIT>;
  796. /*is_18bit_loosely;*/
  797. /*video mode info*/
  798. h-pulse-width = <10>;
  799. h-back-porch = <20>;
  800. h-front-porch = <50>;
  801. v-pulse-width = <5>;
  802. v-back-porch = <5>;
  803. v-front-porch = <135>;
  804. /*seeed panel mode info*/
  805. dphy_bps = <700000000>;
  806. dsi_burst_mode = <0>;
  807. dsi_sync_pulse = <1>;
  808. // bytes
  809. dsi_hsa = <30>;
  810. dsi_hbp = <211>;
  811. dsi_hfp = <159>;
  812. // lines
  813. dsi_vsa = <5>;
  814. dsi_vbp = <5>;
  815. dsi_vfp = <134>;
  816. status = "okay";
  817. sync_pol = "vsync_high_act"; /*vsync_high_act, hsync_high_act*/
  818. lp_cmd_en;
  819. /*lp_hfp_en;*/
  820. /*lp_hbp_en;*/
  821. /*lp_vact_en;*/
  822. lp_vfp_en;
  823. lp_vbp_en;
  824. lp_vsa_en;
  825. traffic-mode = "burst_with_sync_pulses"; /*non_burst_with_sync_pulses, non_burst_with_sync_events*/
  826. /*phy info*/
  827. data_tprepare = /bits/ 8 <0>;
  828. data_hs_zero = /bits/ 8 <0>;
  829. data_hs_exit = /bits/ 8 <0>;
  830. data_hs_trail = /bits/ 8 <0>;
  831. /*te info*/
  832. te_source = "external_pin"; /*external_pin, dsi_te_trigger*/
  833. te_trigger_mode = "rising_edge"; /*rising_edge, high_1000us*/
  834. te_enable = <0>;
  835. cm_te_effect_sync_enable = <0>; /*used in command mode*/
  836. te_count_per_sec = <64>; /*used in esd*/
  837. /*ext info*/
  838. /*
  839. crc_rx_en;
  840. ecc_rx_en;
  841. eotp_rx_en;
  842. */
  843. eotp_tx_en;
  844. dev_read_time = <0x7fff>;
  845. /*type cmd return_count return_code*/
  846. /*id_read_cmd_info = [];*/
  847. /*pre_id_cmd = [];*/
  848. /*esd_read_cmd_info = [DCS_CMD 0A 01 9C];*/
  849. /*pre_esd_cmd = [];*/
  850. /*panel-on-command = [];*/
  851. /*panel-off-command = [];*/
  852. /*reset-sequence = <1 5>, <0 10>, <1 30>;*/
  853. /*
  854. panel-gamma-warm-command = [
  855. ];
  856. panel-gamma-nature-command = [
  857. ];
  858. panel-gamma-cool-command = [
  859. ];
  860. panel-ce-std-command = [
  861. ];
  862. panel-ce-vivid-command = [
  863. ];
  864. */
  865. };
  866. };
  867. &spi2 {
  868. pinctrl-names = "default";
  869. pinctrl-0 = <&spi2_pins>;
  870. status = "okay";
  871. spi_dev0: spi@0 {
  872. compatible = "rohm,dh2228fv";
  873. spi-max-frequency = <10000000>;
  874. reg = <0>;
  875. };
  876. };
  877. &uart0 {
  878. pinctrl-names = "default";
  879. pinctrl-0 = <&uart0_pins>;
  880. status = "okay";
  881. };
  882. &uart3 {
  883. pinctrl-names = "default";
  884. pinctrl-0 = <&uart3_pins>;
  885. status = "okay";
  886. };
  887. &usb3 {
  888. dr_mode = "host";
  889. status = "okay";
  890. };
  891. /* #include "codecs/sf_pdm.dtsi" */
  892. /* #include "codecs/sf_spdif.dtsi" */
  893. /* #include "codecs/sf_ac108.dtsi" */
  894. /* #include "codecs/sf_wm8960.dtsi" */
  895. /* #include "codecs/sf_vad.dtsi" */