mt7620-reset.h 738 B

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2020 MediaTek Inc.
  4. *
  5. * Author: Weijie Gao <weijie.gao@mediatek.com>
  6. */
  7. #ifndef _DT_BINDINGS_MT7620_RESET_H_
  8. #define _DT_BINDINGS_MT7620_RESET_H_
  9. #define PPE_RST 31
  10. #define SDHC_RST 30
  11. #define MIPS_CNT_RST 28
  12. #define PCIE_RST 26
  13. #define UHST_RST 25
  14. #define EPHY_RST 24
  15. #define ESW_RST 23
  16. #define UDEV_RST 22
  17. #define FE_RST 21
  18. #define WLAN_RST 20
  19. #define UARTL_RST 19
  20. #define SPI_RST 18
  21. #define I2S_RST 17
  22. #define I2C_RST 16
  23. #define NAND_RST 15
  24. #define DMA_RST 14
  25. #define PIO_RST 13
  26. #define UARTF_RST 12
  27. #define PCM_RST 11
  28. #define MC_RST 10
  29. #define INTC_RST 9
  30. #define TIMER_RST 8
  31. #define SYS_RST 0
  32. #endif /* _DT_BINDINGS_MT7620_RESET_H_ */