mediatek,mt7620-mt7530-rfb.dts 1.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2020 MediaTek Inc.
  4. *
  5. * Author: Weijie Gao <weijie.gao@mediatek.com>
  6. */
  7. /dts-v1/;
  8. #include <dt-bindings/gpio/gpio.h>
  9. #include "mt7620.dtsi"
  10. / {
  11. compatible = "mediatek,mt7620-mt7530-rfb", "mediatek,mt7620-soc";
  12. model = "MediaTek MT7620-MT7530 RFB (MTKC712)";
  13. aliases {
  14. serial0 = &uartlite;
  15. spi0 = &spi0;
  16. };
  17. chosen {
  18. stdout-path = &uartlite;
  19. };
  20. };
  21. &uartlite {
  22. status = "okay";
  23. };
  24. &pinctrl {
  25. state_default: pin_state {
  26. pleds {
  27. groups = "ephy led", "wled";
  28. function = "led";
  29. };
  30. gpios {
  31. groups = "pa", "uartf";
  32. function = "gpio";
  33. };
  34. };
  35. gsw_pins: gsw_pins {
  36. mdio {
  37. groups = "mdio";
  38. function = "mdio";
  39. };
  40. rgmii1 {
  41. groups = "rgmii1";
  42. function = "rgmii1";
  43. };
  44. };
  45. };
  46. &spi0 {
  47. status = "okay";
  48. num-cs = <2>;
  49. spi-flash@0 {
  50. #address-cells = <1>;
  51. #size-cells = <1>;
  52. compatible = "jedec,spi-nor";
  53. spi-max-frequency = <25000000>;
  54. reg = <0>;
  55. };
  56. };
  57. &gpio0 {
  58. pa0_pull_low {
  59. gpio-hog;
  60. output-low;
  61. gpios = <20 GPIO_ACTIVE_HIGH>;
  62. };
  63. pa1_pull_low {
  64. gpio-hog;
  65. output-low;
  66. gpios = <21 GPIO_ACTIVE_HIGH>;
  67. };
  68. };
  69. &eth {
  70. status = "okay";
  71. pinctrl-names = "default";
  72. pinctrl-0 = <&gsw_pins>;
  73. port5 {
  74. phy-mode = "rgmii";
  75. phy-addr = <5>;
  76. fixed-link {
  77. full-duplex;
  78. speed = <1000>;
  79. mediatek,mt7530;
  80. mediatek,mt7530-reset = <&gpio0 10 GPIO_ACTIVE_HIGH>;
  81. };
  82. };
  83. };