atstk1002.h 3.9 KB

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  1. /*
  2. * Copyright (C) 2005-2006 Atmel Corporation
  3. *
  4. * Configuration settings for the ATSTK1002 CPU daughterboard
  5. *
  6. * SPDX-License-Identifier: GPL-2.0+
  7. */
  8. #ifndef __CONFIG_H
  9. #define __CONFIG_H
  10. #include <asm/arch/hardware.h>
  11. #define CONFIG_AT32AP
  12. #define CONFIG_AT32AP7000
  13. #define CONFIG_ATSTK1002
  14. #define CONFIG_ATSTK1000
  15. /*
  16. * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
  17. * frequency, the HSB and PBB at 1/2, and the PBA to run at 1/4 the
  18. * PLL frequency.
  19. * (CONFIG_SYS_OSC0_HZ * CONFIG_SYS_PLL0_MUL) / CONFIG_SYS_PLL0_DIV = PLL MHz
  20. */
  21. #define CONFIG_PLL
  22. #define CONFIG_SYS_POWER_MANAGER
  23. #define CONFIG_SYS_OSC0_HZ 20000000
  24. #define CONFIG_SYS_PLL0_DIV 1
  25. #define CONFIG_SYS_PLL0_MUL 7
  26. #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
  27. /*
  28. * Set the CPU running at:
  29. * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
  30. */
  31. #define CONFIG_SYS_CLKDIV_CPU 0
  32. /*
  33. * Set the HSB running at:
  34. * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
  35. */
  36. #define CONFIG_SYS_CLKDIV_HSB 1
  37. /*
  38. * Set the PBA running at:
  39. * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
  40. */
  41. #define CONFIG_SYS_CLKDIV_PBA 2
  42. /*
  43. * Set the PBB running at:
  44. * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
  45. */
  46. #define CONFIG_SYS_CLKDIV_PBB 1
  47. /* Reserve VM regions for SDRAM and NOR flash */
  48. #define CONFIG_SYS_NR_VM_REGIONS 2
  49. /*
  50. * The PLLOPT register controls the PLL like this:
  51. * icp = PLLOPT<2>
  52. * ivco = PLLOPT<1:0>
  53. *
  54. * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
  55. */
  56. #define CONFIG_SYS_PLL0_OPT 0x04
  57. #define CONFIG_USART_BASE ATMEL_BASE_USART1
  58. #define CONFIG_USART_ID 1
  59. /* User serviceable stuff */
  60. #define CONFIG_CMDLINE_TAG
  61. #define CONFIG_SETUP_MEMORY_TAGS
  62. #define CONFIG_INITRD_TAG
  63. #define CONFIG_BOOTARGS \
  64. "console=ttyS0 root=/dev/mmcblk0p1 fbmem=600k rootwait=1"
  65. #define CONFIG_BOOTCOMMAND \
  66. "fsload; bootm $(fileaddr)"
  67. /*
  68. * After booting the board for the first time, new ethernet addresses
  69. * should be generated and assigned to the environment variables
  70. * "ethaddr" and "eth1addr". This is normally done during production.
  71. */
  72. #define CONFIG_OVERWRITE_ETHADDR_ONCE
  73. /*
  74. * BOOTP options
  75. */
  76. #define CONFIG_BOOTP_SUBNETMASK
  77. #define CONFIG_BOOTP_GATEWAY
  78. /* generic board */
  79. #define CONFIG_BOARD_EARLY_INIT_R
  80. /*
  81. * Command line configuration.
  82. */
  83. #define CONFIG_ATMEL_USART
  84. #define CONFIG_MACB
  85. #define CONFIG_PORTMUX_PIO
  86. #define CONFIG_SYS_NR_PIOS 5
  87. #define CONFIG_SYS_HSDRAMC
  88. #define CONFIG_GENERIC_ATMEL_MCI
  89. #define CONFIG_SYS_DCACHE_LINESZ 32
  90. #define CONFIG_SYS_ICACHE_LINESZ 32
  91. #define CONFIG_NR_DRAM_BANKS 1
  92. #define CONFIG_SYS_FLASH_CFI
  93. #define CONFIG_FLASH_CFI_DRIVER
  94. #define CONFIG_SYS_FLASH_BASE 0x00000000
  95. #define CONFIG_SYS_FLASH_SIZE 0x800000
  96. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  97. #define CONFIG_SYS_MAX_FLASH_SECT 135
  98. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  99. #define CONFIG_SYS_TEXT_BASE 0x00000000
  100. #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
  101. #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
  102. #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
  103. #define CONFIG_ENV_IS_IN_FLASH
  104. #define CONFIG_ENV_SIZE 65536
  105. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
  106. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
  107. #define CONFIG_SYS_MALLOC_LEN (256*1024)
  108. /* Allow 4MB for the kernel run-time image */
  109. #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
  110. #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
  111. /* Other configuration settings that shouldn't have to change all that often */
  112. #define CONFIG_SYS_CBSIZE 256
  113. #define CONFIG_SYS_MAXARGS 16
  114. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  115. #define CONFIG_SYS_LONGHELP
  116. #define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
  117. #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x700000)
  118. #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
  119. #endif /* __CONFIG_H */