sysreg.h 7.8 KB

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  1. /*
  2. * System registers for AVR32
  3. */
  4. #ifndef __ASM_AVR32_SYSREG_H__
  5. #define __ASM_AVR32_SYSREG_H__
  6. /* system register offsets */
  7. #define SYSREG_SR 0x0000
  8. #define SYSREG_EVBA 0x0004
  9. #define SYSREG_ACBA 0x0008
  10. #define SYSREG_CPUCR 0x000c
  11. #define SYSREG_ECR 0x0010
  12. #define SYSREG_RSR_SUP 0x0014
  13. #define SYSREG_RSR_INT0 0x0018
  14. #define SYSREG_RSR_INT1 0x001c
  15. #define SYSREG_RSR_INT2 0x0020
  16. #define SYSREG_RSR_INT3 0x0024
  17. #define SYSREG_RSR_EX 0x0028
  18. #define SYSREG_RSR_NMI 0x002c
  19. #define SYSREG_RSR_DBG 0x0030
  20. #define SYSREG_RAR_SUP 0x0034
  21. #define SYSREG_RAR_INT0 0x0038
  22. #define SYSREG_RAR_INT1 0x003c
  23. #define SYSREG_RAR_INT2 0x0040
  24. #define SYSREG_RAR_INT3 0x0044
  25. #define SYSREG_RAR_EX 0x0048
  26. #define SYSREG_RAR_NMI 0x004c
  27. #define SYSREG_RAR_DBG 0x0050
  28. #define SYSREG_JECR 0x0054
  29. #define SYSREG_JOSP 0x0058
  30. #define SYSREG_JAVA_LV0 0x005c
  31. #define SYSREG_JAVA_LV1 0x0060
  32. #define SYSREG_JAVA_LV2 0x0064
  33. #define SYSREG_JAVA_LV3 0x0068
  34. #define SYSREG_JAVA_LV4 0x006c
  35. #define SYSREG_JAVA_LV5 0x0070
  36. #define SYSREG_JAVA_LV6 0x0074
  37. #define SYSREG_JAVA_LV7 0x0078
  38. #define SYSREG_JTBA 0x007c
  39. #define SYSREG_JBCR 0x0080
  40. #define SYSREG_CONFIG0 0x0100
  41. #define SYSREG_CONFIG1 0x0104
  42. #define SYSREG_COUNT 0x0108
  43. #define SYSREG_COMPARE 0x010c
  44. #define SYSREG_TLBEHI 0x0110
  45. #define SYSREG_TLBELO 0x0114
  46. #define SYSREG_PTBR 0x0118
  47. #define SYSREG_TLBEAR 0x011c
  48. #define SYSREG_MMUCR 0x0120
  49. #define SYSREG_TLBARLO 0x0124
  50. #define SYSREG_TLBARHI 0x0128
  51. #define SYSREG_PCCNT 0x012c
  52. #define SYSREG_PCNT0 0x0130
  53. #define SYSREG_PCNT1 0x0134
  54. #define SYSREG_PCCR 0x0138
  55. #define SYSREG_BEAR 0x013c
  56. #define SYSREG_SABAL 0x0300
  57. #define SYSREG_SABAH 0x0304
  58. #define SYSREG_SABD 0x0308
  59. /* Bitfields in SR */
  60. #define SYSREG_SR_C_OFFSET 0
  61. #define SYSREG_SR_C_SIZE 1
  62. #define SYSREG_Z_OFFSET 1
  63. #define SYSREG_Z_SIZE 1
  64. #define SYSREG_SR_N_OFFSET 2
  65. #define SYSREG_SR_N_SIZE 1
  66. #define SYSREG_SR_V_OFFSET 3
  67. #define SYSREG_SR_V_SIZE 1
  68. #define SYSREG_Q_OFFSET 4
  69. #define SYSREG_Q_SIZE 1
  70. #define SYSREG_L_OFFSET 5
  71. #define SYSREG_L_SIZE 1
  72. #define SYSREG_T_OFFSET 14
  73. #define SYSREG_T_SIZE 1
  74. #define SYSREG_SR_R_OFFSET 15
  75. #define SYSREG_SR_R_SIZE 1
  76. #define SYSREG_GM_OFFSET 16
  77. #define SYSREG_GM_SIZE 1
  78. #define SYSREG_I0M_OFFSET 17
  79. #define SYSREG_I0M_SIZE 1
  80. #define SYSREG_I1M_OFFSET 18
  81. #define SYSREG_I1M_SIZE 1
  82. #define SYSREG_I2M_OFFSET 19
  83. #define SYSREG_I2M_SIZE 1
  84. #define SYSREG_I3M_OFFSET 20
  85. #define SYSREG_I3M_SIZE 1
  86. #define SYSREG_EM_OFFSET 21
  87. #define SYSREG_EM_SIZE 1
  88. #define SYSREG_M0_OFFSET 22
  89. #define SYSREG_M0_SIZE 1
  90. #define SYSREG_M1_OFFSET 23
  91. #define SYSREG_M1_SIZE 1
  92. #define SYSREG_M2_OFFSET 24
  93. #define SYSREG_M2_SIZE 1
  94. #define SYSREG_SR_D_OFFSET 26
  95. #define SYSREG_SR_D_SIZE 1
  96. #define SYSREG_DM_OFFSET 27
  97. #define SYSREG_DM_SIZE 1
  98. #define SYSREG_SR_J_OFFSET 28
  99. #define SYSREG_SR_J_SIZE 1
  100. #define SYSREG_H_OFFSET 29
  101. #define SYSREG_H_SIZE 1
  102. /* Bitfields in CPUCR */
  103. #define SYSREG_BI_OFFSET 0
  104. #define SYSREG_BI_SIZE 1
  105. #define SYSREG_BE_OFFSET 1
  106. #define SYSREG_BE_SIZE 1
  107. #define SYSREG_FE_OFFSET 2
  108. #define SYSREG_FE_SIZE 1
  109. #define SYSREG_RE_OFFSET 3
  110. #define SYSREG_RE_SIZE 1
  111. #define SYSREG_IBE_OFFSET 4
  112. #define SYSREG_IBE_SIZE 1
  113. #define SYSREG_IEE_OFFSET 5
  114. #define SYSREG_IEE_SIZE 1
  115. /* Bitfields in ECR */
  116. #define SYSREG_ECR_OFFSET 0
  117. #define SYSREG_ECR_SIZE 32
  118. /* Bitfields in CONFIG0 */
  119. #define SYSREG_CONFIG0_R_OFFSET 0
  120. #define SYSREG_CONFIG0_R_SIZE 1
  121. #define SYSREG_CONFIG0_D_OFFSET 1
  122. #define SYSREG_CONFIG0_D_SIZE 1
  123. #define SYSREG_CONFIG0_S_OFFSET 2
  124. #define SYSREG_CONFIG0_S_SIZE 1
  125. #define SYSREG_O_OFFSET 3
  126. #define SYSREG_O_SIZE 1
  127. #define SYSREG_P_OFFSET 4
  128. #define SYSREG_P_SIZE 1
  129. #define SYSREG_CONFIG0_J_OFFSET 5
  130. #define SYSREG_CONFIG0_J_SIZE 1
  131. #define SYSREG_F_OFFSET 6
  132. #define SYSREG_F_SIZE 1
  133. #define SYSREG_MMUT_OFFSET 7
  134. #define SYSREG_MMUT_SIZE 3
  135. #define SYSREG_AR_OFFSET 10
  136. #define SYSREG_AR_SIZE 3
  137. #define SYSREG_AT_OFFSET 13
  138. #define SYSREG_AT_SIZE 3
  139. #define SYSREG_PROCESSORREVISION_OFFSET 16
  140. #define SYSREG_PROCESSORREVISION_SIZE 8
  141. #define SYSREG_PROCESSORID_OFFSET 24
  142. #define SYSREG_PROCESSORID_SIZE 8
  143. /* Bitfields in CONFIG1 */
  144. #define SYSREG_DASS_OFFSET 0
  145. #define SYSREG_DASS_SIZE 3
  146. #define SYSREG_DLSZ_OFFSET 3
  147. #define SYSREG_DLSZ_SIZE 3
  148. #define SYSREG_DSET_OFFSET 6
  149. #define SYSREG_DSET_SIZE 4
  150. #define SYSREG_IASS_OFFSET 10
  151. #define SYSREG_IASS_SIZE 3
  152. #define SYSREG_ILSZ_OFFSET 13
  153. #define SYSREG_ILSZ_SIZE 3
  154. #define SYSREG_ISET_OFFSET 16
  155. #define SYSREG_ISET_SIZE 4
  156. #define SYSREG_DMMUSZ_OFFSET 20
  157. #define SYSREG_DMMUSZ_SIZE 6
  158. #define SYSREG_IMMUSZ_OFFSET 26
  159. #define SYSREG_IMMUSZ_SIZE 6
  160. /* Bitfields in TLBEHI */
  161. #define SYSREG_ASID_OFFSET 0
  162. #define SYSREG_ASID_SIZE 8
  163. #define SYSREG_TLBEHI_I_OFFSET 8
  164. #define SYSREG_TLBEHI_I_SIZE 1
  165. #define SYSREG_TLBEHI_V_OFFSET 9
  166. #define SYSREG_TLBEHI_V_SIZE 1
  167. #define SYSREG_VPN_OFFSET 10
  168. #define SYSREG_VPN_SIZE 22
  169. /* Bitfields in TLBELO */
  170. #define SYSREG_W_OFFSET 0
  171. #define SYSREG_W_SIZE 1
  172. #define SYSREG_TLBELO_D_OFFSET 1
  173. #define SYSREG_TLBELO_D_SIZE 1
  174. #define SYSREG_SZ_OFFSET 2
  175. #define SYSREG_SZ_SIZE 2
  176. #define SYSREG_AP_OFFSET 4
  177. #define SYSREG_AP_SIZE 3
  178. #define SYSREG_B_OFFSET 7
  179. #define SYSREG_B_SIZE 1
  180. #define SYSREG_G_OFFSET 8
  181. #define SYSREG_G_SIZE 1
  182. #define SYSREG_TLBELO_C_OFFSET 9
  183. #define SYSREG_TLBELO_C_SIZE 1
  184. #define SYSREG_PFN_OFFSET 10
  185. #define SYSREG_PFN_SIZE 22
  186. /* Bitfields in MMUCR */
  187. #define SYSREG_E_OFFSET 0
  188. #define SYSREG_E_SIZE 1
  189. #define SYSREG_M_OFFSET 1
  190. #define SYSREG_M_SIZE 1
  191. #define SYSREG_MMUCR_I_OFFSET 2
  192. #define SYSREG_MMUCR_I_SIZE 1
  193. #define SYSREG_MMUCR_N_OFFSET 3
  194. #define SYSREG_MMUCR_N_SIZE 1
  195. #define SYSREG_MMUCR_S_OFFSET 4
  196. #define SYSREG_MMUCR_S_SIZE 1
  197. #define SYSREG_DLA_OFFSET 8
  198. #define SYSREG_DLA_SIZE 6
  199. #define SYSREG_DRP_OFFSET 14
  200. #define SYSREG_DRP_SIZE 6
  201. #define SYSREG_ILA_OFFSET 20
  202. #define SYSREG_ILA_SIZE 6
  203. #define SYSREG_IRP_OFFSET 26
  204. #define SYSREG_IRP_SIZE 6
  205. /* Bitfields in PCCR */
  206. #define SYSREG_PCCR_R_OFFSET 1
  207. #define SYSREG_PCCR_R_SIZE 1
  208. #define SYSREG_PCCR_C_OFFSET 2
  209. #define SYSREG_PCCR_C_SIZE 1
  210. #define SYSREG_PCCR_S_OFFSET 3
  211. #define SYSREG_PCCR_S_SIZE 1
  212. #define SYSREG_IEC_OFFSET 4
  213. #define SYSREG_IEC_SIZE 1
  214. #define SYSREG_IE0_OFFSET 5
  215. #define SYSREG_IE0_SIZE 1
  216. #define SYSREG_IE1_OFFSET 6
  217. #define SYSREG_IE1_SIZE 1
  218. #define SYSREG_FC_OFFSET 8
  219. #define SYSREG_FC_SIZE 1
  220. #define SYSREG_F0_OFFSET 9
  221. #define SYSREG_F0_SIZE 1
  222. #define SYSREG_F1_OFFSET 10
  223. #define SYSREG_F1_SIZE 1
  224. #define SYSREG_CONF0_OFFSET 12
  225. #define SYSREG_CONF0_SIZE 6
  226. #define SYSREG_CONF1_OFFSET 18
  227. #define SYSREG_CONF1_SIZE 6
  228. /* Constants for ECR */
  229. #define ECR_UNRECOVERABLE 0
  230. #define ECR_TLB_MULTIPLE 1
  231. #define ECR_BUS_ERROR_WRITE 2
  232. #define ECR_BUS_ERROR_READ 3
  233. #define ECR_NMI 4
  234. #define ECR_ADDR_ALIGN_X 5
  235. #define ECR_PROTECTION_X 6
  236. #define ECR_DEBUG 7
  237. #define ECR_ILLEGAL_OPCODE 8
  238. #define ECR_UNIMPL_INSTRUCTION 9
  239. #define ECR_PRIVILEGE_VIOLATION 10
  240. #define ECR_FPE 11
  241. #define ECR_COPROC_ABSENT 12
  242. #define ECR_ADDR_ALIGN_R 13
  243. #define ECR_ADDR_ALIGN_W 14
  244. #define ECR_PROTECTION_R 15
  245. #define ECR_PROTECTION_W 16
  246. #define ECR_DTLB_MODIFIED 17
  247. #define ECR_TLB_MISS_X 20
  248. #define ECR_TLB_MISS_R 24
  249. #define ECR_TLB_MISS_W 28
  250. /* Bit manipulation macros */
  251. #define SYSREG_BIT(name) (1 << SYSREG_##name##_OFFSET)
  252. #define SYSREG_BF(name,value) \
  253. (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \
  254. << SYSREG_##name##_OFFSET)
  255. #define SYSREG_BFEXT(name,value) \
  256. (((value) >> SYSREG_##name##_OFFSET) \
  257. & ((1 << SYSREG_##name##_SIZE) - 1))
  258. #define SYSREG_BFINS(name,value,old) \
  259. (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \
  260. << SYSREG_##name##_OFFSET)) \
  261. | SYSREG_BF(name,value))
  262. /* Register access macros */
  263. #define sysreg_read(reg) \
  264. ((unsigned long)__builtin_mfsr(SYSREG_##reg))
  265. #define sysreg_write(reg, value) \
  266. __builtin_mtsr(SYSREG_##reg, value)
  267. #endif /* __ASM_AVR32_SYSREG_H__ */