a3000.c 3.2 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
  4. *
  5. * Modified during 2003 by
  6. * Ken Chou, kchou@ieee.org
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. #include <common.h>
  27. #include <mpc824x.h>
  28. #include <pci.h>
  29. #include <netdev.h>
  30. int checkboard (void)
  31. {
  32. ulong busfreq = get_bus_freq(0);
  33. char buf[32];
  34. printf("Board: A3000 Local Bus at %s MHz\n", strmhz(buf, busfreq));
  35. return 0;
  36. }
  37. phys_size_t initdram (int board_type)
  38. {
  39. long size;
  40. long new_bank0_end;
  41. long mear1;
  42. long emear1;
  43. size = get_ram_size(CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM_SIZE);
  44. new_bank0_end = size - 1;
  45. mear1 = mpc824x_mpc107_getreg(MEAR1);
  46. emear1 = mpc824x_mpc107_getreg(EMEAR1);
  47. mear1 = (mear1 & 0xFFFFFF00) |
  48. ((new_bank0_end & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT);
  49. emear1 = (emear1 & 0xFFFFFF00) |
  50. ((new_bank0_end & MICR_ADDR_MASK) >> MICR_EADDR_SHIFT);
  51. mpc824x_mpc107_setreg(MEAR1, mear1);
  52. mpc824x_mpc107_setreg(EMEAR1, emear1);
  53. return (size);
  54. }
  55. /*
  56. * Initialize PCI Devices
  57. */
  58. #ifndef CONFIG_PCI_PNP
  59. static struct pci_config_table pci_a3000_config_table[] = {
  60. /* vendor, device, class */
  61. /* bus, dev, func */
  62. { PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_83815, PCI_ANY_ID,
  63. PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, /* dp83815 eth0 divice */
  64. pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
  65. PCI_ENET0_MEMADDR,
  66. PCI_COMMAND_IO |
  67. PCI_COMMAND_MEMORY |
  68. PCI_COMMAND_MASTER }},
  69. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  70. PCI_ANY_ID, 0x14, PCI_ANY_ID, /* PCI slot1 */
  71. pci_cfgfunc_config_device, { PCI_ENET1_IOADDR,
  72. PCI_ENET1_MEMADDR,
  73. PCI_COMMAND_IO |
  74. PCI_COMMAND_MEMORY |
  75. PCI_COMMAND_MASTER }},
  76. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  77. PCI_ANY_ID, 0x15, PCI_ANY_ID, /* PCI slot2 */
  78. pci_cfgfunc_config_device, { PCI_ENET2_IOADDR,
  79. PCI_ENET2_MEMADDR,
  80. PCI_COMMAND_IO |
  81. PCI_COMMAND_MEMORY |
  82. PCI_COMMAND_MASTER }},
  83. { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  84. PCI_ANY_ID, 0x16, PCI_ANY_ID, /* PCI slot3 */
  85. pci_cfgfunc_config_device, { PCI_ENET3_IOADDR,
  86. PCI_ENET3_MEMADDR,
  87. PCI_COMMAND_IO |
  88. PCI_COMMAND_MEMORY |
  89. PCI_COMMAND_MASTER }},
  90. { }
  91. };
  92. #endif
  93. struct pci_controller hose = {
  94. #ifndef CONFIG_PCI_PNP
  95. config_table: pci_a3000_config_table,
  96. #endif
  97. };
  98. void pci_init_board(void)
  99. {
  100. pci_mpc824x_init(&hose);
  101. }
  102. int board_eth_init(bd_t *bis)
  103. {
  104. return pci_eth_init(bis);
  105. }