misc.S 4.4 KB

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  1. #include <config.h>
  2. #include <74xx_7xx.h>
  3. #include "version.h"
  4. #include <ppc_asm.tmpl>
  5. #include <ppc_defs.h>
  6. #include <asm/cache.h>
  7. #include <asm/mmu.h>
  8. #include "../include/mv_gen_reg.h"
  9. #ifdef CONFIG_ECC
  10. /* Galileo specific asm code for initializing ECC */
  11. .globl board_relocate_rom
  12. board_relocate_rom:
  13. mflr r7
  14. /* update the location of the GT registers */
  15. lis r11, CONFIG_SYS_GT_REGS@h
  16. /* if we're using ECC, we must use the DMA engine to copy ourselves */
  17. bl start_idma_transfer_0
  18. bl wait_for_idma_0
  19. bl stop_idma_engine_0
  20. mtlr r7
  21. blr
  22. .globl board_init_ecc
  23. board_init_ecc:
  24. mflr r7
  25. /* NOTE: r10 still contains the location we've been relocated to
  26. * which happens to be TOP_OF_RAM - CONFIG_SYS_MONITOR_LEN */
  27. /* now that we're running from ram, init the rest of main memory
  28. * for ECC use */
  29. lis r8, CONFIG_SYS_MONITOR_LEN@h
  30. ori r8, r8, CONFIG_SYS_MONITOR_LEN@l
  31. divw r3, r10, r8
  32. /* set up the counter, and init the starting address */
  33. mtctr r3
  34. li r12, 0
  35. /* bytes per transfer */
  36. mr r5, r8
  37. about_to_init_ecc:
  38. 1: mr r3, r12
  39. mr r4, r12
  40. bl start_idma_transfer_0
  41. bl wait_for_idma_0
  42. bl stop_idma_engine_0
  43. add r12, r12, r8
  44. bdnz 1b
  45. mtlr r7
  46. blr
  47. /* r3: dest addr
  48. * r4: source addr
  49. * r5: byte count
  50. * r11: gt regbase
  51. * trashes: r6, r5
  52. */
  53. start_idma_transfer_0:
  54. /* set the byte count, including the OWN bit */
  55. mr r6, r11
  56. ori r6, r6, CHANNEL0_DMA_BYTE_COUNT
  57. stwbrx r5, 0, (r6)
  58. /* set the source address */
  59. mr r6, r11
  60. ori r6, r6, CHANNEL0_DMA_SOURCE_ADDRESS
  61. stwbrx r4, 0, (r6)
  62. /* set the dest address */
  63. mr r6, r11
  64. ori r6, r6, CHANNEL0_DMA_DESTINATION_ADDRESS
  65. stwbrx r3, 0, (r6)
  66. /* set the next record pointer */
  67. li r5, 0
  68. mr r6, r11
  69. ori r6, r6, CHANNEL0NEXT_RECORD_POINTER
  70. stwbrx r5, 0, (r6)
  71. /* set the low control register */
  72. /* bit 9 is NON chained mode, bit 31 is new style descriptors.
  73. bit 12 is channel enable */
  74. ori r5, r5, (1 << 12) | (1 << 12) | (1 << 11)
  75. /* 15 shifted by 16 (oris) == bit 31 */
  76. oris r5, r5, (1 << 15)
  77. mr r6, r11
  78. ori r6, r6, CHANNEL0CONTROL
  79. stwbrx r5, 0, (r6)
  80. blr
  81. /* this waits for the bytecount to return to zero, indicating
  82. * that the trasfer is complete */
  83. wait_for_idma_0:
  84. mr r5, r11
  85. lis r6, 0xff
  86. ori r6, r6, 0xffff
  87. ori r5, r5, CHANNEL0_DMA_BYTE_COUNT
  88. 1: lwbrx r4, 0, (r5)
  89. and. r4, r4, r6
  90. bne 1b
  91. blr
  92. /* this turns off channel 0 of the idma engine */
  93. stop_idma_engine_0:
  94. /* shut off the DMA engine */
  95. li r5, 0
  96. mr r6, r11
  97. ori r6, r6, CHANNEL0CONTROL
  98. stwbrx r5, 0, (r6)
  99. blr
  100. #endif
  101. #ifdef CONFIG_SYS_BOARD_ASM_INIT
  102. /* NOTE: trashes r3-r7 */
  103. .globl board_asm_init
  104. board_asm_init:
  105. /* just move the GT registers to where they belong */
  106. lis r3, CONFIG_SYS_DFL_GT_REGS@h
  107. ori r3, r3, CONFIG_SYS_DFL_GT_REGS@l
  108. lis r4, CONFIG_SYS_GT_REGS@h
  109. ori r4, r4, CONFIG_SYS_GT_REGS@l
  110. li r5, INTERNAL_SPACE_DECODE
  111. /* test to see if we've already moved */
  112. lwbrx r6, r5, r4
  113. andi. r6, r6, 0xffff
  114. /* check loading of R7 is: 0x0F80 should: 0xf800: DONE */
  115. /* rlwinm r7, r4, 8, 16, 31
  116. rlwinm r7, r4, 12, 16, 31 */ /* original */
  117. rlwinm r7, r4, 16, 16, 31
  118. /* -----------------------------------------------------*/
  119. cmp cr0, r7, r6
  120. beqlr
  121. /* nope, have to move the registers */
  122. lwbrx r6, r5, r3
  123. andis. r6, r6, 0xffff
  124. or r6, r6, r7
  125. stwbrx r6, r5, r3
  126. /* now, poll for the change */
  127. 1: lwbrx r7, r5, r4
  128. cmp cr0, r7, r6
  129. bne 1b
  130. /* done! */
  131. blr
  132. #endif
  133. /* For use of the debug LEDs */
  134. .global led_on0_relocated
  135. led_on0_relocated:
  136. xor r21, r21, r21
  137. xor r18, r18, r18
  138. lis r18, 0xFC80
  139. ori r18, r18, 0x8000
  140. stw r21, 0x0(r18)
  141. /* stw r18, 0x0(r18) */
  142. sync
  143. blr
  144. .global led_off0_relocated
  145. led_off0_relocated:
  146. xor r21, r21, r21
  147. xor r18, r18, r18
  148. lis r18, 0xFC81
  149. ori r18, r18, 0x4000
  150. stw r21, 0x0(r18)
  151. /* stw r18, 0x0(r18) */
  152. sync
  153. blr
  154. .global led_on0
  155. led_on0:
  156. xor r18, r18, r18
  157. lis r18, 0x1c80
  158. ori r18, r18, 0x8000
  159. stw r18, 0x0(r18)
  160. sync
  161. blr
  162. .global led_off0
  163. led_off0:
  164. xor r18, r18, r18
  165. lis r18, 0x1c81
  166. ori r18, r18, 0x4000
  167. stw r18, 0x0(r18)
  168. sync
  169. blr
  170. .global led_on1
  171. led_on1:
  172. xor r18, r18, r18
  173. lis r18, 0x1c80
  174. ori r18, r18, 0xc000
  175. stw r18, 0x0(r18)
  176. sync
  177. blr
  178. .global led_off1
  179. led_off1:
  180. xor r18, r18, r18
  181. lis r18, 0x1c81
  182. ori r18, r18, 0x8000
  183. stw r18, 0x0(r18)
  184. sync
  185. blr
  186. .global led_on2
  187. led_on2:
  188. xor r18, r18, r18
  189. lis r18, 0x1c81
  190. ori r18, r18, 0x0000
  191. stw r18, 0x0(r18)
  192. sync
  193. blr
  194. .global led_off2
  195. led_off2:
  196. xor r18, r18, r18
  197. lis r18, 0x1c81
  198. ori r18, r18, 0xc000
  199. stw r18, 0x0(r18)
  200. sync
  201. blr