ds414.h 2.6 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2014 Stefan Roese <sr@denx.de>
  4. */
  5. #ifndef _CONFIG_SYNOLOGY_DS414_H
  6. #define _CONFIG_SYNOLOGY_DS414_H
  7. /* Vendor kernel expects this MACH_TYPE */
  8. #define CONFIG_MACH_TYPE 3036
  9. /*
  10. * High Level Configuration Options (easy to change)
  11. */
  12. /*
  13. * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
  14. * for DDR ECC byte filling in the SPL before loading the main
  15. * U-Boot into it.
  16. */
  17. #define CONFIG_SYS_TCLK 250000000 /* 250MHz */
  18. /* I2C */
  19. #define CONFIG_SYS_I2C_LEGACY
  20. #define CONFIG_SYS_I2C_MVTWSI
  21. #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
  22. #define CONFIG_SYS_I2C_SLAVE 0x0
  23. #define CONFIG_SYS_I2C_SPEED 100000
  24. /* PCIe support */
  25. #ifndef CONFIG_SPL_BUILD
  26. #define CONFIG_PCI_SCAN_SHOW
  27. #endif
  28. /* USB/EHCI/XHCI configuration */
  29. #define CONFIG_EHCI_IS_TDI
  30. /*
  31. * mv-common.h should be defined after CMD configs since it used them
  32. * to enable certain macros
  33. */
  34. #include "mv-common.h"
  35. /*
  36. * Memory layout while starting into the bin_hdr via the
  37. * BootROM:
  38. *
  39. * 0x4000.4000 - 0x4003.4000 headers space (192KiB)
  40. * 0x4000.4030 bin_hdr start address
  41. * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB)
  42. * 0x4007.fffc BootROM stack top
  43. *
  44. * The address space between 0x4007.fffc and 0x400f.fff is not locked in
  45. * L2 cache thus cannot be used.
  46. */
  47. /* SPL */
  48. /* Defines for SPL */
  49. #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030)
  50. #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10))
  51. #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
  52. #ifdef CONFIG_SPL_BUILD
  53. #define CONFIG_SYS_MALLOC_SIMPLE
  54. #endif
  55. #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
  56. #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
  57. #if defined(CONFIG_MVEBU_SPL_BOOT_DEVICE_SPI)
  58. /* SPL related SPI defines */
  59. #define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
  60. #endif
  61. /* DS414 bus width is 32bits */
  62. #define CONFIG_DDR_32BIT
  63. /* Default Environment */
  64. #define CONFIG_LOADADDR 0x80000
  65. #define CONFIG_BOOTCOMMAND \
  66. "sf probe; " \
  67. "sf read ${loadaddr} 0xd0000 0x2d0000; " \
  68. "sf read ${ramdisk_addr_r} 0x3a0000 0x430000; " \
  69. "bootm ${loadaddr} ${ramdisk_addr_r}"
  70. #define CONFIG_EXTRA_ENV_SETTINGS \
  71. "initrd_high=0xffffffff\0" \
  72. "ramdisk_addr_r=0x8000000\0" \
  73. "usb0Mode=host\0usb1Mode=host\0usb2Mode=device\0" \
  74. "ethmtu=1500\0eth1mtu=1500\0" \
  75. "update_uboot=sf probe; dhcp; " \
  76. "mw.b ${loadaddr} 0x0 0xd0000; " \
  77. "tftpboot ${loadaddr} u-boot-spl.kwb; " \
  78. "sf update ${loadaddr} 0x0 0xd0000\0"
  79. /* increase autoneg timeout, my NIC sucks */
  80. #define PHY_ANEG_TIMEOUT 16000
  81. #endif /* _CONFIG_SYNOLOGY_DS414_H */