syscounter.c 2.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Freescale Semiconductor, Inc.
  4. *
  5. * The file use ls102xa/timer.c as a reference.
  6. */
  7. #include <common.h>
  8. #include <init.h>
  9. #include <time.h>
  10. #include <asm/io.h>
  11. #include <div64.h>
  12. #include <asm/arch/imx-regs.h>
  13. #include <asm/arch/sys_proto.h>
  14. #include <asm/mach-imx/syscounter.h>
  15. DECLARE_GLOBAL_DATA_PTR;
  16. /*
  17. * This function is intended for SHORT delays only.
  18. * It will overflow at around 10 seconds @ 400MHz,
  19. * or 20 seconds @ 200MHz.
  20. */
  21. unsigned long usec2ticks(unsigned long usec)
  22. {
  23. ulong ticks;
  24. if (usec < 1000)
  25. ticks = ((usec * (get_tbclk()/1000)) + 500) / 1000;
  26. else
  27. ticks = ((usec / 10) * (get_tbclk() / 100000));
  28. return ticks;
  29. }
  30. static inline unsigned long long tick_to_time(unsigned long long tick)
  31. {
  32. unsigned long freq;
  33. asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  34. tick *= CONFIG_SYS_HZ;
  35. do_div(tick, freq);
  36. return tick;
  37. }
  38. static inline unsigned long long us_to_tick(unsigned long long usec)
  39. {
  40. unsigned long freq;
  41. asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  42. usec = usec * freq + 999999;
  43. do_div(usec, 1000000);
  44. return usec;
  45. }
  46. #ifndef CONFIG_SKIP_LOWLEVEL_INIT
  47. int timer_init(void)
  48. {
  49. struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR;
  50. unsigned long val, freq;
  51. freq = CONFIG_SC_TIMER_CLK;
  52. asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
  53. writel(freq, &sctr->cntfid0);
  54. /* Enable system counter */
  55. val = readl(&sctr->cntcr);
  56. val &= ~(SC_CNTCR_FREQ0 | SC_CNTCR_FREQ1);
  57. val |= SC_CNTCR_FREQ0 | SC_CNTCR_ENABLE | SC_CNTCR_HDBG;
  58. writel(val, &sctr->cntcr);
  59. gd->arch.tbl = 0;
  60. gd->arch.tbu = 0;
  61. return 0;
  62. }
  63. #endif
  64. unsigned long long get_ticks(void)
  65. {
  66. unsigned long long now;
  67. asm volatile("mrrc p15, 0, %Q0, %R0, c14" : "=r" (now));
  68. gd->arch.tbl = (unsigned long)(now & 0xffffffff);
  69. gd->arch.tbu = (unsigned long)(now >> 32);
  70. return now;
  71. }
  72. ulong get_timer(ulong base)
  73. {
  74. return tick_to_time(get_ticks()) - base;
  75. }
  76. void __udelay(unsigned long usec)
  77. {
  78. unsigned long long tmp;
  79. ulong tmo;
  80. tmo = us_to_tick(usec);
  81. tmp = get_ticks() + tmo; /* get current timestamp */
  82. while (get_ticks() < tmp) /* loop till event */
  83. /*NOP*/;
  84. }
  85. /*
  86. * This function is derived from PowerPC code (timebase clock frequency).
  87. * On ARM it returns the number of timer ticks per second.
  88. */
  89. ulong get_tbclk(void)
  90. {
  91. unsigned long freq;
  92. asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r" (freq));
  93. return freq;
  94. }