timer.c 2.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Lineo, Inc. <www.lineo.com>
  5. * Bernhard Kuhn <bkuhn@lineo.com>
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. *
  11. * (C) Copyright 2002
  12. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  13. * Alex Zuepke <azu@sysgo.de>
  14. */
  15. #include <common.h>
  16. #include <init.h>
  17. #include <time.h>
  18. #include <asm/io.h>
  19. #include <asm/arch/hardware.h>
  20. #include <asm/arch/at91_tc.h>
  21. #include <asm/arch/clk.h>
  22. DECLARE_GLOBAL_DATA_PTR;
  23. /* the number of clocks per CONFIG_SYS_HZ */
  24. #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ)
  25. int timer_init(void)
  26. {
  27. at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
  28. at91_periph_clk_enable(ATMEL_ID_TC0);
  29. writel(0, &tc->bcr);
  30. writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE |
  31. AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr);
  32. writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr);
  33. /* set to MCLK/2 and restart the timer
  34. when the value in TC_RC is reached */
  35. writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr);
  36. writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interrupts */
  37. writel(TIMER_LOAD_VAL, &tc->tc[0].rc);
  38. writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr);
  39. gd->arch.lastinc = 0;
  40. gd->arch.tbl = 0;
  41. return 0;
  42. }
  43. /*
  44. * timer without interrupts
  45. */
  46. ulong get_timer_raw(void)
  47. {
  48. at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC;
  49. u32 now;
  50. now = readl(&tc->tc[0].cv) & 0x0000ffff;
  51. if (now >= gd->arch.lastinc) {
  52. /* normal mode */
  53. gd->arch.tbl += now - gd->arch.lastinc;
  54. } else {
  55. /* we have an overflow ... */
  56. gd->arch.tbl += now + TIMER_LOAD_VAL - gd->arch.lastinc;
  57. }
  58. gd->arch.lastinc = now;
  59. return gd->arch.tbl;
  60. }
  61. static ulong get_timer_masked(void)
  62. {
  63. return get_timer_raw()/TIMER_LOAD_VAL;
  64. }
  65. ulong get_timer(ulong base)
  66. {
  67. return get_timer_masked() - base;
  68. }
  69. void __udelay(unsigned long usec)
  70. {
  71. u32 tmo;
  72. u32 endtime;
  73. signed long diff;
  74. tmo = CONFIG_SYS_HZ_CLOCK / 1000;
  75. tmo *= usec;
  76. tmo /= 1000;
  77. endtime = get_timer_raw() + tmo;
  78. do {
  79. u32 now = get_timer_raw();
  80. diff = endtime - now;
  81. } while (diff >= 0);
  82. }
  83. /*
  84. * This function is derived from PowerPC code (read timebase as long long).
  85. * On ARM it just returns the timer value.
  86. */
  87. unsigned long long get_ticks(void)
  88. {
  89. return get_timer(0);
  90. }
  91. /*
  92. * This function is derived from PowerPC code (timebase clock frequency).
  93. * On ARM it returns the number of timer ticks per second.
  94. */
  95. ulong get_tbclk(void)
  96. {
  97. return CONFIG_SYS_HZ;
  98. }