fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/global_data.h>
  24. #include <asm/sections.h>
  25. #include <linux/ctype.h>
  26. #include <linux/lzo.h>
  27. #include <linux/ioport.h>
  28. DECLARE_GLOBAL_DATA_PTR;
  29. /*
  30. * Here are the type we know about. One day we might allow drivers to
  31. * register. For now we just put them here. The COMPAT macro allows us to
  32. * turn this into a sparse list later, and keeps the ID with the name.
  33. *
  34. * NOTE: This list is basically a TODO list for things that need to be
  35. * converted to driver model. So don't add new things here unless there is a
  36. * good reason why driver-model conversion is infeasible. Examples include
  37. * things which are used before driver model is available.
  38. */
  39. #define COMPAT(id, name) name
  40. static const char * const compat_names[COMPAT_COUNT] = {
  41. COMPAT(UNKNOWN, "<none>"),
  42. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  43. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  44. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  45. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  46. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  47. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  48. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  49. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  50. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  51. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  52. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  53. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  54. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  55. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  56. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  57. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  58. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  59. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  60. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  61. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  62. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  63. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  64. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  65. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  66. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  67. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  72. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  73. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  74. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  75. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  76. };
  77. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  78. {
  79. /* We allow reading of the 'unknown' ID for testing purposes */
  80. assert(id >= 0 && id < COMPAT_COUNT);
  81. return compat_names[id];
  82. }
  83. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  84. const char *prop_name, int index, int na,
  85. int ns, fdt_size_t *sizep,
  86. bool translate)
  87. {
  88. const fdt32_t *prop, *prop_end;
  89. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  90. int len;
  91. fdt_addr_t addr;
  92. debug("%s: %s: ", __func__, prop_name);
  93. prop = fdt_getprop(blob, node, prop_name, &len);
  94. if (!prop) {
  95. debug("(not found)\n");
  96. return FDT_ADDR_T_NONE;
  97. }
  98. prop_end = prop + (len / sizeof(*prop));
  99. prop_addr = prop + (index * (na + ns));
  100. prop_size = prop_addr + na;
  101. prop_after_size = prop_size + ns;
  102. if (prop_after_size > prop_end) {
  103. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  104. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  105. return FDT_ADDR_T_NONE;
  106. }
  107. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  108. if (translate)
  109. addr = fdt_translate_address(blob, node, prop_addr);
  110. else
  111. #endif
  112. addr = fdtdec_get_number(prop_addr, na);
  113. if (sizep) {
  114. *sizep = fdtdec_get_number(prop_size, ns);
  115. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  116. (unsigned long long)*sizep);
  117. } else {
  118. debug("addr=%08llx\n", (unsigned long long)addr);
  119. }
  120. return addr;
  121. }
  122. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  123. int node, const char *prop_name,
  124. int index, fdt_size_t *sizep,
  125. bool translate)
  126. {
  127. int na, ns;
  128. debug("%s: ", __func__);
  129. na = fdt_address_cells(blob, parent);
  130. if (na < 1) {
  131. debug("(bad #address-cells)\n");
  132. return FDT_ADDR_T_NONE;
  133. }
  134. ns = fdt_size_cells(blob, parent);
  135. if (ns < 0) {
  136. debug("(bad #size-cells)\n");
  137. return FDT_ADDR_T_NONE;
  138. }
  139. debug("na=%d, ns=%d, ", na, ns);
  140. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  141. ns, sizep, translate);
  142. }
  143. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  144. const char *prop_name, int index,
  145. fdt_size_t *sizep,
  146. bool translate)
  147. {
  148. int parent;
  149. debug("%s: ", __func__);
  150. parent = fdt_parent_offset(blob, node);
  151. if (parent < 0) {
  152. debug("(no parent found)\n");
  153. return FDT_ADDR_T_NONE;
  154. }
  155. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  156. index, sizep, translate);
  157. }
  158. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  159. const char *prop_name, fdt_size_t *sizep)
  160. {
  161. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  162. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  163. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  164. ns, sizep, false);
  165. }
  166. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  167. {
  168. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  169. }
  170. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  171. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  172. {
  173. const char *list, *end;
  174. int len;
  175. list = fdt_getprop(blob, node, "compatible", &len);
  176. if (!list)
  177. return -ENOENT;
  178. end = list + len;
  179. while (list < end) {
  180. len = strlen(list);
  181. if (len >= strlen("pciVVVV,DDDD")) {
  182. char *s = strstr(list, "pci");
  183. /*
  184. * check if the string is something like pciVVVV,DDDD.RR
  185. * or just pciVVVV,DDDD
  186. */
  187. if (s && s[7] == ',' &&
  188. (s[12] == '.' || s[12] == 0)) {
  189. s += 3;
  190. *vendor = simple_strtol(s, NULL, 16);
  191. s += 5;
  192. *device = simple_strtol(s, NULL, 16);
  193. return 0;
  194. }
  195. }
  196. list += (len + 1);
  197. }
  198. return -ENOENT;
  199. }
  200. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  201. u32 *bar)
  202. {
  203. int barnum;
  204. /* extract the bar number from fdt_pci_addr */
  205. barnum = addr->phys_hi & 0xff;
  206. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  207. return -EINVAL;
  208. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  209. *bar = dm_pci_read_bar32(dev, barnum);
  210. return 0;
  211. }
  212. int fdtdec_get_pci_bus_range(const void *blob, int node,
  213. struct fdt_resource *res)
  214. {
  215. const u32 *values;
  216. int len;
  217. values = fdt_getprop(blob, node, "bus-range", &len);
  218. if (!values || len < sizeof(*values) * 2)
  219. return -EINVAL;
  220. res->start = fdt32_to_cpu(*values++);
  221. res->end = fdt32_to_cpu(*values);
  222. return 0;
  223. }
  224. #endif
  225. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  226. uint64_t default_val)
  227. {
  228. const unaligned_fdt64_t *cell64;
  229. int length;
  230. cell64 = fdt_getprop(blob, node, prop_name, &length);
  231. if (!cell64 || length < sizeof(*cell64))
  232. return default_val;
  233. return fdt64_to_cpu(*cell64);
  234. }
  235. int fdtdec_get_is_enabled(const void *blob, int node)
  236. {
  237. const char *cell;
  238. /*
  239. * It should say "okay", so only allow that. Some fdts use "ok" but
  240. * this is a bug. Please fix your device tree source file. See here
  241. * for discussion:
  242. *
  243. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  244. */
  245. cell = fdt_getprop(blob, node, "status", NULL);
  246. if (cell)
  247. return strcmp(cell, "okay") == 0;
  248. return 1;
  249. }
  250. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  251. {
  252. enum fdt_compat_id id;
  253. /* Search our drivers */
  254. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  255. if (fdt_node_check_compatible(blob, node,
  256. compat_names[id]) == 0)
  257. return id;
  258. return COMPAT_UNKNOWN;
  259. }
  260. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  261. {
  262. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  263. }
  264. int fdtdec_next_compatible_subnode(const void *blob, int node,
  265. enum fdt_compat_id id, int *depthp)
  266. {
  267. do {
  268. node = fdt_next_node(blob, node, depthp);
  269. } while (*depthp > 1);
  270. /* If this is a direct subnode, and compatible, return it */
  271. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  272. blob, node, compat_names[id]))
  273. return node;
  274. return -FDT_ERR_NOTFOUND;
  275. }
  276. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  277. int *upto)
  278. {
  279. #define MAX_STR_LEN 20
  280. char str[MAX_STR_LEN + 20];
  281. int node, err;
  282. /* snprintf() is not available */
  283. assert(strlen(name) < MAX_STR_LEN);
  284. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  285. node = fdt_path_offset(blob, str);
  286. if (node < 0)
  287. return node;
  288. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  289. if (err < 0)
  290. return err;
  291. if (err)
  292. return -FDT_ERR_NOTFOUND;
  293. (*upto)++;
  294. return node;
  295. }
  296. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  297. enum fdt_compat_id id, int *node_list,
  298. int maxcount)
  299. {
  300. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  301. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  302. }
  303. /* TODO: Can we tighten this code up a little? */
  304. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  305. enum fdt_compat_id id, int *node_list,
  306. int maxcount)
  307. {
  308. int name_len = strlen(name);
  309. int nodes[maxcount];
  310. int num_found = 0;
  311. int offset, node;
  312. int alias_node;
  313. int count;
  314. int i, j;
  315. /* find the alias node if present */
  316. alias_node = fdt_path_offset(blob, "/aliases");
  317. /*
  318. * start with nothing, and we can assume that the root node can't
  319. * match
  320. */
  321. memset(nodes, '\0', sizeof(nodes));
  322. /* First find all the compatible nodes */
  323. for (node = count = 0; node >= 0 && count < maxcount;) {
  324. node = fdtdec_next_compatible(blob, node, id);
  325. if (node >= 0)
  326. nodes[count++] = node;
  327. }
  328. if (node >= 0)
  329. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  330. __func__, name);
  331. /* Now find all the aliases */
  332. for (offset = fdt_first_property_offset(blob, alias_node);
  333. offset > 0;
  334. offset = fdt_next_property_offset(blob, offset)) {
  335. const struct fdt_property *prop;
  336. const char *path;
  337. int number;
  338. int found;
  339. node = 0;
  340. prop = fdt_get_property_by_offset(blob, offset, NULL);
  341. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  342. if (prop->len && 0 == strncmp(path, name, name_len))
  343. node = fdt_path_offset(blob, prop->data);
  344. if (node <= 0)
  345. continue;
  346. /* Get the alias number */
  347. number = simple_strtoul(path + name_len, NULL, 10);
  348. if (number < 0 || number >= maxcount) {
  349. debug("%s: warning: alias '%s' is out of range\n",
  350. __func__, path);
  351. continue;
  352. }
  353. /* Make sure the node we found is actually in our list! */
  354. found = -1;
  355. for (j = 0; j < count; j++)
  356. if (nodes[j] == node) {
  357. found = j;
  358. break;
  359. }
  360. if (found == -1) {
  361. debug("%s: warning: alias '%s' points to a node "
  362. "'%s' that is missing or is not compatible "
  363. " with '%s'\n", __func__, path,
  364. fdt_get_name(blob, node, NULL),
  365. compat_names[id]);
  366. continue;
  367. }
  368. /*
  369. * Add this node to our list in the right place, and mark
  370. * it as done.
  371. */
  372. if (fdtdec_get_is_enabled(blob, node)) {
  373. if (node_list[number]) {
  374. debug("%s: warning: alias '%s' requires that "
  375. "a node be placed in the list in a "
  376. "position which is already filled by "
  377. "node '%s'\n", __func__, path,
  378. fdt_get_name(blob, node, NULL));
  379. continue;
  380. }
  381. node_list[number] = node;
  382. if (number >= num_found)
  383. num_found = number + 1;
  384. }
  385. nodes[found] = 0;
  386. }
  387. /* Add any nodes not mentioned by an alias */
  388. for (i = j = 0; i < maxcount; i++) {
  389. if (!node_list[i]) {
  390. for (; j < maxcount; j++)
  391. if (nodes[j] &&
  392. fdtdec_get_is_enabled(blob, nodes[j]))
  393. break;
  394. /* Have we run out of nodes to add? */
  395. if (j == maxcount)
  396. break;
  397. assert(!node_list[i]);
  398. node_list[i] = nodes[j++];
  399. if (i >= num_found)
  400. num_found = i + 1;
  401. }
  402. }
  403. return num_found;
  404. }
  405. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  406. int *seqp)
  407. {
  408. int base_len = strlen(base);
  409. const char *find_name;
  410. int find_namelen;
  411. int prop_offset;
  412. int aliases;
  413. find_name = fdt_get_name(blob, offset, &find_namelen);
  414. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  415. aliases = fdt_path_offset(blob, "/aliases");
  416. for (prop_offset = fdt_first_property_offset(blob, aliases);
  417. prop_offset > 0;
  418. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  419. const char *prop;
  420. const char *name;
  421. const char *slash;
  422. int len, val;
  423. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  424. debug(" - %s, %s\n", name, prop);
  425. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  426. strncmp(name, base, base_len))
  427. continue;
  428. slash = strrchr(prop, '/');
  429. if (strcmp(slash + 1, find_name))
  430. continue;
  431. /*
  432. * Adding an extra check to distinguish DT nodes with
  433. * same name
  434. */
  435. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  436. if (fdt_get_phandle(blob, offset) !=
  437. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  438. continue;
  439. }
  440. val = trailing_strtol(name);
  441. if (val != -1) {
  442. *seqp = val;
  443. debug("Found seq %d\n", *seqp);
  444. return 0;
  445. }
  446. }
  447. debug("Not found\n");
  448. return -ENOENT;
  449. }
  450. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  451. {
  452. int base_len = strlen(base);
  453. int prop_offset;
  454. int aliases;
  455. int max = -1;
  456. debug("Looking for highest alias id for '%s'\n", base);
  457. aliases = fdt_path_offset(blob, "/aliases");
  458. for (prop_offset = fdt_first_property_offset(blob, aliases);
  459. prop_offset > 0;
  460. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  461. const char *prop;
  462. const char *name;
  463. int len, val;
  464. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  465. debug(" - %s, %s\n", name, prop);
  466. if (*prop != '/' || prop[len - 1] ||
  467. strncmp(name, base, base_len))
  468. continue;
  469. val = trailing_strtol(name);
  470. if (val > max) {
  471. debug("Found seq %d\n", val);
  472. max = val;
  473. }
  474. }
  475. return max;
  476. }
  477. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  478. {
  479. int chosen_node;
  480. if (!blob)
  481. return NULL;
  482. chosen_node = fdt_path_offset(blob, "/chosen");
  483. return fdt_getprop(blob, chosen_node, name, NULL);
  484. }
  485. int fdtdec_get_chosen_node(const void *blob, const char *name)
  486. {
  487. const char *prop;
  488. prop = fdtdec_get_chosen_prop(blob, name);
  489. if (!prop)
  490. return -FDT_ERR_NOTFOUND;
  491. return fdt_path_offset(blob, prop);
  492. }
  493. int fdtdec_check_fdt(void)
  494. {
  495. /*
  496. * We must have an FDT, but we cannot panic() yet since the console
  497. * is not ready. So for now, just assert(). Boards which need an early
  498. * FDT (prior to console ready) will need to make their own
  499. * arrangements and do their own checks.
  500. */
  501. assert(!fdtdec_prepare_fdt());
  502. return 0;
  503. }
  504. /*
  505. * This function is a little odd in that it accesses global data. At some
  506. * point if the architecture board.c files merge this will make more sense.
  507. * Even now, it is common code.
  508. */
  509. int fdtdec_prepare_fdt(void)
  510. {
  511. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  512. fdt_check_header(gd->fdt_blob)) {
  513. #ifdef CONFIG_SPL_BUILD
  514. puts("Missing DTB\n");
  515. #else
  516. printf("No valid device tree binary found at %p\n",
  517. gd->fdt_blob);
  518. # ifdef DEBUG
  519. if (gd->fdt_blob) {
  520. printf("fdt_blob=%p\n", gd->fdt_blob);
  521. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  522. 32, 0);
  523. }
  524. # endif
  525. #endif
  526. return -1;
  527. }
  528. return 0;
  529. }
  530. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  531. {
  532. const u32 *phandle;
  533. int lookup;
  534. debug("%s: %s\n", __func__, prop_name);
  535. phandle = fdt_getprop(blob, node, prop_name, NULL);
  536. if (!phandle)
  537. return -FDT_ERR_NOTFOUND;
  538. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  539. return lookup;
  540. }
  541. /**
  542. * Look up a property in a node and check that it has a minimum length.
  543. *
  544. * @param blob FDT blob
  545. * @param node node to examine
  546. * @param prop_name name of property to find
  547. * @param min_len minimum property length in bytes
  548. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  549. found, or -FDT_ERR_BADLAYOUT if not enough data
  550. * @return pointer to cell, which is only valid if err == 0
  551. */
  552. static const void *get_prop_check_min_len(const void *blob, int node,
  553. const char *prop_name, int min_len,
  554. int *err)
  555. {
  556. const void *cell;
  557. int len;
  558. debug("%s: %s\n", __func__, prop_name);
  559. cell = fdt_getprop(blob, node, prop_name, &len);
  560. if (!cell)
  561. *err = -FDT_ERR_NOTFOUND;
  562. else if (len < min_len)
  563. *err = -FDT_ERR_BADLAYOUT;
  564. else
  565. *err = 0;
  566. return cell;
  567. }
  568. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  569. u32 *array, int count)
  570. {
  571. const u32 *cell;
  572. int err = 0;
  573. debug("%s: %s\n", __func__, prop_name);
  574. cell = get_prop_check_min_len(blob, node, prop_name,
  575. sizeof(u32) * count, &err);
  576. if (!err) {
  577. int i;
  578. for (i = 0; i < count; i++)
  579. array[i] = fdt32_to_cpu(cell[i]);
  580. }
  581. return err;
  582. }
  583. int fdtdec_get_int_array_count(const void *blob, int node,
  584. const char *prop_name, u32 *array, int count)
  585. {
  586. const u32 *cell;
  587. int len, elems;
  588. int i;
  589. debug("%s: %s\n", __func__, prop_name);
  590. cell = fdt_getprop(blob, node, prop_name, &len);
  591. if (!cell)
  592. return -FDT_ERR_NOTFOUND;
  593. elems = len / sizeof(u32);
  594. if (count > elems)
  595. count = elems;
  596. for (i = 0; i < count; i++)
  597. array[i] = fdt32_to_cpu(cell[i]);
  598. return count;
  599. }
  600. const u32 *fdtdec_locate_array(const void *blob, int node,
  601. const char *prop_name, int count)
  602. {
  603. const u32 *cell;
  604. int err;
  605. cell = get_prop_check_min_len(blob, node, prop_name,
  606. sizeof(u32) * count, &err);
  607. return err ? NULL : cell;
  608. }
  609. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  610. {
  611. const s32 *cell;
  612. int len;
  613. debug("%s: %s\n", __func__, prop_name);
  614. cell = fdt_getprop(blob, node, prop_name, &len);
  615. return cell != NULL;
  616. }
  617. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  618. const char *list_name,
  619. const char *cells_name,
  620. int cell_count, int index,
  621. struct fdtdec_phandle_args *out_args)
  622. {
  623. const __be32 *list, *list_end;
  624. int rc = 0, size, cur_index = 0;
  625. uint32_t count = 0;
  626. int node = -1;
  627. int phandle;
  628. /* Retrieve the phandle list property */
  629. list = fdt_getprop(blob, src_node, list_name, &size);
  630. if (!list)
  631. return -ENOENT;
  632. list_end = list + size / sizeof(*list);
  633. /* Loop over the phandles until all the requested entry is found */
  634. while (list < list_end) {
  635. rc = -EINVAL;
  636. count = 0;
  637. /*
  638. * If phandle is 0, then it is an empty entry with no
  639. * arguments. Skip forward to the next entry.
  640. */
  641. phandle = be32_to_cpup(list++);
  642. if (phandle) {
  643. /*
  644. * Find the provider node and parse the #*-cells
  645. * property to determine the argument length.
  646. *
  647. * This is not needed if the cell count is hard-coded
  648. * (i.e. cells_name not set, but cell_count is set),
  649. * except when we're going to return the found node
  650. * below.
  651. */
  652. if (cells_name || cur_index == index) {
  653. node = fdt_node_offset_by_phandle(blob,
  654. phandle);
  655. if (node < 0) {
  656. debug("%s: could not find phandle\n",
  657. fdt_get_name(blob, src_node,
  658. NULL));
  659. goto err;
  660. }
  661. }
  662. if (cells_name) {
  663. count = fdtdec_get_int(blob, node, cells_name,
  664. -1);
  665. if (count == -1) {
  666. debug("%s: could not get %s for %s\n",
  667. fdt_get_name(blob, src_node,
  668. NULL),
  669. cells_name,
  670. fdt_get_name(blob, node,
  671. NULL));
  672. goto err;
  673. }
  674. } else {
  675. count = cell_count;
  676. }
  677. /*
  678. * Make sure that the arguments actually fit in the
  679. * remaining property data length
  680. */
  681. if (list + count > list_end) {
  682. debug("%s: arguments longer than property\n",
  683. fdt_get_name(blob, src_node, NULL));
  684. goto err;
  685. }
  686. }
  687. /*
  688. * All of the error cases above bail out of the loop, so at
  689. * this point, the parsing is successful. If the requested
  690. * index matches, then fill the out_args structure and return,
  691. * or return -ENOENT for an empty entry.
  692. */
  693. rc = -ENOENT;
  694. if (cur_index == index) {
  695. if (!phandle)
  696. goto err;
  697. if (out_args) {
  698. int i;
  699. if (count > MAX_PHANDLE_ARGS) {
  700. debug("%s: too many arguments %d\n",
  701. fdt_get_name(blob, src_node,
  702. NULL), count);
  703. count = MAX_PHANDLE_ARGS;
  704. }
  705. out_args->node = node;
  706. out_args->args_count = count;
  707. for (i = 0; i < count; i++) {
  708. out_args->args[i] =
  709. be32_to_cpup(list++);
  710. }
  711. }
  712. /* Found it! return success */
  713. return 0;
  714. }
  715. node = -1;
  716. list += count;
  717. cur_index++;
  718. }
  719. /*
  720. * Result will be one of:
  721. * -ENOENT : index is for empty phandle
  722. * -EINVAL : parsing error on data
  723. * [1..n] : Number of phandle (count mode; when index = -1)
  724. */
  725. rc = index < 0 ? cur_index : -ENOENT;
  726. err:
  727. return rc;
  728. }
  729. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  730. u8 *array, int count)
  731. {
  732. const u8 *cell;
  733. int err;
  734. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  735. if (!err)
  736. memcpy(array, cell, count);
  737. return err;
  738. }
  739. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  740. const char *prop_name, int count)
  741. {
  742. const u8 *cell;
  743. int err;
  744. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  745. if (err)
  746. return NULL;
  747. return cell;
  748. }
  749. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  750. int default_val)
  751. {
  752. int config_node;
  753. debug("%s: %s\n", __func__, prop_name);
  754. config_node = fdt_path_offset(blob, "/config");
  755. if (config_node < 0)
  756. return default_val;
  757. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  758. }
  759. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  760. {
  761. int config_node;
  762. const void *prop;
  763. debug("%s: %s\n", __func__, prop_name);
  764. config_node = fdt_path_offset(blob, "/config");
  765. if (config_node < 0)
  766. return 0;
  767. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  768. return prop != NULL;
  769. }
  770. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  771. {
  772. const char *nodep;
  773. int nodeoffset;
  774. int len;
  775. debug("%s: %s\n", __func__, prop_name);
  776. nodeoffset = fdt_path_offset(blob, "/config");
  777. if (nodeoffset < 0)
  778. return NULL;
  779. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  780. if (!nodep)
  781. return NULL;
  782. return (char *)nodep;
  783. }
  784. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  785. {
  786. u64 number = 0;
  787. while (cells--)
  788. number = (number << 32) | fdt32_to_cpu(*ptr++);
  789. return number;
  790. }
  791. int fdt_get_resource(const void *fdt, int node, const char *property,
  792. unsigned int index, struct fdt_resource *res)
  793. {
  794. const fdt32_t *ptr, *end;
  795. int na, ns, len, parent;
  796. unsigned int i = 0;
  797. parent = fdt_parent_offset(fdt, node);
  798. if (parent < 0)
  799. return parent;
  800. na = fdt_address_cells(fdt, parent);
  801. ns = fdt_size_cells(fdt, parent);
  802. ptr = fdt_getprop(fdt, node, property, &len);
  803. if (!ptr)
  804. return len;
  805. end = ptr + len / sizeof(*ptr);
  806. while (ptr + na + ns <= end) {
  807. if (i == index) {
  808. res->start = fdtdec_get_number(ptr, na);
  809. res->end = res->start;
  810. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  811. return 0;
  812. }
  813. ptr += na + ns;
  814. i++;
  815. }
  816. return -FDT_ERR_NOTFOUND;
  817. }
  818. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  819. const char *prop_names, const char *name,
  820. struct fdt_resource *res)
  821. {
  822. int index;
  823. index = fdt_stringlist_search(fdt, node, prop_names, name);
  824. if (index < 0)
  825. return index;
  826. return fdt_get_resource(fdt, node, property, index, res);
  827. }
  828. static int decode_timing_property(const void *blob, int node, const char *name,
  829. struct timing_entry *result)
  830. {
  831. int length, ret = 0;
  832. const u32 *prop;
  833. prop = fdt_getprop(blob, node, name, &length);
  834. if (!prop) {
  835. debug("%s: could not find property %s\n",
  836. fdt_get_name(blob, node, NULL), name);
  837. return length;
  838. }
  839. if (length == sizeof(u32)) {
  840. result->typ = fdtdec_get_int(blob, node, name, 0);
  841. result->min = result->typ;
  842. result->max = result->typ;
  843. } else {
  844. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  845. }
  846. return ret;
  847. }
  848. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  849. struct display_timing *dt)
  850. {
  851. int i, node, timings_node;
  852. u32 val = 0;
  853. int ret = 0;
  854. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  855. if (timings_node < 0)
  856. return timings_node;
  857. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  858. node > 0 && i != index;
  859. node = fdt_next_subnode(blob, node))
  860. i++;
  861. if (node < 0)
  862. return node;
  863. memset(dt, 0, sizeof(*dt));
  864. ret |= decode_timing_property(blob, node, "hback-porch",
  865. &dt->hback_porch);
  866. ret |= decode_timing_property(blob, node, "hfront-porch",
  867. &dt->hfront_porch);
  868. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  869. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  870. ret |= decode_timing_property(blob, node, "vback-porch",
  871. &dt->vback_porch);
  872. ret |= decode_timing_property(blob, node, "vfront-porch",
  873. &dt->vfront_porch);
  874. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  875. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  876. ret |= decode_timing_property(blob, node, "clock-frequency",
  877. &dt->pixelclock);
  878. dt->flags = 0;
  879. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  880. if (val != -1) {
  881. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  882. DISPLAY_FLAGS_VSYNC_LOW;
  883. }
  884. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  885. if (val != -1) {
  886. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  887. DISPLAY_FLAGS_HSYNC_LOW;
  888. }
  889. val = fdtdec_get_int(blob, node, "de-active", -1);
  890. if (val != -1) {
  891. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  892. DISPLAY_FLAGS_DE_LOW;
  893. }
  894. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  895. if (val != -1) {
  896. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  897. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  898. }
  899. if (fdtdec_get_bool(blob, node, "interlaced"))
  900. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  901. if (fdtdec_get_bool(blob, node, "doublescan"))
  902. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  903. if (fdtdec_get_bool(blob, node, "doubleclk"))
  904. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  905. return ret;
  906. }
  907. int fdtdec_setup_mem_size_base(void)
  908. {
  909. int ret;
  910. ofnode mem;
  911. struct resource res;
  912. mem = ofnode_path("/memory");
  913. if (!ofnode_valid(mem)) {
  914. debug("%s: Missing /memory node\n", __func__);
  915. return -EINVAL;
  916. }
  917. ret = ofnode_read_resource(mem, 0, &res);
  918. if (ret != 0) {
  919. debug("%s: Unable to decode first memory bank\n", __func__);
  920. return -EINVAL;
  921. }
  922. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  923. gd->ram_base = (unsigned long)res.start;
  924. debug("%s: Initial DRAM size %llx\n", __func__,
  925. (unsigned long long)gd->ram_size);
  926. return 0;
  927. }
  928. ofnode get_next_memory_node(ofnode mem)
  929. {
  930. do {
  931. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  932. } while (!ofnode_is_available(mem));
  933. return mem;
  934. }
  935. int fdtdec_setup_memory_banksize(void)
  936. {
  937. int bank, ret, reg = 0;
  938. struct resource res;
  939. ofnode mem = ofnode_null();
  940. mem = get_next_memory_node(mem);
  941. if (!ofnode_valid(mem)) {
  942. debug("%s: Missing /memory node\n", __func__);
  943. return -EINVAL;
  944. }
  945. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  946. ret = ofnode_read_resource(mem, reg++, &res);
  947. if (ret < 0) {
  948. reg = 0;
  949. mem = get_next_memory_node(mem);
  950. if (!ofnode_valid(mem))
  951. break;
  952. ret = ofnode_read_resource(mem, reg++, &res);
  953. if (ret < 0)
  954. break;
  955. }
  956. if (ret != 0)
  957. return -EINVAL;
  958. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  959. gd->bd->bi_dram[bank].size =
  960. (phys_size_t)(res.end - res.start + 1);
  961. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  962. __func__, bank,
  963. (unsigned long long)gd->bd->bi_dram[bank].start,
  964. (unsigned long long)gd->bd->bi_dram[bank].size);
  965. }
  966. return 0;
  967. }
  968. int fdtdec_setup_mem_size_base_lowest(void)
  969. {
  970. int bank, ret, reg = 0;
  971. struct resource res;
  972. unsigned long base;
  973. phys_size_t size;
  974. ofnode mem = ofnode_null();
  975. gd->ram_base = (unsigned long)~0;
  976. mem = get_next_memory_node(mem);
  977. if (!ofnode_valid(mem)) {
  978. debug("%s: Missing /memory node\n", __func__);
  979. return -EINVAL;
  980. }
  981. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  982. ret = ofnode_read_resource(mem, reg++, &res);
  983. if (ret < 0) {
  984. reg = 0;
  985. mem = get_next_memory_node(mem);
  986. if (!ofnode_valid(mem))
  987. break;
  988. ret = ofnode_read_resource(mem, reg++, &res);
  989. if (ret < 0)
  990. break;
  991. }
  992. if (ret != 0)
  993. return -EINVAL;
  994. base = (unsigned long)res.start;
  995. size = (phys_size_t)(res.end - res.start + 1);
  996. if (gd->ram_base > base && size) {
  997. gd->ram_base = base;
  998. gd->ram_size = size;
  999. debug("%s: Initial DRAM base %lx size %lx\n",
  1000. __func__, base, (unsigned long)size);
  1001. }
  1002. }
  1003. return 0;
  1004. }
  1005. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1006. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1007. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1008. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1009. {
  1010. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1011. bool gzip = 0, lzo = 0;
  1012. ulong sz_in = sz_src;
  1013. void *dst;
  1014. int rc;
  1015. if (CONFIG_IS_ENABLED(GZIP))
  1016. if (gzip_parse_header(src, sz_in) >= 0)
  1017. gzip = 1;
  1018. if (CONFIG_IS_ENABLED(LZO))
  1019. if (!gzip && lzop_is_valid_header(src))
  1020. lzo = 1;
  1021. if (!gzip && !lzo)
  1022. return -EBADMSG;
  1023. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1024. dst = malloc(sz_out);
  1025. if (!dst) {
  1026. puts("uncompress_blob: Unable to allocate memory\n");
  1027. return -ENOMEM;
  1028. }
  1029. } else {
  1030. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1031. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1032. # else
  1033. return -ENOTSUPP;
  1034. # endif
  1035. }
  1036. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1037. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1038. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1039. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1040. else
  1041. hang();
  1042. if (rc < 0) {
  1043. /* not a valid compressed blob */
  1044. puts("uncompress_blob: Unable to uncompress\n");
  1045. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1046. free(dst);
  1047. return -EBADMSG;
  1048. }
  1049. *dstp = dst;
  1050. return 0;
  1051. }
  1052. # else
  1053. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1054. {
  1055. *dstp = (void *)src;
  1056. return 0;
  1057. }
  1058. # endif
  1059. #endif
  1060. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1061. /*
  1062. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1063. * provide and/or fixup the fdt.
  1064. */
  1065. __weak void *board_fdt_blob_setup(void)
  1066. {
  1067. void *fdt_blob = NULL;
  1068. #ifdef CONFIG_SPL_BUILD
  1069. /* FDT is at end of BSS unless it is in a different memory region */
  1070. if (IS_ENABLED(CONFIG_SPL_SEPARATE_BSS))
  1071. fdt_blob = (ulong *)&_image_binary_end;
  1072. else
  1073. fdt_blob = (ulong *)&__bss_end;
  1074. #else
  1075. /* FDT is at end of image */
  1076. fdt_blob = (ulong *)&_end;
  1077. #endif
  1078. return fdt_blob;
  1079. }
  1080. #endif
  1081. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1082. {
  1083. const char *path;
  1084. int offset, err;
  1085. if (!is_valid_ethaddr(mac))
  1086. return -EINVAL;
  1087. path = fdt_get_alias(fdt, "ethernet");
  1088. if (!path)
  1089. return 0;
  1090. debug("ethernet alias found: %s\n", path);
  1091. offset = fdt_path_offset(fdt, path);
  1092. if (offset < 0) {
  1093. debug("ethernet alias points to absent node %s\n", path);
  1094. return -ENOENT;
  1095. }
  1096. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1097. if (err < 0)
  1098. return err;
  1099. debug("MAC address: %pM\n", mac);
  1100. return 0;
  1101. }
  1102. static int fdtdec_init_reserved_memory(void *blob)
  1103. {
  1104. int na, ns, node, err;
  1105. fdt32_t value;
  1106. /* inherit #address-cells and #size-cells from the root node */
  1107. na = fdt_address_cells(blob, 0);
  1108. ns = fdt_size_cells(blob, 0);
  1109. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1110. if (node < 0)
  1111. return node;
  1112. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1113. if (err < 0)
  1114. return err;
  1115. value = cpu_to_fdt32(ns);
  1116. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1117. if (err < 0)
  1118. return err;
  1119. value = cpu_to_fdt32(na);
  1120. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1121. if (err < 0)
  1122. return err;
  1123. return node;
  1124. }
  1125. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1126. const struct fdt_memory *carveout,
  1127. uint32_t *phandlep, bool no_map)
  1128. {
  1129. fdt32_t cells[4] = {}, *ptr = cells;
  1130. uint32_t upper, lower, phandle;
  1131. int parent, node, na, ns, err;
  1132. fdt_size_t size;
  1133. char name[64];
  1134. /* create an empty /reserved-memory node if one doesn't exist */
  1135. parent = fdt_path_offset(blob, "/reserved-memory");
  1136. if (parent < 0) {
  1137. parent = fdtdec_init_reserved_memory(blob);
  1138. if (parent < 0)
  1139. return parent;
  1140. }
  1141. /* only 1 or 2 #address-cells and #size-cells are supported */
  1142. na = fdt_address_cells(blob, parent);
  1143. if (na < 1 || na > 2)
  1144. return -FDT_ERR_BADNCELLS;
  1145. ns = fdt_size_cells(blob, parent);
  1146. if (ns < 1 || ns > 2)
  1147. return -FDT_ERR_BADNCELLS;
  1148. /* find a matching node and return the phandle to that */
  1149. fdt_for_each_subnode(node, blob, parent) {
  1150. const char *name = fdt_get_name(blob, node, NULL);
  1151. fdt_addr_t addr;
  1152. fdt_size_t size;
  1153. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1154. &size, false);
  1155. if (addr == FDT_ADDR_T_NONE) {
  1156. debug("failed to read address/size for %s\n", name);
  1157. continue;
  1158. }
  1159. if (addr == carveout->start && (addr + size - 1) ==
  1160. carveout->end) {
  1161. if (phandlep)
  1162. *phandlep = fdt_get_phandle(blob, node);
  1163. return 0;
  1164. }
  1165. }
  1166. /*
  1167. * Unpack the start address and generate the name of the new node
  1168. * base on the basename and the unit-address.
  1169. */
  1170. upper = upper_32_bits(carveout->start);
  1171. lower = lower_32_bits(carveout->start);
  1172. if (na > 1 && upper > 0)
  1173. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1174. lower);
  1175. else {
  1176. if (upper > 0) {
  1177. debug("address %08x:%08x exceeds addressable space\n",
  1178. upper, lower);
  1179. return -FDT_ERR_BADVALUE;
  1180. }
  1181. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1182. }
  1183. node = fdt_add_subnode(blob, parent, name);
  1184. if (node < 0)
  1185. return node;
  1186. if (phandlep) {
  1187. err = fdt_generate_phandle(blob, &phandle);
  1188. if (err < 0)
  1189. return err;
  1190. err = fdtdec_set_phandle(blob, node, phandle);
  1191. if (err < 0)
  1192. return err;
  1193. }
  1194. /* store one or two address cells */
  1195. if (na > 1)
  1196. *ptr++ = cpu_to_fdt32(upper);
  1197. *ptr++ = cpu_to_fdt32(lower);
  1198. /* store one or two size cells */
  1199. size = carveout->end - carveout->start + 1;
  1200. upper = upper_32_bits(size);
  1201. lower = lower_32_bits(size);
  1202. if (ns > 1)
  1203. *ptr++ = cpu_to_fdt32(upper);
  1204. *ptr++ = cpu_to_fdt32(lower);
  1205. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1206. if (err < 0)
  1207. return err;
  1208. if (no_map) {
  1209. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1210. if (err < 0)
  1211. return err;
  1212. }
  1213. /* return the phandle for the new node for the caller to use */
  1214. if (phandlep)
  1215. *phandlep = phandle;
  1216. return 0;
  1217. }
  1218. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1219. unsigned int index, struct fdt_memory *carveout)
  1220. {
  1221. const fdt32_t *prop;
  1222. uint32_t phandle;
  1223. int offset, len;
  1224. fdt_size_t size;
  1225. offset = fdt_path_offset(blob, node);
  1226. if (offset < 0)
  1227. return offset;
  1228. prop = fdt_getprop(blob, offset, name, &len);
  1229. if (!prop) {
  1230. debug("failed to get %s for %s\n", name, node);
  1231. return -FDT_ERR_NOTFOUND;
  1232. }
  1233. if ((len % sizeof(phandle)) != 0) {
  1234. debug("invalid phandle property\n");
  1235. return -FDT_ERR_BADPHANDLE;
  1236. }
  1237. if (len < (sizeof(phandle) * (index + 1))) {
  1238. debug("invalid phandle index\n");
  1239. return -FDT_ERR_BADPHANDLE;
  1240. }
  1241. phandle = fdt32_to_cpu(prop[index]);
  1242. offset = fdt_node_offset_by_phandle(blob, phandle);
  1243. if (offset < 0) {
  1244. debug("failed to find node for phandle %u\n", phandle);
  1245. return offset;
  1246. }
  1247. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1248. "reg", 0, &size,
  1249. true);
  1250. if (carveout->start == FDT_ADDR_T_NONE) {
  1251. debug("failed to read address/size from \"reg\" property\n");
  1252. return -FDT_ERR_NOTFOUND;
  1253. }
  1254. carveout->end = carveout->start + size - 1;
  1255. return 0;
  1256. }
  1257. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1258. unsigned int index, const char *name,
  1259. const struct fdt_memory *carveout)
  1260. {
  1261. uint32_t phandle;
  1262. int err, offset, len;
  1263. fdt32_t value;
  1264. void *prop;
  1265. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
  1266. if (err < 0) {
  1267. debug("failed to add reserved memory: %d\n", err);
  1268. return err;
  1269. }
  1270. offset = fdt_path_offset(blob, node);
  1271. if (offset < 0) {
  1272. debug("failed to find offset for node %s: %d\n", node, offset);
  1273. return offset;
  1274. }
  1275. value = cpu_to_fdt32(phandle);
  1276. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1277. if (len == -FDT_ERR_NOTFOUND)
  1278. len = 0;
  1279. else
  1280. return len;
  1281. }
  1282. if ((index + 1) * sizeof(value) > len) {
  1283. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1284. (index + 1) * sizeof(value),
  1285. &prop);
  1286. if (err < 0) {
  1287. debug("failed to resize reserved memory property: %s\n",
  1288. fdt_strerror(err));
  1289. return err;
  1290. }
  1291. }
  1292. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1293. strlen(prop_name),
  1294. index * sizeof(value),
  1295. &value, sizeof(value));
  1296. if (err < 0) {
  1297. debug("failed to update %s property for node %s: %s\n",
  1298. prop_name, node, fdt_strerror(err));
  1299. return err;
  1300. }
  1301. return 0;
  1302. }
  1303. __weak int fdtdec_board_setup(const void *fdt_blob)
  1304. {
  1305. return 0;
  1306. }
  1307. int fdtdec_setup(void)
  1308. {
  1309. int ret;
  1310. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1311. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1312. void *fdt_blob;
  1313. # endif
  1314. # ifdef CONFIG_OF_EMBED
  1315. /* Get a pointer to the FDT */
  1316. # ifdef CONFIG_SPL_BUILD
  1317. gd->fdt_blob = __dtb_dt_spl_begin;
  1318. # else
  1319. gd->fdt_blob = __dtb_dt_begin;
  1320. # endif
  1321. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1322. /* Allow the board to override the fdt address. */
  1323. gd->fdt_blob = board_fdt_blob_setup();
  1324. # elif defined(CONFIG_OF_HOSTFILE)
  1325. if (sandbox_read_fdt_from_file()) {
  1326. puts("Failed to read control FDT\n");
  1327. return -1;
  1328. }
  1329. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1330. gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address;
  1331. # endif
  1332. # ifndef CONFIG_SPL_BUILD
  1333. /* Allow the early environment to override the fdt address */
  1334. gd->fdt_blob = map_sysmem
  1335. (env_get_ulong("fdtcontroladdr", 16,
  1336. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1337. # endif
  1338. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1339. /*
  1340. * Try and uncompress the blob.
  1341. * Unfortunately there is no way to know how big the input blob really
  1342. * is. So let us set the maximum input size arbitrarily high. 16MB
  1343. * ought to be more than enough for packed DTBs.
  1344. */
  1345. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1346. gd->fdt_blob = fdt_blob;
  1347. /*
  1348. * Check if blob is a FIT images containings DTBs.
  1349. * If so, pick the most relevant
  1350. */
  1351. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1352. if (fdt_blob) {
  1353. gd->multi_dtb_fit = gd->fdt_blob;
  1354. gd->fdt_blob = fdt_blob;
  1355. }
  1356. # endif
  1357. #endif
  1358. ret = fdtdec_prepare_fdt();
  1359. if (!ret)
  1360. ret = fdtdec_board_setup(gd->fdt_blob);
  1361. return ret;
  1362. }
  1363. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1364. int fdtdec_resetup(int *rescan)
  1365. {
  1366. void *fdt_blob;
  1367. /*
  1368. * If the current DTB is part of a compressed FIT image,
  1369. * try to locate the best match from the uncompressed
  1370. * FIT image stillpresent there. Save the time and space
  1371. * required to uncompress it again.
  1372. */
  1373. if (gd->multi_dtb_fit) {
  1374. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1375. if (fdt_blob == gd->fdt_blob) {
  1376. /*
  1377. * The best match did not change. no need to tear down
  1378. * the DM and rescan the fdt.
  1379. */
  1380. *rescan = 0;
  1381. return 0;
  1382. }
  1383. *rescan = 1;
  1384. gd->fdt_blob = fdt_blob;
  1385. return fdtdec_prepare_fdt();
  1386. }
  1387. /*
  1388. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1389. * not a FIT image containings DTB, but a single DTB. There is no need
  1390. * to teard down DM and rescan the DT in this case.
  1391. */
  1392. *rescan = 0;
  1393. return 0;
  1394. }
  1395. #endif
  1396. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1397. phys_addr_t *basep, phys_size_t *sizep,
  1398. struct bd_info *bd)
  1399. {
  1400. int addr_cells, size_cells;
  1401. const u32 *cell, *end;
  1402. u64 total_size, size, addr;
  1403. int node, child;
  1404. bool auto_size;
  1405. int bank;
  1406. int len;
  1407. debug("%s: board_id=%d\n", __func__, board_id);
  1408. if (!area)
  1409. area = "/memory";
  1410. node = fdt_path_offset(blob, area);
  1411. if (node < 0) {
  1412. debug("No %s node found\n", area);
  1413. return -ENOENT;
  1414. }
  1415. cell = fdt_getprop(blob, node, "reg", &len);
  1416. if (!cell) {
  1417. debug("No reg property found\n");
  1418. return -ENOENT;
  1419. }
  1420. addr_cells = fdt_address_cells(blob, node);
  1421. size_cells = fdt_size_cells(blob, node);
  1422. /* Check the board id and mask */
  1423. for (child = fdt_first_subnode(blob, node);
  1424. child >= 0;
  1425. child = fdt_next_subnode(blob, child)) {
  1426. int match_mask, match_value;
  1427. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1428. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1429. if (match_value >= 0 &&
  1430. ((board_id & match_mask) == match_value)) {
  1431. /* Found matching mask */
  1432. debug("Found matching mask %d\n", match_mask);
  1433. node = child;
  1434. cell = fdt_getprop(blob, node, "reg", &len);
  1435. if (!cell) {
  1436. debug("No memory-banks property found\n");
  1437. return -EINVAL;
  1438. }
  1439. break;
  1440. }
  1441. }
  1442. /* Note: if no matching subnode was found we use the parent node */
  1443. if (bd) {
  1444. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1445. CONFIG_NR_DRAM_BANKS);
  1446. }
  1447. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1448. total_size = 0;
  1449. end = cell + len / 4 - addr_cells - size_cells;
  1450. debug("cell at %p, end %p\n", cell, end);
  1451. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1452. if (cell > end)
  1453. break;
  1454. addr = 0;
  1455. if (addr_cells == 2)
  1456. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1457. addr += fdt32_to_cpu(*cell++);
  1458. if (bd)
  1459. bd->bi_dram[bank].start = addr;
  1460. if (basep && !bank)
  1461. *basep = (phys_addr_t)addr;
  1462. size = 0;
  1463. if (size_cells == 2)
  1464. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1465. size += fdt32_to_cpu(*cell++);
  1466. if (auto_size) {
  1467. u64 new_size;
  1468. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1469. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1470. if (new_size == size) {
  1471. debug("OK\n");
  1472. } else {
  1473. debug("sized to %llx\n", new_size);
  1474. size = new_size;
  1475. }
  1476. }
  1477. if (bd)
  1478. bd->bi_dram[bank].size = size;
  1479. total_size += size;
  1480. }
  1481. debug("Memory size %llu\n", total_size);
  1482. if (sizep)
  1483. *sizep = (phys_size_t)total_size;
  1484. return 0;
  1485. }
  1486. #endif /* !USE_HOSTCC */